blob: 48dfc163233ec516a93118b80541759db92f7062 [file] [log] [blame]
CK Hu119f5172016-01-04 18:36:34 +01001/*
2 * Copyright (c) 2015 MediaTek Inc.
3 * Author: YT SHEN <yt.shen@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <drm/drmP.h>
16#include <drm/drm_atomic.h>
17#include <drm/drm_atomic_helper.h>
18#include <drm/drm_crtc_helper.h>
19#include <drm/drm_gem.h>
20#include <drm/drm_gem_cma_helper.h>
21#include <linux/component.h>
22#include <linux/iommu.h>
23#include <linux/of_address.h>
24#include <linux/of_platform.h>
25#include <linux/pm_runtime.h>
26
27#include "mtk_drm_crtc.h"
28#include "mtk_drm_ddp.h"
29#include "mtk_drm_ddp_comp.h"
30#include "mtk_drm_drv.h"
31#include "mtk_drm_fb.h"
32#include "mtk_drm_gem.h"
33
34#define DRIVER_NAME "mediatek"
35#define DRIVER_DESC "Mediatek SoC DRM"
36#define DRIVER_DATE "20150513"
37#define DRIVER_MAJOR 1
38#define DRIVER_MINOR 0
39
40static void mtk_atomic_schedule(struct mtk_drm_private *private,
41 struct drm_atomic_state *state)
42{
43 private->commit.state = state;
44 schedule_work(&private->commit.work);
45}
46
47static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
48{
49 struct drm_plane *plane;
50 struct drm_plane_state *plane_state;
51 int i;
52
53 for_each_plane_in_state(state, plane, plane_state, i)
54 mtk_fb_wait(plane->state->fb);
55}
56
57static void mtk_atomic_complete(struct mtk_drm_private *private,
58 struct drm_atomic_state *state)
59{
60 struct drm_device *drm = private->drm;
61
62 mtk_atomic_wait_for_fences(state);
63
Bibby Hsiehac085002016-08-04 10:59:57 +080064 /*
65 * Mediatek drm supports runtime PM, so plane registers cannot be
66 * written when their crtc is disabled.
67 *
68 * The comment for drm_atomic_helper_commit states:
69 * For drivers supporting runtime PM the recommended sequence is
70 *
71 * drm_atomic_helper_commit_modeset_disables(dev, state);
72 * drm_atomic_helper_commit_modeset_enables(dev, state);
Liu Ying2b58e982016-08-29 17:12:03 +080073 * drm_atomic_helper_commit_planes(dev, state,
74 * DRM_PLANE_COMMIT_ACTIVE_ONLY);
Bibby Hsiehac085002016-08-04 10:59:57 +080075 *
76 * See the kerneldoc entries for these three functions for more details.
77 */
CK Hu119f5172016-01-04 18:36:34 +010078 drm_atomic_helper_commit_modeset_disables(drm, state);
CK Hu119f5172016-01-04 18:36:34 +010079 drm_atomic_helper_commit_modeset_enables(drm, state);
Liu Ying2b58e982016-08-29 17:12:03 +080080 drm_atomic_helper_commit_planes(drm, state,
81 DRM_PLANE_COMMIT_ACTIVE_ONLY);
Bibby Hsiehac085002016-08-04 10:59:57 +080082
CK Hu119f5172016-01-04 18:36:34 +010083 drm_atomic_helper_wait_for_vblanks(drm, state);
Bibby Hsiehac085002016-08-04 10:59:57 +080084
CK Hu119f5172016-01-04 18:36:34 +010085 drm_atomic_helper_cleanup_planes(drm, state);
86 drm_atomic_state_free(state);
87}
88
89static void mtk_atomic_work(struct work_struct *work)
90{
91 struct mtk_drm_private *private = container_of(work,
92 struct mtk_drm_private, commit.work);
93
94 mtk_atomic_complete(private, private->commit.state);
95}
96
97static int mtk_atomic_commit(struct drm_device *drm,
98 struct drm_atomic_state *state,
99 bool async)
100{
101 struct mtk_drm_private *private = drm->dev_private;
102 int ret;
103
104 ret = drm_atomic_helper_prepare_planes(drm, state);
105 if (ret)
106 return ret;
107
108 mutex_lock(&private->commit.lock);
109 flush_work(&private->commit.work);
110
Daniel Vetter5e84c262016-06-10 00:06:32 +0200111 drm_atomic_helper_swap_state(state, true);
CK Hu119f5172016-01-04 18:36:34 +0100112
113 if (async)
114 mtk_atomic_schedule(private, state);
115 else
116 mtk_atomic_complete(private, state);
117
118 mutex_unlock(&private->commit.lock);
119
120 return 0;
121}
122
123static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
124 .fb_create = mtk_drm_mode_fb_create,
125 .atomic_check = drm_atomic_helper_check,
126 .atomic_commit = mtk_atomic_commit,
127};
128
129static const enum mtk_ddp_comp_id mtk_ddp_main[] = {
130 DDP_COMPONENT_OVL0,
131 DDP_COMPONENT_COLOR0,
132 DDP_COMPONENT_AAL,
133 DDP_COMPONENT_OD,
134 DDP_COMPONENT_RDMA0,
135 DDP_COMPONENT_UFOE,
136 DDP_COMPONENT_DSI0,
137 DDP_COMPONENT_PWM0,
138};
139
140static const enum mtk_ddp_comp_id mtk_ddp_ext[] = {
141 DDP_COMPONENT_OVL1,
142 DDP_COMPONENT_COLOR1,
143 DDP_COMPONENT_GAMMA,
144 DDP_COMPONENT_RDMA1,
145 DDP_COMPONENT_DPI0,
146};
147
148static int mtk_drm_kms_init(struct drm_device *drm)
149{
150 struct mtk_drm_private *private = drm->dev_private;
151 struct platform_device *pdev;
152 struct device_node *np;
153 int ret;
154
155 if (!iommu_present(&platform_bus_type))
156 return -EPROBE_DEFER;
157
158 pdev = of_find_device_by_node(private->mutex_node);
159 if (!pdev) {
160 dev_err(drm->dev, "Waiting for disp-mutex device %s\n",
161 private->mutex_node->full_name);
162 of_node_put(private->mutex_node);
163 return -EPROBE_DEFER;
164 }
165 private->mutex_dev = &pdev->dev;
166
167 drm_mode_config_init(drm);
168
169 drm->mode_config.min_width = 64;
170 drm->mode_config.min_height = 64;
171
172 /*
173 * set max width and height as default value(4096x4096).
174 * this value would be used to check framebuffer size limitation
175 * at drm_mode_addfb().
176 */
177 drm->mode_config.max_width = 4096;
178 drm->mode_config.max_height = 4096;
179 drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
180
181 ret = component_bind_all(drm->dev, drm);
182 if (ret)
183 goto err_config_cleanup;
184
185 /*
186 * We currently support two fixed data streams, each optional,
187 * and each statically assigned to a crtc:
188 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
189 */
190 ret = mtk_drm_crtc_create(drm, mtk_ddp_main, ARRAY_SIZE(mtk_ddp_main));
191 if (ret < 0)
192 goto err_component_unbind;
193 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
194 ret = mtk_drm_crtc_create(drm, mtk_ddp_ext, ARRAY_SIZE(mtk_ddp_ext));
195 if (ret < 0)
196 goto err_component_unbind;
197
198 /* Use OVL device for all DMA memory allocations */
199 np = private->comp_node[mtk_ddp_main[0]] ?:
200 private->comp_node[mtk_ddp_ext[0]];
201 pdev = of_find_device_by_node(np);
202 if (!pdev) {
203 ret = -ENODEV;
204 dev_err(drm->dev, "Need at least one OVL device\n");
205 goto err_component_unbind;
206 }
207
208 private->dma_dev = &pdev->dev;
209
210 /*
211 * We don't use the drm_irq_install() helpers provided by the DRM
212 * core, so we need to set this manually in order to allow the
213 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
214 */
215 drm->irq_enabled = true;
216 ret = drm_vblank_init(drm, MAX_CRTC);
217 if (ret < 0)
218 goto err_component_unbind;
219
220 drm_kms_helper_poll_init(drm);
221 drm_mode_config_reset(drm);
222
223 return 0;
224
225err_component_unbind:
226 component_unbind_all(drm->dev, drm);
227err_config_cleanup:
228 drm_mode_config_cleanup(drm);
229
230 return ret;
231}
232
233static void mtk_drm_kms_deinit(struct drm_device *drm)
234{
235 drm_kms_helper_poll_fini(drm);
236
237 drm_vblank_cleanup(drm);
238 component_unbind_all(drm->dev, drm);
239 drm_mode_config_cleanup(drm);
240}
241
242static const struct file_operations mtk_drm_fops = {
243 .owner = THIS_MODULE,
244 .open = drm_open,
245 .release = drm_release,
246 .unlocked_ioctl = drm_ioctl,
247 .mmap = mtk_drm_gem_mmap,
248 .poll = drm_poll,
249 .read = drm_read,
250#ifdef CONFIG_COMPAT
251 .compat_ioctl = drm_compat_ioctl,
252#endif
253};
254
255static struct drm_driver mtk_drm_driver = {
256 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
257 DRIVER_ATOMIC,
258
259 .get_vblank_counter = drm_vblank_count,
260 .enable_vblank = mtk_drm_crtc_enable_vblank,
261 .disable_vblank = mtk_drm_crtc_disable_vblank,
262
Daniel Vetter564dd272016-05-30 19:53:19 +0200263 .gem_free_object_unlocked = mtk_drm_gem_free_object,
CK Hu119f5172016-01-04 18:36:34 +0100264 .gem_vm_ops = &drm_gem_cma_vm_ops,
265 .dumb_create = mtk_drm_gem_dumb_create,
266 .dumb_map_offset = mtk_drm_gem_dumb_map_offset,
267 .dumb_destroy = drm_gem_dumb_destroy,
268
269 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
270 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
271 .gem_prime_export = drm_gem_prime_export,
272 .gem_prime_import = drm_gem_prime_import,
273 .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
274 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
275 .gem_prime_mmap = mtk_drm_gem_mmap_buf,
276 .fops = &mtk_drm_fops,
277
278 .name = DRIVER_NAME,
279 .desc = DRIVER_DESC,
280 .date = DRIVER_DATE,
281 .major = DRIVER_MAJOR,
282 .minor = DRIVER_MINOR,
283};
284
285static int compare_of(struct device *dev, void *data)
286{
287 return dev->of_node == data;
288}
289
290static int mtk_drm_bind(struct device *dev)
291{
292 struct mtk_drm_private *private = dev_get_drvdata(dev);
293 struct drm_device *drm;
294 int ret;
295
296 drm = drm_dev_alloc(&mtk_drm_driver, dev);
Tom Gundersen0f288602016-09-21 16:59:19 +0200297 if (IS_ERR(drm))
298 return PTR_ERR(drm);
CK Hu119f5172016-01-04 18:36:34 +0100299
CK Hu119f5172016-01-04 18:36:34 +0100300 drm->dev_private = private;
301 private->drm = drm;
302
303 ret = mtk_drm_kms_init(drm);
304 if (ret < 0)
305 goto err_free;
306
307 ret = drm_dev_register(drm, 0);
308 if (ret < 0)
309 goto err_deinit;
310
CK Hu119f5172016-01-04 18:36:34 +0100311 return 0;
312
CK Hu119f5172016-01-04 18:36:34 +0100313err_deinit:
314 mtk_drm_kms_deinit(drm);
315err_free:
316 drm_dev_unref(drm);
317 return ret;
318}
319
320static void mtk_drm_unbind(struct device *dev)
321{
322 struct mtk_drm_private *private = dev_get_drvdata(dev);
323
Daniel Vetter80683422016-12-08 12:07:38 +0100324 drm_dev_unregister(private->drm);
325 drm_dev_unref(private->drm);
CK Hu119f5172016-01-04 18:36:34 +0100326 private->drm = NULL;
327}
328
329static const struct component_master_ops mtk_drm_ops = {
330 .bind = mtk_drm_bind,
331 .unbind = mtk_drm_unbind,
332};
333
334static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
335 { .compatible = "mediatek,mt8173-disp-ovl", .data = (void *)MTK_DISP_OVL },
336 { .compatible = "mediatek,mt8173-disp-rdma", .data = (void *)MTK_DISP_RDMA },
337 { .compatible = "mediatek,mt8173-disp-wdma", .data = (void *)MTK_DISP_WDMA },
338 { .compatible = "mediatek,mt8173-disp-color", .data = (void *)MTK_DISP_COLOR },
339 { .compatible = "mediatek,mt8173-disp-aal", .data = (void *)MTK_DISP_AAL},
340 { .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, },
341 { .compatible = "mediatek,mt8173-disp-ufoe", .data = (void *)MTK_DISP_UFOE },
342 { .compatible = "mediatek,mt8173-dsi", .data = (void *)MTK_DSI },
343 { .compatible = "mediatek,mt8173-dpi", .data = (void *)MTK_DPI },
344 { .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
345 { .compatible = "mediatek,mt8173-disp-pwm", .data = (void *)MTK_DISP_PWM },
346 { .compatible = "mediatek,mt8173-disp-od", .data = (void *)MTK_DISP_OD },
347 { }
348};
349
350static int mtk_drm_probe(struct platform_device *pdev)
351{
352 struct device *dev = &pdev->dev;
353 struct mtk_drm_private *private;
354 struct resource *mem;
355 struct device_node *node;
356 struct component_match *match = NULL;
357 int ret;
358 int i;
359
360 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
361 if (!private)
362 return -ENOMEM;
363
364 mutex_init(&private->commit.lock);
365 INIT_WORK(&private->commit.work, mtk_atomic_work);
366
367 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
368 private->config_regs = devm_ioremap_resource(dev, mem);
369 if (IS_ERR(private->config_regs)) {
370 ret = PTR_ERR(private->config_regs);
371 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
372 ret);
373 return ret;
374 }
375
376 /* Iterate over sibling DISP function blocks */
377 for_each_child_of_node(dev->of_node->parent, node) {
378 const struct of_device_id *of_id;
379 enum mtk_ddp_comp_type comp_type;
380 int comp_id;
381
382 of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
383 if (!of_id)
384 continue;
385
386 if (!of_device_is_available(node)) {
387 dev_dbg(dev, "Skipping disabled component %s\n",
388 node->full_name);
389 continue;
390 }
391
392 comp_type = (enum mtk_ddp_comp_type)of_id->data;
393
394 if (comp_type == MTK_DISP_MUTEX) {
395 private->mutex_node = of_node_get(node);
396 continue;
397 }
398
399 comp_id = mtk_ddp_comp_get_id(node, comp_type);
400 if (comp_id < 0) {
401 dev_warn(dev, "Skipping unknown component %s\n",
402 node->full_name);
403 continue;
404 }
405
406 private->comp_node[comp_id] = of_node_get(node);
407
408 /*
409 * Currently only the OVL, RDMA, DSI, and DPI blocks have
410 * separate component platform drivers and initialize their own
411 * DDP component structure. The others are initialized here.
412 */
413 if (comp_type == MTK_DISP_OVL ||
414 comp_type == MTK_DISP_RDMA ||
415 comp_type == MTK_DSI ||
416 comp_type == MTK_DPI) {
417 dev_info(dev, "Adding component match for %s\n",
418 node->full_name);
419 component_match_add(dev, &match, compare_of, node);
420 } else {
421 struct mtk_ddp_comp *comp;
422
423 comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
424 if (!comp) {
425 ret = -ENOMEM;
426 goto err_node;
427 }
428
429 ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
430 if (ret)
431 goto err_node;
432
433 private->ddp_comp[comp_id] = comp;
434 }
435 }
436
437 if (!private->mutex_node) {
438 dev_err(dev, "Failed to find disp-mutex node\n");
439 ret = -ENODEV;
440 goto err_node;
441 }
442
443 pm_runtime_enable(dev);
444
445 platform_set_drvdata(pdev, private);
446
447 ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
448 if (ret)
449 goto err_pm;
450
451 return 0;
452
453err_pm:
454 pm_runtime_disable(dev);
455err_node:
456 of_node_put(private->mutex_node);
457 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
458 of_node_put(private->comp_node[i]);
459 return ret;
460}
461
462static int mtk_drm_remove(struct platform_device *pdev)
463{
464 struct mtk_drm_private *private = platform_get_drvdata(pdev);
465 struct drm_device *drm = private->drm;
466 int i;
467
CK Hu119f5172016-01-04 18:36:34 +0100468 drm_dev_unregister(drm);
469 mtk_drm_kms_deinit(drm);
470 drm_dev_unref(drm);
471
472 component_master_del(&pdev->dev, &mtk_drm_ops);
473 pm_runtime_disable(&pdev->dev);
474 of_node_put(private->mutex_node);
475 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
476 of_node_put(private->comp_node[i]);
477
478 return 0;
479}
480
481#ifdef CONFIG_PM_SLEEP
482static int mtk_drm_sys_suspend(struct device *dev)
483{
484 struct mtk_drm_private *private = dev_get_drvdata(dev);
485 struct drm_device *drm = private->drm;
486
487 drm_kms_helper_poll_disable(drm);
488
489 private->suspend_state = drm_atomic_helper_suspend(drm);
490 if (IS_ERR(private->suspend_state)) {
491 drm_kms_helper_poll_enable(drm);
492 return PTR_ERR(private->suspend_state);
493 }
494
495 DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
496 return 0;
497}
498
499static int mtk_drm_sys_resume(struct device *dev)
500{
501 struct mtk_drm_private *private = dev_get_drvdata(dev);
502 struct drm_device *drm = private->drm;
503
504 drm_atomic_helper_resume(drm, private->suspend_state);
505 drm_kms_helper_poll_enable(drm);
506
507 DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
508 return 0;
509}
510#endif
511
512static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
513 mtk_drm_sys_resume);
514
515static const struct of_device_id mtk_drm_of_ids[] = {
516 { .compatible = "mediatek,mt8173-mmsys", },
517 { }
518};
519
520static struct platform_driver mtk_drm_platform_driver = {
521 .probe = mtk_drm_probe,
522 .remove = mtk_drm_remove,
523 .driver = {
524 .name = "mediatek-drm",
525 .of_match_table = mtk_drm_of_ids,
526 .pm = &mtk_drm_pm_ops,
527 },
528};
529
530static struct platform_driver * const mtk_drm_drivers[] = {
531 &mtk_ddp_driver,
532 &mtk_disp_ovl_driver,
533 &mtk_disp_rdma_driver,
Jie Qiu9e629c12016-01-04 18:36:36 +0100534 &mtk_dpi_driver,
CK Hu119f5172016-01-04 18:36:34 +0100535 &mtk_drm_platform_driver,
CK Hu2e54c142016-01-04 18:36:35 +0100536 &mtk_dsi_driver,
537 &mtk_mipi_tx_driver,
CK Hu119f5172016-01-04 18:36:34 +0100538};
539
540static int __init mtk_drm_init(void)
541{
542 int ret;
543 int i;
544
545 for (i = 0; i < ARRAY_SIZE(mtk_drm_drivers); i++) {
546 ret = platform_driver_register(mtk_drm_drivers[i]);
547 if (ret < 0) {
548 pr_err("Failed to register %s driver: %d\n",
549 mtk_drm_drivers[i]->driver.name, ret);
550 goto err;
551 }
552 }
553
554 return 0;
555
556err:
557 while (--i >= 0)
558 platform_driver_unregister(mtk_drm_drivers[i]);
559
560 return ret;
561}
562
563static void __exit mtk_drm_exit(void)
564{
565 int i;
566
567 for (i = ARRAY_SIZE(mtk_drm_drivers) - 1; i >= 0; i--)
568 platform_driver_unregister(mtk_drm_drivers[i]);
569}
570
571module_init(mtk_drm_init);
572module_exit(mtk_drm_exit);
573
574MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
575MODULE_DESCRIPTION("Mediatek SoC DRM driver");
576MODULE_LICENSE("GPL v2");