blob: facb950c4bec4ab2c6e72cace666c2c58f21ea3d [file] [log] [blame]
Peter De Schrijver64c4e9f2011-12-14 17:03:26 +02001/dts-v1/;
2
3/include/ "tegra30.dtsi"
4
5/ {
6 model = "NVIDIA Tegra30 Cardhu evaluation board";
7 compatible = "nvidia,cardhu", "nvidia,tegra30";
8
9 memory {
10 reg = < 0x80000000 0x40000000 >;
11 };
12
Stephen Warrene5cbeef2012-03-13 13:28:02 -060013 pinmux@70000000 {
14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>;
16
17 state_default: pinmux {
18 sdmmc1_clk_pz0 {
19 nvidia,pins = "sdmmc1_clk_pz0";
20 nvidia,function = "sdmmc1";
21 nvidia,pull = <0>;
22 nvidia,tristate = <0>;
23 };
24 sdmmc1_cmd_pz1 {
25 nvidia,pins = "sdmmc1_cmd_pz1",
26 "sdmmc1_dat0_py7",
27 "sdmmc1_dat1_py6",
28 "sdmmc1_dat2_py5",
29 "sdmmc1_dat3_py4";
30 nvidia,function = "sdmmc1";
31 nvidia,pull = <2>;
32 nvidia,tristate = <0>;
33 };
34 sdmmc4_clk_pcc4 {
35 nvidia,pins = "sdmmc4_clk_pcc4",
36 "sdmmc4_rst_n_pcc3";
37 nvidia,function = "sdmmc4";
38 nvidia,pull = <0>;
39 nvidia,tristate = <0>;
40 };
41 sdmmc4_dat0_paa0 {
42 nvidia,pins = "sdmmc4_dat0_paa0",
43 "sdmmc4_dat1_paa1",
44 "sdmmc4_dat2_paa2",
45 "sdmmc4_dat3_paa3",
46 "sdmmc4_dat4_paa4",
47 "sdmmc4_dat5_paa5",
48 "sdmmc4_dat6_paa6",
49 "sdmmc4_dat7_paa7";
50 nvidia,function = "sdmmc4";
51 nvidia,pull = <2>;
52 nvidia,tristate = <0>;
53 };
Stephen Warren8c6a3852012-03-27 12:41:37 -060054 dap2_fs_pa2 {
55 nvidia,pins = "dap2_fs_pa2",
56 "dap2_sclk_pa3",
57 "dap2_din_pa4",
58 "dap2_dout_pa5";
59 nvidia,function = "i2s1";
60 nvidia,pull = <0>;
61 nvidia,tristate = <0>;
62 };
Stephen Warrene5cbeef2012-03-13 13:28:02 -060063 };
64 };
65
Peter De Schrijver64c4e9f2011-12-14 17:03:26 +020066 serial@70006000 {
67 clock-frequency = < 408000000 >;
68 };
69
Stephen Warren8c690fd2012-02-02 12:24:19 -070070 serial@70006040 {
71 status = "disable";
72 };
73
74 serial@70006200 {
75 status = "disable";
76 };
77
78 serial@70006300 {
79 status = "disable";
80 };
81
82 serial@70006400 {
83 status = "disable";
84 };
85
Peter De Schrijver64c4e9f2011-12-14 17:03:26 +020086 i2c@7000c000 {
87 clock-frequency = <100000>;
88 };
89
90 i2c@7000c400 {
91 clock-frequency = <100000>;
92 };
93
94 i2c@7000c500 {
95 clock-frequency = <100000>;
Laxman Dewanganb46b0b52012-04-23 17:41:36 +053096
97 /* ALS and Proximity sensor */
98 isl29028@44 {
99 compatible = "isil,isl29028";
100 reg = <0x44>;
101 interrupt-parent = <&gpio>;
102 interrupts = <88 0x04>; /*gpio PL0 */
103 };
Peter De Schrijver64c4e9f2011-12-14 17:03:26 +0200104 };
105
106 i2c@7000c700 {
107 clock-frequency = <100000>;
108 };
109
110 i2c@7000d000 {
111 clock-frequency = <100000>;
Stephen Warren8c6a3852012-03-27 12:41:37 -0600112
113 wm8903: wm8903@1a {
114 compatible = "wlf,wm8903";
115 reg = <0x1a>;
116 interrupt-parent = <&gpio>;
117 interrupts = <179 0x04>; /* gpio PW3 */
118
119 gpio-controller;
120 #gpio-cells = <2>;
121
122 micdet-cfg = <0>;
123 micdet-delay = <100>;
124 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
125 };
Peter De Schrijver64c4e9f2011-12-14 17:03:26 +0200126 };
Stephen Warren850c4c82012-02-01 16:29:57 -0700127
128 sdhci@78000000 {
129 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
130 wp-gpios = <&gpio 155 0>; /* gpio PT3 */
131 power-gpios = <&gpio 31 0>; /* gpio PD7 */
132 };
133
134 sdhci@78000200 {
135 status = "disable";
136 };
137
138 sdhci@78000400 {
139 status = "disable";
140 };
141
142 sdhci@78000400 {
143 support-8bit;
144 };
Stephen Warren8c6a3852012-03-27 12:41:37 -0600145
146 ahub@70080000 {
147 i2s@70080300 {
148 status = "disable";
149 };
150
151 i2s@70080500 {
152 status = "disable";
153 };
154
155 i2s@70080600 {
156 status = "disable";
157 };
158
159 i2s@70080700 {
160 status = "disable";
161 };
162 };
163
164 sound {
165 compatible = "nvidia,tegra-audio-wm8903-cardhu",
166 "nvidia,tegra-audio-wm8903";
167 nvidia,model = "NVIDIA Tegra Cardhu";
168
169 nvidia,audio-routing =
170 "Headphone Jack", "HPOUTR",
171 "Headphone Jack", "HPOUTL",
172 "Int Spk", "ROP",
173 "Int Spk", "RON",
174 "Int Spk", "LOP",
175 "Int Spk", "LON",
176 "Mic Jack", "MICBIAS",
177 "IN1L", "Mic Jack";
178
179 nvidia,i2s-controller = <&tegra_i2s1>;
180 nvidia,audio-codec = <&wm8903>;
181
182 nvidia,spkr-en-gpios = <&wm8903 2 0>;
183 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
184 };
Peter De Schrijver64c4e9f2011-12-14 17:03:26 +0200185};