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Vinayak Holikattie0eca632013-02-25 21:44:33 +05301/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Vinayak Holikattie0eca632013-02-25 21:44:33 +05307 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
48#include <linux/workqueue.h>
49#include <linux/errno.h>
50#include <linux/types.h>
51#include <linux/wait.h>
52#include <linux/bitops.h>
53#include <linux/pm_runtime.h>
54#include <linux/clk.h>
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053055#include <linux/completion.h>
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030056#include <linux/regulator/consumer.h>
Yaniv Gardif37aabc2016-03-10 17:37:20 +020057#include "unipro.h"
Vinayak Holikattie0eca632013-02-25 21:44:33 +053058
59#include <asm/irq.h>
60#include <asm/byteorder.h>
61#include <scsi/scsi.h>
62#include <scsi/scsi_cmnd.h>
63#include <scsi/scsi_host.h>
64#include <scsi/scsi_tcq.h>
65#include <scsi/scsi_dbg.h>
66#include <scsi/scsi_eh.h>
67
68#include "ufs.h"
69#include "ufshci.h"
70
71#define UFSHCD "ufshcd"
72#define UFSHCD_DRIVER_VERSION "0.2"
73
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030074struct ufs_hba;
75
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053076enum dev_cmd_type {
77 DEV_CMD_TYPE_NOP = 0x0,
Dolev Raviv68078d52013-07-30 00:35:58 +053078 DEV_CMD_TYPE_QUERY = 0x1,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053079};
80
Vinayak Holikattie0eca632013-02-25 21:44:33 +053081/**
82 * struct uic_command - UIC command structure
83 * @command: UIC command
84 * @argument1: UIC command argument 1
85 * @argument2: UIC command argument 2
86 * @argument3: UIC command argument 3
87 * @cmd_active: Indicate if UIC command is outstanding
88 * @result: UIC command result
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053089 * @done: UIC command completion
Vinayak Holikattie0eca632013-02-25 21:44:33 +053090 */
91struct uic_command {
92 u32 command;
93 u32 argument1;
94 u32 argument2;
95 u32 argument3;
96 int cmd_active;
97 int result;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053098 struct completion done;
Vinayak Holikattie0eca632013-02-25 21:44:33 +053099};
100
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300101/* Used to differentiate the power management options */
102enum ufs_pm_op {
103 UFS_RUNTIME_PM,
104 UFS_SYSTEM_PM,
105 UFS_SHUTDOWN_PM,
106};
107
108#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
109#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
110#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
111
112/* Host <-> Device UniPro Link state */
113enum uic_link_state {
114 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
115 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
116 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
117};
118
119#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
120#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
121 UIC_LINK_ACTIVE_STATE)
122#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
123 UIC_LINK_HIBERN8_STATE)
124#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
125#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
126 UIC_LINK_ACTIVE_STATE)
127#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
128 UIC_LINK_HIBERN8_STATE)
129
130/*
131 * UFS Power management levels.
132 * Each level is in increasing order of power savings.
133 */
134enum ufs_pm_level {
135 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
136 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
137 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
138 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
139 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
141 UFS_PM_LVL_MAX
142};
143
144struct ufs_pm_lvl_states {
145 enum ufs_dev_pwr_mode dev_state;
146 enum uic_link_state link_state;
147};
148
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530149/**
150 * struct ufshcd_lrb - local reference block
151 * @utr_descriptor_ptr: UTRD address of the command
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530152 * @ucd_req_ptr: UCD address of the command
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530153 * @ucd_rsp_ptr: Response UPIU address for this command
154 * @ucd_prdt_ptr: PRDT address of the command
155 * @cmd: pointer to SCSI command
156 * @sense_buffer: pointer to sense buffer address of the SCSI command
157 * @sense_bufflen: Length of the sense buffer
158 * @scsi_status: SCSI status of the command
159 * @command_type: SCSI, UFS, Query.
160 * @task_tag: Task tag of the command
161 * @lun: LUN of the command
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530162 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530163 */
164struct ufshcd_lrb {
165 struct utp_transfer_req_desc *utr_descriptor_ptr;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530166 struct utp_upiu_req *ucd_req_ptr;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530167 struct utp_upiu_rsp *ucd_rsp_ptr;
168 struct ufshcd_sg_entry *ucd_prdt_ptr;
169
170 struct scsi_cmnd *cmd;
171 u8 *sense_buffer;
172 unsigned int sense_bufflen;
173 int scsi_status;
174
175 int command_type;
176 int task_tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +0300177 u8 lun; /* UPIU LUN id field is only 8-bit wide */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530178 bool intr_cmd;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530179};
180
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530181/**
Tomas Winklera230c2f2016-02-09 10:25:41 +0200182 * struct ufs_query - holds relevant data structures for query request
Dolev Raviv68078d52013-07-30 00:35:58 +0530183 * @request: request upiu and function
184 * @descriptor: buffer for sending/receiving descriptor
185 * @response: response upiu and response
186 */
187struct ufs_query {
188 struct ufs_query_req request;
189 u8 *descriptor;
190 struct ufs_query_res response;
191};
192
193/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530194 * struct ufs_dev_cmd - all assosiated fields with device management commands
195 * @type: device management command type - Query, NOP OUT
196 * @lock: lock to allow one command at a time
197 * @complete: internal commands completion
198 * @tag_wq: wait queue until free command slot is available
199 */
200struct ufs_dev_cmd {
201 enum dev_cmd_type type;
202 struct mutex lock;
203 struct completion *complete;
204 wait_queue_head_t tag_wq;
Dolev Raviv68078d52013-07-30 00:35:58 +0530205 struct ufs_query query;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530206};
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530207
Potomski, MichalXe1928452017-02-23 09:05:30 +0000208struct ufs_desc_size {
209 int dev_desc;
210 int pwr_desc;
211 int geom_desc;
212 int interc_desc;
213 int unit_desc;
214 int conf_desc;
215};
216
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300217/**
218 * struct ufs_clk_info - UFS clock related info
219 * @list: list headed by hba->clk_list_head
220 * @clk: clock node
221 * @name: clock name
222 * @max_freq: maximum frequency supported by the clock
Sahitya Tummala4cff6d992014-09-25 15:32:33 +0300223 * @min_freq: min frequency that can be used for clock scaling
Sahitya Tummala856b3482014-09-25 15:32:34 +0300224 * @curr_freq: indicates the current frequency that it is set to
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300225 * @enabled: variable to check against multiple enable/disable
226 */
227struct ufs_clk_info {
228 struct list_head list;
229 struct clk *clk;
230 const char *name;
231 u32 max_freq;
Sahitya Tummala4cff6d992014-09-25 15:32:33 +0300232 u32 min_freq;
Sahitya Tummala856b3482014-09-25 15:32:34 +0300233 u32 curr_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300234 bool enabled;
235};
236
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200237enum ufs_notify_change_status {
238 PRE_CHANGE,
239 POST_CHANGE,
240};
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300241
242struct ufs_pa_layer_attr {
243 u32 gear_rx;
244 u32 gear_tx;
245 u32 lane_rx;
246 u32 lane_tx;
247 u32 pwr_rx;
248 u32 pwr_tx;
249 u32 hs_rate;
250};
251
252struct ufs_pwr_mode_info {
253 bool is_valid;
254 struct ufs_pa_layer_attr info;
255};
256
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300257/**
258 * struct ufs_hba_variant_ops - variant specific callbacks
259 * @name: variant name
260 * @init: called when the driver is initialized
261 * @exit: called to cleanup everything done in init
Yaniv Gardi9949e702015-05-17 18:55:05 +0300262 * @get_ufs_hci_version: called to get UFS HCI version
Sahitya Tummala856b3482014-09-25 15:32:34 +0300263 * @clk_scale_notify: notifies that clks are scaled up/down
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300264 * @setup_clocks: called before touching any of the controller registers
265 * @setup_regulators: called before accessing the host controller
266 * @hce_enable_notify: called before and after HCE enable bit is set to allow
267 * variant specific Uni-Pro initialization.
268 * @link_startup_notify: called before and after Link startup is carried out
269 * to allow variant specific Uni-Pro initialization.
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300270 * @pwr_change_notify: called before and after a power mode change
271 * is carried out to allow vendor spesific capabilities
272 * to be set.
Subhash Jadavanibedc6292017-04-04 19:32:13 +0000273 * @apply_dev_quirks: called to apply device specific quirks
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300274 * @suspend: called during host controller PM callback
275 * @resume: called during host controller PM callback
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200276 * @dbg_register_dump: used to dump controller debug information
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100277 * @phy_initialization: used to initialize phys
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300278 */
279struct ufs_hba_variant_ops {
280 const char *name;
281 int (*init)(struct ufs_hba *);
282 void (*exit)(struct ufs_hba *);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300283 u32 (*get_ufs_hci_version)(struct ufs_hba *);
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200284 int (*clk_scale_notify)(struct ufs_hba *, bool,
285 enum ufs_notify_change_status);
286 int (*setup_clocks)(struct ufs_hba *, bool);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300287 int (*setup_regulators)(struct ufs_hba *, bool);
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200288 int (*hce_enable_notify)(struct ufs_hba *,
289 enum ufs_notify_change_status);
290 int (*link_startup_notify)(struct ufs_hba *,
291 enum ufs_notify_change_status);
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300292 int (*pwr_change_notify)(struct ufs_hba *,
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200293 enum ufs_notify_change_status status,
294 struct ufs_pa_layer_attr *,
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300295 struct ufs_pa_layer_attr *);
Subhash Jadavanibedc6292017-04-04 19:32:13 +0000296 int (*apply_dev_quirks)(struct ufs_hba *);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300297 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
298 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200299 void (*dbg_register_dump)(struct ufs_hba *hba);
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100300 int (*phy_initialization)(struct ufs_hba *);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300301};
302
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300303/* clock gating state */
304enum clk_gating_state {
305 CLKS_OFF,
306 CLKS_ON,
307 REQ_CLKS_OFF,
308 REQ_CLKS_ON,
309};
310
311/**
312 * struct ufs_clk_gating - UFS clock gating related info
313 * @gate_work: worker to turn off clocks after some delay as specified in
314 * delay_ms
315 * @ungate_work: worker to turn on clocks that will be used in case of
316 * interrupt context
317 * @state: the current clocks state
318 * @delay_ms: gating delay in ms
319 * @is_suspended: clk gating is suspended when set to 1 which can be used
320 * during suspend/resume
321 * @delay_attr: sysfs attribute to control delay_attr
322 * @active_reqs: number of requests that are pending and should be waited for
323 * completion before gating clocks.
324 */
325struct ufs_clk_gating {
326 struct delayed_work gate_work;
327 struct work_struct ungate_work;
328 enum clk_gating_state state;
329 unsigned long delay_ms;
330 bool is_suspended;
331 struct device_attribute delay_attr;
332 int active_reqs;
333};
334
Sahitya Tummala856b3482014-09-25 15:32:34 +0300335struct ufs_clk_scaling {
336 ktime_t busy_start_t;
337 bool is_busy_started;
338 unsigned long tot_busy_t;
339 unsigned long window_start_t;
340};
341
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530342/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300343 * struct ufs_init_prefetch - contains data that is pre-fetched once during
344 * initialization
345 * @icc_level: icc level which was read during initialization
346 */
347struct ufs_init_prefetch {
348 u32 icc_level;
349};
350
351/**
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530352 * struct ufs_hba - per adapter private structure
353 * @mmio_base: UFSHCI base register address
354 * @ucdl_base_addr: UFS Command Descriptor base address
355 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
356 * @utmrdl_base_addr: UTP Task Management Descriptor base address
357 * @ucdl_dma_addr: UFS Command Descriptor DMA address
358 * @utrdl_dma_addr: UTRDL DMA address
359 * @utmrdl_dma_addr: UTMRDL DMA address
360 * @host: Scsi_Host instance of the driver
361 * @dev: device handle
362 * @lrb: local reference block
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530363 * @lrb_in_use: lrb in use
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530364 * @outstanding_tasks: Bits representing outstanding task requests
365 * @outstanding_reqs: Bits representing outstanding transfer requests
366 * @capabilities: UFS Controller Capabilities
367 * @nutrs: Transfer Request Queue depth supported by controller
368 * @nutmrs: Task Management Queue depth supported by controller
369 * @ufs_version: UFS Version to which controller complies
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300370 * @vops: pointer to variant specific operations
371 * @priv: pointer to variant specific private data
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530372 * @irq: Irq number of the controller
373 * @active_uic_cmd: handle of active UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530374 * @uic_cmd_mutex: mutex for uic command
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530375 * @tm_wq: wait queue for task management
376 * @tm_tag_wq: wait queue for free task management slots
377 * @tm_slots_in_use: bit map of task management request slots in use
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +0530378 * @pwr_done: completion for power mode change
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530379 * @tm_condition: condition variable for task management
380 * @ufshcd_state: UFSHCD states
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530381 * @eh_flags: Error handling flags
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530382 * @intr_mask: Interrupt Mask Bits
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530383 * @ee_ctrl_mask: Exception event control mask
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300384 * @is_powered: flag to check if HBA is powered
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300385 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
386 * @init_prefetch_data: data pre-fetched during initialization
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530387 * @eh_work: Worker to handle UFS errors that require s/w attention
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530388 * @eeh_work: Worker to handle exception events
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530389 * @errors: HBA errors
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530390 * @uic_error: UFS interconnect layer error status
391 * @saved_err: sticky error mask
392 * @saved_uic_err: sticky UIC error mask
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530393 * @dev_cmd: ufs device management command information
Yaniv Gardicad2e032015-03-31 17:37:14 +0300394 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530395 * @auto_bkops_enabled: to track whether bkops is enabled in device
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300396 * @vreg_info: UFS device voltage regulator information
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300397 * @clk_list_head: UFS host controller clocks list node head
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300398 * @pwr_info: holds current power mode
399 * @max_pwr_info: keeps the device max valid pwm
Potomski, MichalXe1928452017-02-23 09:05:30 +0000400 * @desc_size: descriptor sizes reported by device
Yaniv Gardiafdfff52016-03-10 17:37:15 +0200401 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
402 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
403 * device is known or not.
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530404 */
405struct ufs_hba {
406 void __iomem *mmio_base;
407
408 /* Virtual memory reference */
409 struct utp_transfer_cmd_desc *ucdl_base_addr;
410 struct utp_transfer_req_desc *utrdl_base_addr;
411 struct utp_task_req_desc *utmrdl_base_addr;
412
413 /* DMA memory reference */
414 dma_addr_t ucdl_dma_addr;
415 dma_addr_t utrdl_dma_addr;
416 dma_addr_t utmrdl_dma_addr;
417
418 struct Scsi_Host *host;
419 struct device *dev;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +0300420 /*
421 * This field is to keep a reference to "scsi_device" corresponding to
422 * "UFS device" W-LU.
423 */
424 struct scsi_device *sdev_ufs_device;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530425
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300426 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
427 enum uic_link_state uic_link_state;
428 /* Desired UFS power management level during runtime PM */
429 enum ufs_pm_level rpm_lvl;
430 /* Desired UFS power management level during system PM */
431 enum ufs_pm_level spm_lvl;
432 int pm_op_in_progress;
433
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530434 struct ufshcd_lrb *lrb;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530435 unsigned long lrb_in_use;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530436
437 unsigned long outstanding_tasks;
438 unsigned long outstanding_reqs;
439
440 u32 capabilities;
441 int nutrs;
442 int nutmrs;
443 u32 ufs_version;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300444 struct ufs_hba_variant_ops *vops;
445 void *priv;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530446 unsigned int irq;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300447 bool is_irq_enabled;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530448
Yaniv Gardib8521902015-05-17 18:54:57 +0300449 /* Interrupt aggregation support is broken */
450 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
451
Yaniv Gardicad2e032015-03-31 17:37:14 +0300452 /*
453 * delay before each dme command is required as the unipro
454 * layer has shown instabilities
455 */
Yaniv Gardib8521902015-05-17 18:54:57 +0300456 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
457
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +0300458 /*
459 * If UFS host controller is having issue in processing LCC (Line
460 * Control Command) coming from device then enable this quirk.
461 * When this quirk is enabled, host controller driver should disable
462 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
463 * attribute of device to 0).
464 */
465 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
Yaniv Gardicad2e032015-03-31 17:37:14 +0300466
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +0300467 /*
468 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
469 * inbound Link supports unterminated line in HS mode. Setting this
470 * attribute to 1 fixes moving to HS gear.
471 */
472 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
473
Yaniv Gardi874237f2015-05-17 18:55:03 +0300474 /*
475 * This quirk needs to be enabled if the host contoller only allows
476 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
477 * SLOW AUTO).
478 */
479 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
480
Yaniv Gardi9949e702015-05-17 18:55:05 +0300481 /*
482 * This quirk needs to be enabled if the host contoller doesn't
483 * advertise the correct version in UFS_VER register. If this quirk
484 * is enabled, standard UFS host driver will call the vendor specific
485 * ops (get_ufs_hci_version) to get the correct version.
486 */
487 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
488
Kiwoong Kim9b41ed72017-04-04 19:32:05 +0000489 /*
490 * This quirk needs to be enabled if the host contoller regards
491 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
492 */
493 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN UFS_BIT(7)
494
Yaniv Gardicad2e032015-03-31 17:37:14 +0300495 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530496
Yaniv Gardic58ab7a2016-03-10 17:37:10 +0200497 /* Device deviations from standard UFS device spec. */
498 unsigned int dev_quirks;
499
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530500 wait_queue_head_t tm_wq;
501 wait_queue_head_t tm_tag_wq;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530502 unsigned long tm_condition;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530503 unsigned long tm_slots_in_use;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530504
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300505 struct uic_command *active_uic_cmd;
506 struct mutex uic_cmd_mutex;
507 struct completion *uic_async_done;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +0530508
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530509 u32 ufshcd_state;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530510 u32 eh_flags;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530511 u32 intr_mask;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530512 u16 ee_ctrl_mask;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300513 bool is_powered;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300514 bool is_init_prefetch;
515 struct ufs_init_prefetch init_prefetch_data;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530516
517 /* Work Queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530518 struct work_struct eh_work;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530519 struct work_struct eeh_work;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530520
521 /* HBA Errors */
522 u32 errors;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530523 u32 uic_error;
524 u32 saved_err;
525 u32 saved_uic_err;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530526
527 /* Device management request data */
528 struct ufs_dev_cmd dev_cmd;
Yaniv Gardicad2e032015-03-31 17:37:14 +0300529 ktime_t last_dme_cmd_tstamp;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530530
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300531 /* Keeps information of the UFS device connected to this host */
532 struct ufs_dev_info dev_info;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530533 bool auto_bkops_enabled;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300534 struct ufs_vreg_info vreg_info;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300535 struct list_head clk_list_head;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300536
537 bool wlun_dev_clr_ua;
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300538
Yaniv Gardi54b879b2016-03-10 17:37:05 +0200539 /* Number of lanes available (1 or 2) for Rx/Tx */
540 u32 lanes_per_direction;
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300541 struct ufs_pa_layer_attr pwr_info;
542 struct ufs_pwr_mode_info max_pwr_info;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300543
544 struct ufs_clk_gating clk_gating;
545 /* Control to enable/disable host capabilities */
546 u32 caps;
547 /* Allow dynamic clk gating */
548#define UFSHCD_CAP_CLK_GATING (1 << 0)
549 /* Allow hiberb8 with clk gating */
550#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300551 /* Allow dynamic clk scaling */
552#define UFSHCD_CAP_CLK_SCALING (1 << 2)
Subhash Jadavani374a2462014-09-25 15:32:35 +0300553 /* Allow auto bkops to enabled during runtime suspend */
554#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
Yaniv Gardib8521902015-05-17 18:54:57 +0300555 /*
556 * This capability allows host controller driver to use the UFS HCI's
557 * interrupt aggregation capability.
558 * CAUTION: Enabling this might reduce overall UFS throughput.
559 */
560#define UFSHCD_CAP_INTR_AGGR (1 << 4)
subhashj@codeaurora.orgcfb09f02016-12-22 18:41:22 -0800561 /*
562 * This capability allows the device auto-bkops to be always enabled
563 * except during suspend (both runtime and suspend).
564 * Enabling this capability means that device will always be allowed
565 * to do background operation when it's active but it might degrade
566 * the performance of ongoing read/write operations.
567 */
568#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300569
570 struct devfreq *devfreq;
571 struct ufs_clk_scaling clk_scaling;
Dolev Ravive7850602014-09-25 15:32:36 +0300572 bool is_sys_suspended;
Yaniv Gardiafdfff52016-03-10 17:37:15 +0200573
574 enum bkops_status urgent_bkops_lvl;
575 bool is_urgent_bkops_lvl_checked;
Potomski, MichalXe1928452017-02-23 09:05:30 +0000576
577 struct ufs_desc_size desc_size;
Greg Kroah-Hartman42a730a2018-06-06 18:34:12 +0200578
Mohan Srinivasane2d88782016-12-14 15:55:36 -0800579 int latency_hist_enabled;
Hyojun Kim11537d52017-12-21 09:57:41 -0800580 struct io_latency_state io_lat_read;
581 struct io_latency_state io_lat_write;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530582};
583
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300584/* Returns true if clocks can be gated. Otherwise false */
585static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
586{
587 return hba->caps & UFSHCD_CAP_CLK_GATING;
588}
589static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
590{
591 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
592}
Sahitya Tummala856b3482014-09-25 15:32:34 +0300593static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba)
594{
595 return hba->caps & UFSHCD_CAP_CLK_SCALING;
596}
Subhash Jadavani374a2462014-09-25 15:32:35 +0300597static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
598{
599 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
600}
601
Yaniv Gardib8521902015-05-17 18:54:57 +0300602static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
603{
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100604/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
605#ifndef CONFIG_SCSI_UFS_DWC
Yaniv Gardib8521902015-05-17 18:54:57 +0300606 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
607 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
608 return true;
609 else
610 return false;
Joao Pinto4b9ffb52016-05-11 12:21:30 +0100611#else
612return true;
613#endif
Yaniv Gardib8521902015-05-17 18:54:57 +0300614}
615
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530616#define ufshcd_writel(hba, val, reg) \
617 writel((val), (hba)->mmio_base + (reg))
618#define ufshcd_readl(hba, reg) \
619 readl((hba)->mmio_base + (reg))
620
Dolev Ravive7850602014-09-25 15:32:36 +0300621/**
622 * ufshcd_rmwl - read modify write into a register
623 * @hba - per adapter instance
624 * @mask - mask to apply on read value
625 * @val - actual value to write
626 * @reg - register address
627 */
628static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
629{
630 u32 tmp;
631
632 tmp = ufshcd_readl(hba, reg);
633 tmp &= ~mask;
634 tmp |= (val & mask);
635 ufshcd_writel(hba, tmp, reg);
636}
637
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300638int ufshcd_alloc_host(struct device *, struct ufs_hba **);
Yaniv Gardi47555a52015-10-28 13:15:49 +0200639void ufshcd_dealloc_host(struct ufs_hba *);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300640int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530641void ufshcd_remove(struct ufs_hba *);
Yaniv Gardi596585a2016-03-10 17:37:08 +0200642int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
643 u32 val, unsigned long interval_us,
644 unsigned long timeout_ms, bool can_sleep);
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530645
Dolev Raviv68078d52013-07-30 00:35:58 +0530646static inline void check_upiu_size(void)
647{
648 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
649 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
650}
651
Yaniv Gardi1ce58982015-10-28 13:15:47 +0200652/**
653 * ufshcd_set_variant - set variant specific data to the hba
654 * @hba - per adapter instance
655 * @variant - pointer to variant specific data
656 */
657static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
658{
659 BUG_ON(!hba);
660 hba->priv = variant;
661}
662
663/**
664 * ufshcd_get_variant - get variant specific data from the hba
665 * @hba - per adapter instance
666 */
667static inline void *ufshcd_get_variant(struct ufs_hba *hba)
668{
669 BUG_ON(!hba);
670 return hba->priv;
671}
subhashj@codeaurora.orgcfb09f02016-12-22 18:41:22 -0800672static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
673 struct ufs_hba *hba)
674{
675 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
676}
Yaniv Gardi1ce58982015-10-28 13:15:47 +0200677
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530678extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
679extern int ufshcd_runtime_resume(struct ufs_hba *hba);
680extern int ufshcd_runtime_idle(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300681extern int ufshcd_system_suspend(struct ufs_hba *hba);
682extern int ufshcd_system_resume(struct ufs_hba *hba);
683extern int ufshcd_shutdown(struct ufs_hba *hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530684extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
685 u8 attr_set, u32 mib_val, u8 peer);
686extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
687 u32 *mib_val, u8 peer);
688
689/* UIC command interfaces for DME primitives */
690#define DME_LOCAL 0
691#define DME_PEER 1
692#define ATTR_SET_NOR 0 /* NORMAL */
693#define ATTR_SET_ST 1 /* STATIC */
694
695static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
696 u32 mib_val)
697{
698 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
699 mib_val, DME_LOCAL);
700}
701
702static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
703 u32 mib_val)
704{
705 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
706 mib_val, DME_LOCAL);
707}
708
709static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
710 u32 mib_val)
711{
712 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
713 mib_val, DME_PEER);
714}
715
716static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
717 u32 mib_val)
718{
719 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
720 mib_val, DME_PEER);
721}
722
723static inline int ufshcd_dme_get(struct ufs_hba *hba,
724 u32 attr_sel, u32 *mib_val)
725{
726 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
727}
728
729static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
730 u32 attr_sel, u32 *mib_val)
731{
732 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
733}
734
Yaniv Gardib573d482016-03-10 17:37:09 +0200735int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size);
736
Yaniv Gardif37aabc2016-03-10 17:37:20 +0200737static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
738{
739 return (pwr_info->pwr_rx == FAST_MODE ||
740 pwr_info->pwr_rx == FASTAUTO_MODE) &&
741 (pwr_info->pwr_tx == FAST_MODE ||
742 pwr_info->pwr_tx == FASTAUTO_MODE);
743}
744
Yaniv Gardib573d482016-03-10 17:37:09 +0200745#define ASCII_STD true
746
747int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
748 u32 size, bool ascii);
749
Yaniv Gardidc3c8d32016-02-01 15:02:46 +0200750/* Expose Query-Request API */
751int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
752 enum flag_idn idn, bool *flag_res);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300753int ufshcd_hold(struct ufs_hba *hba, bool async);
754void ufshcd_release(struct ufs_hba *hba);
Potomski, MichalXe1928452017-02-23 09:05:30 +0000755
756int ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
757 int *desc_length);
758
Yaniv Gardi37113102016-03-10 17:37:16 +0200759u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200760
761/* Wrapper functions for safely calling variant operations */
762static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
763{
764 if (hba->vops)
765 return hba->vops->name;
766 return "";
767}
768
769static inline int ufshcd_vops_init(struct ufs_hba *hba)
770{
771 if (hba->vops && hba->vops->init)
772 return hba->vops->init(hba);
773
774 return 0;
775}
776
777static inline void ufshcd_vops_exit(struct ufs_hba *hba)
778{
779 if (hba->vops && hba->vops->exit)
780 return hba->vops->exit(hba);
781}
782
783static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
784{
785 if (hba->vops && hba->vops->get_ufs_hci_version)
786 return hba->vops->get_ufs_hci_version(hba);
787
788 return ufshcd_readl(hba, REG_UFS_VERSION);
789}
790
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200791static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
792 bool up, enum ufs_notify_change_status status)
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200793{
794 if (hba->vops && hba->vops->clk_scale_notify)
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200795 return hba->vops->clk_scale_notify(hba, up, status);
796 return 0;
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200797}
798
799static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on)
800{
801 if (hba->vops && hba->vops->setup_clocks)
802 return hba->vops->setup_clocks(hba, on);
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200803 return 0;
804}
805
806static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
807{
808 if (hba->vops && hba->vops->setup_regulators)
809 return hba->vops->setup_regulators(hba, status);
810
811 return 0;
812}
813
814static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
815 bool status)
816{
817 if (hba->vops && hba->vops->hce_enable_notify)
818 return hba->vops->hce_enable_notify(hba, status);
819
820 return 0;
821}
822static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
823 bool status)
824{
825 if (hba->vops && hba->vops->link_startup_notify)
826 return hba->vops->link_startup_notify(hba, status);
827
828 return 0;
829}
830
831static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
832 bool status,
833 struct ufs_pa_layer_attr *dev_max_params,
834 struct ufs_pa_layer_attr *dev_req_params)
835{
836 if (hba->vops && hba->vops->pwr_change_notify)
837 return hba->vops->pwr_change_notify(hba, status,
838 dev_max_params, dev_req_params);
839
840 return -ENOTSUPP;
841}
842
Subhash Jadavanibedc6292017-04-04 19:32:13 +0000843static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
844{
845 if (hba->vops && hba->vops->apply_dev_quirks)
846 return hba->vops->apply_dev_quirks(hba);
847 return 0;
848}
849
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200850static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
851{
852 if (hba->vops && hba->vops->suspend)
853 return hba->vops->suspend(hba, op);
854
855 return 0;
856}
857
858static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
859{
860 if (hba->vops && hba->vops->resume)
861 return hba->vops->resume(hba, op);
862
863 return 0;
864}
865
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200866static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
867{
868 if (hba->vops && hba->vops->dbg_register_dump)
869 hba->vops->dbg_register_dump(hba);
870}
871
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530872#endif /* End of Header */