blob: 84f91284f6128844366d68b5d77e68a1ae59145f [file] [log] [blame]
Russell Kinga09e64f2008-08-05 16:14:15 +01001/*
2 * arch/arm/mach-netx/include/mach/uncompress.h
3 *
4 * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20/*
21 * The following code assumes the serial port has already been
22 * initialized by the bootloader. We search for the first enabled
23 * port in the most probable order. If you didn't setup a port in
24 * your bootloader then nothing will appear (which might be desired).
25 *
26 * This does not append a newline
27 */
28
29#define REG(x) (*(volatile unsigned long *)(x))
30
31#define UART1_BASE 0x100a00
32#define UART2_BASE 0x100a80
33
34#define UART_DR 0x0
35
36#define UART_CR 0x14
37#define CR_UART_EN (1<<0)
38
39#define UART_FR 0x18
40#define FR_BUSY (1<<3)
41#define FR_TXFF (1<<5)
42
43static void putc(char c)
44{
45 unsigned long base;
46
47 if (REG(UART1_BASE + UART_CR) & CR_UART_EN)
48 base = UART1_BASE;
49 else if (REG(UART2_BASE + UART_CR) & CR_UART_EN)
50 base = UART2_BASE;
51 else
52 return;
53
54 while (REG(base + UART_FR) & FR_TXFF);
55 REG(base + UART_DR) = c;
56}
57
58static inline void flush(void)
59{
60 unsigned long base;
61
62 if (REG(UART1_BASE + UART_CR) & CR_UART_EN)
63 base = UART1_BASE;
64 else if (REG(UART2_BASE + UART_CR) & CR_UART_EN)
65 base = UART2_BASE;
66 else
67 return;
68
69 while (REG(base + UART_FR) & FR_BUSY);
70}
71
72/*
73 * nothing to do
74 */
75#define arch_decomp_setup()
76#define arch_decomp_wdog()