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Dmitry Baryshkovf024ff12008-06-27 10:37:57 +01001#ifndef MFD_TMIO_H
2#define MFD_TMIO_H
3
Ian Moltond3a2f712008-07-31 20:44:28 +02004#define tmio_ioread8(addr) readb(addr)
5#define tmio_ioread16(addr) readw(addr)
6#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
7#define tmio_ioread32(addr) \
8 (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
9
10#define tmio_iowrite8(val, addr) writeb((val), (addr))
11#define tmio_iowrite16(val, addr) writew((val), (addr))
12#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
13#define tmio_iowrite32(val, addr) \
14 do { \
15 writew((val), (addr)); \
16 writew((val) >> 16, (addr) + 2); \
17 } while (0)
18
Dmitry Baryshkovf024ff12008-06-27 10:37:57 +010019/*
20 * data for the NAND controller
21 */
22struct tmio_nand_data {
23 struct nand_bbt_descr *badblock_pattern;
24 struct mtd_partition *partition;
25 unsigned int num_partitions;
26};
27
Dmitry Baryshkovf024ff12008-06-27 10:37:57 +010028#endif