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Amit Kucheriaa329b482010-02-04 12:21:53 -08001/*
2 * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 *
11 * This file contains the CPU initialization code.
12 */
13
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
Sascha Hauer54438562010-03-19 10:50:55 +010017#include <linux/module.h>
Amit Kucheriaa329b482010-02-04 12:21:53 -080018#include <mach/hardware.h>
19#include <asm/io.h>
20
Sascha Hauer54438562010-03-19 10:50:55 +010021static int cpu_silicon_rev = -1;
22
23#define SI_REV 0x48
24
25static void query_silicon_parameter(void)
26{
27 void __iomem *rom = ioremap(MX51_IROM_BASE_ADDR, MX51_IROM_SIZE);
28 u32 rev;
29
30 if (!rom) {
31 cpu_silicon_rev = -EINVAL;
32 return;
33 }
34
35 rev = readl(rom + SI_REV);
36 switch (rev) {
37 case 0x1:
38 cpu_silicon_rev = MX51_CHIP_REV_1_0;
39 break;
40 case 0x2:
41 cpu_silicon_rev = MX51_CHIP_REV_1_1;
42 break;
43 case 0x10:
44 cpu_silicon_rev = MX51_CHIP_REV_2_0;
45 break;
46 case 0x20:
47 cpu_silicon_rev = MX51_CHIP_REV_3_0;
48 break;
49 default:
50 cpu_silicon_rev = 0;
51 }
52
53 iounmap(rom);
54}
55
56/*
57 * Returns:
58 * the silicon revision of the cpu
59 * -EINVAL - not a mx51
60 */
61int mx51_revision(void)
62{
63 if (!cpu_is_mx51())
64 return -EINVAL;
65
66 if (cpu_silicon_rev == -1)
67 query_silicon_parameter();
68
69 return cpu_silicon_rev;
70}
71EXPORT_SYMBOL(mx51_revision);
72
Amit Kucheria33d7c5c2010-09-01 22:49:13 +030073#ifdef CONFIG_NEON
74
75/*
76 * All versions of the silicon before Rev. 3 have broken NEON implementations.
77 * Dependent on link order - so the assumption is that vfp_init is called
78 * before us.
79 */
80static int __init mx51_neon_fixup(void)
81{
82 if (mx51_revision() < MX51_CHIP_REV_3_0 && (elf_hwcap & HWCAP_NEON)) {
83 elf_hwcap &= ~HWCAP_NEON;
84 pr_info("Turning off NEON support, detected broken NEON implementation\n");
85 }
86 return 0;
87}
88
89late_initcall(mx51_neon_fixup);
90#endif
91
Amit Kucheriaa329b482010-02-04 12:21:53 -080092static int __init post_cpu_init(void)
93{
94 unsigned int reg;
95 void __iomem *base;
96
97 if (!cpu_is_mx51())
98 return 0;
99
100 base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
101 __raw_writel(0x0, base + 0x40);
102 __raw_writel(0x0, base + 0x44);
103 __raw_writel(0x0, base + 0x48);
104 __raw_writel(0x0, base + 0x4C);
105 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
106 __raw_writel(reg, base + 0x50);
107
108 base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
109 __raw_writel(0x0, base + 0x40);
110 __raw_writel(0x0, base + 0x44);
111 __raw_writel(0x0, base + 0x48);
112 __raw_writel(0x0, base + 0x4C);
113 reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
114 __raw_writel(reg, base + 0x50);
115
116 return 0;
117}
118
119postcore_initcall(post_cpu_init);