blob: 09f46abc730a97274fcf167f045012cdcc4e62fa [file] [log] [blame]
Michael Wuf6532112007-10-14 14:43:16 -04001
2/*
3 * Linux device driver for RTL8180 / RTL8185
4 *
5 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
6 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7 *
8 * Based on the r8180 driver, which is:
9 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10 *
11 * Thanks to Realtek for their support!
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18#include <linux/init.h>
19#include <linux/pci.h>
20#include <linux/delay.h>
21#include <linux/etherdevice.h>
22#include <linux/eeprom_93cx6.h>
23#include <net/mac80211.h>
24
25#include "rtl8180.h"
26#include "rtl8180_rtl8225.h"
27#include "rtl8180_sa2400.h"
28#include "rtl8180_max2820.h"
29#include "rtl8180_grf5101.h"
30
31MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
32MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
33MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
34MODULE_LICENSE("GPL");
35
36static struct pci_device_id rtl8180_table[] __devinitdata = {
37 /* rtl8185 */
38 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
Adrian Bassett4fcc5472008-01-23 16:38:33 +000039 { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
Michael Wuf6532112007-10-14 14:43:16 -040040 { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
41
42 /* rtl8180 */
43 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
44 { PCI_DEVICE(0x1799, 0x6001) },
45 { PCI_DEVICE(0x1799, 0x6020) },
46 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
47 { }
48};
49
50MODULE_DEVICE_TABLE(pci, rtl8180_table);
51
Johannes Berg8318d782008-01-24 19:38:38 +010052static const struct ieee80211_rate rtl818x_rates[] = {
53 { .bitrate = 10, .hw_value = 0, },
54 { .bitrate = 20, .hw_value = 1, },
55 { .bitrate = 55, .hw_value = 2, },
56 { .bitrate = 110, .hw_value = 3, },
57 { .bitrate = 60, .hw_value = 4, },
58 { .bitrate = 90, .hw_value = 5, },
59 { .bitrate = 120, .hw_value = 6, },
60 { .bitrate = 180, .hw_value = 7, },
61 { .bitrate = 240, .hw_value = 8, },
62 { .bitrate = 360, .hw_value = 9, },
63 { .bitrate = 480, .hw_value = 10, },
64 { .bitrate = 540, .hw_value = 11, },
65};
66
67static const struct ieee80211_channel rtl818x_channels[] = {
68 { .center_freq = 2412 },
69 { .center_freq = 2417 },
70 { .center_freq = 2422 },
71 { .center_freq = 2427 },
72 { .center_freq = 2432 },
73 { .center_freq = 2437 },
74 { .center_freq = 2442 },
75 { .center_freq = 2447 },
76 { .center_freq = 2452 },
77 { .center_freq = 2457 },
78 { .center_freq = 2462 },
79 { .center_freq = 2467 },
80 { .center_freq = 2472 },
81 { .center_freq = 2484 },
82};
83
84
85
86
Michael Wuf6532112007-10-14 14:43:16 -040087void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
88{
89 struct rtl8180_priv *priv = dev->priv;
90 int i = 10;
91 u32 buf;
92
93 buf = (data << 8) | addr;
94
95 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
96 while (i--) {
97 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
98 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
99 return;
100 }
101}
102
103static void rtl8180_handle_rx(struct ieee80211_hw *dev)
104{
105 struct rtl8180_priv *priv = dev->priv;
106 unsigned int count = 32;
107
108 while (count--) {
109 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
110 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
111 u32 flags = le32_to_cpu(entry->flags);
112
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300113 if (flags & RTL818X_RX_DESC_FLAG_OWN)
Michael Wuf6532112007-10-14 14:43:16 -0400114 return;
115
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300116 if (unlikely(flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL |
117 RTL818X_RX_DESC_FLAG_FOF |
118 RTL818X_RX_DESC_FLAG_RX_ERR)))
Michael Wuf6532112007-10-14 14:43:16 -0400119 goto done;
120 else {
121 u32 flags2 = le32_to_cpu(entry->flags2);
122 struct ieee80211_rx_status rx_status = {0};
123 struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
124
125 if (unlikely(!new_skb))
126 goto done;
127
128 pci_unmap_single(priv->pdev,
129 *((dma_addr_t *)skb->cb),
130 MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
131 skb_put(skb, flags & 0xFFF);
132
133 rx_status.antenna = (flags2 >> 15) & 1;
134 /* TODO: improve signal/rssi reporting */
Bruno Randolf566bfe52008-05-08 19:15:40 +0200135 rx_status.qual = flags2 & 0xFF;
136 rx_status.signal = (flags2 >> 8) & 0x7F;
Johannes Berg8318d782008-01-24 19:38:38 +0100137 /* XXX: is this correct? */
138 rx_status.rate_idx = (flags >> 20) & 0xF;
139 rx_status.freq = dev->conf.channel->center_freq;
140 rx_status.band = dev->conf.channel->band;
Michael Wuf6532112007-10-14 14:43:16 -0400141 rx_status.mactime = le64_to_cpu(entry->tsft);
142 rx_status.flag |= RX_FLAG_TSFT;
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300143 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
Michael Wuf6532112007-10-14 14:43:16 -0400144 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
145
Johannes Bergf1d58c22009-06-17 13:13:00 +0200146 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
147 ieee80211_rx_irqsafe(dev, skb);
Michael Wuf6532112007-10-14 14:43:16 -0400148
149 skb = new_skb;
150 priv->rx_buf[priv->rx_idx] = skb;
151 *((dma_addr_t *) skb->cb) =
152 pci_map_single(priv->pdev, skb_tail_pointer(skb),
153 MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
154 }
155
156 done:
157 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300158 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
Michael Wuf6532112007-10-14 14:43:16 -0400159 MAX_RX_SIZE);
160 if (priv->rx_idx == 31)
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300161 entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
Michael Wuf6532112007-10-14 14:43:16 -0400162 priv->rx_idx = (priv->rx_idx + 1) % 32;
163 }
164}
165
166static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
167{
168 struct rtl8180_priv *priv = dev->priv;
169 struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
170
171 while (skb_queue_len(&ring->queue)) {
172 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
173 struct sk_buff *skb;
Johannes Berge039fa42008-05-15 12:55:29 +0200174 struct ieee80211_tx_info *info;
Michael Wuf6532112007-10-14 14:43:16 -0400175 u32 flags = le32_to_cpu(entry->flags);
176
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300177 if (flags & RTL818X_TX_DESC_FLAG_OWN)
Michael Wuf6532112007-10-14 14:43:16 -0400178 return;
179
180 ring->idx = (ring->idx + 1) % ring->entries;
181 skb = __skb_dequeue(&ring->queue);
182 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
183 skb->len, PCI_DMA_TODEVICE);
184
Johannes Berge039fa42008-05-15 12:55:29 +0200185 info = IEEE80211_SKB_CB(skb);
Johannes Berge6a98542008-10-21 12:40:02 +0200186 ieee80211_tx_info_clear_status(info);
Michael Wuf6532112007-10-14 14:43:16 -0400187
Johannes Berge6a98542008-10-21 12:40:02 +0200188 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
189 (flags & RTL818X_TX_DESC_FLAG_TX_OK))
190 info->flags |= IEEE80211_TX_STAT_ACK;
191
192 info->status.rates[0].count = (flags & 0xFF) + 1;
Michael Wuf6532112007-10-14 14:43:16 -0400193
Johannes Berge039fa42008-05-15 12:55:29 +0200194 ieee80211_tx_status_irqsafe(dev, skb);
Michael Wuf6532112007-10-14 14:43:16 -0400195 if (ring->entries - skb_queue_len(&ring->queue) == 2)
196 ieee80211_wake_queue(dev, prio);
197 }
198}
199
200static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
201{
202 struct ieee80211_hw *dev = dev_id;
203 struct rtl8180_priv *priv = dev->priv;
204 u16 reg;
205
206 spin_lock(&priv->lock);
207 reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
208 if (unlikely(reg == 0xFFFF)) {
209 spin_unlock(&priv->lock);
210 return IRQ_HANDLED;
211 }
212
213 rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
214
215 if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
216 rtl8180_handle_tx(dev, 3);
217
218 if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
219 rtl8180_handle_tx(dev, 2);
220
221 if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
222 rtl8180_handle_tx(dev, 1);
223
224 if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
225 rtl8180_handle_tx(dev, 0);
226
227 if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
228 rtl8180_handle_rx(dev);
229
230 spin_unlock(&priv->lock);
231
232 return IRQ_HANDLED;
233}
234
Johannes Berge039fa42008-05-15 12:55:29 +0200235static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
Michael Wuf6532112007-10-14 14:43:16 -0400236{
Johannes Berge039fa42008-05-15 12:55:29 +0200237 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Michael Wuf6532112007-10-14 14:43:16 -0400238 struct rtl8180_priv *priv = dev->priv;
239 struct rtl8180_tx_ring *ring;
240 struct rtl8180_tx_desc *entry;
241 unsigned long flags;
242 unsigned int idx, prio;
243 dma_addr_t mapping;
244 u32 tx_flags;
Johannes Berge6a98542008-10-21 12:40:02 +0200245 u8 rc_flags;
Michael Wuf6532112007-10-14 14:43:16 -0400246 u16 plcp_len = 0;
247 __le16 rts_duration = 0;
248
Johannes Berge2530082008-05-17 00:57:14 +0200249 prio = skb_get_queue_mapping(skb);
Michael Wuf6532112007-10-14 14:43:16 -0400250 ring = &priv->tx_ring[prio];
251
252 mapping = pci_map_single(priv->pdev, skb->data,
253 skb->len, PCI_DMA_TODEVICE);
254
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300255 tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS |
256 RTL818X_TX_DESC_FLAG_LS |
Johannes Berge039fa42008-05-15 12:55:29 +0200257 (ieee80211_get_tx_rate(dev, info)->hw_value << 24) |
Johannes Berg2e92e6f2008-05-15 12:55:27 +0200258 skb->len;
Michael Wuf6532112007-10-14 14:43:16 -0400259
260 if (priv->r8185)
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300261 tx_flags |= RTL818X_TX_DESC_FLAG_DMA |
262 RTL818X_TX_DESC_FLAG_NO_ENC;
Michael Wuf6532112007-10-14 14:43:16 -0400263
Johannes Berge6a98542008-10-21 12:40:02 +0200264 rc_flags = info->control.rates[0].flags;
265 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300266 tx_flags |= RTL818X_TX_DESC_FLAG_RTS;
Johannes Berge039fa42008-05-15 12:55:29 +0200267 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
Johannes Berge6a98542008-10-21 12:40:02 +0200268 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300269 tx_flags |= RTL818X_TX_DESC_FLAG_CTS;
Johannes Berge039fa42008-05-15 12:55:29 +0200270 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
Johannes Bergaa68cbf2008-02-18 14:20:30 +0100271 }
Michael Wuf6532112007-10-14 14:43:16 -0400272
Johannes Berge6a98542008-10-21 12:40:02 +0200273 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
Johannes Berg32bfd352007-12-19 01:31:26 +0100274 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
Johannes Berge039fa42008-05-15 12:55:29 +0200275 info);
Michael Wuf6532112007-10-14 14:43:16 -0400276
277 if (!priv->r8185) {
278 unsigned int remainder;
279
280 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
Johannes Berge039fa42008-05-15 12:55:29 +0200281 (ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
Michael Wuf6532112007-10-14 14:43:16 -0400282 remainder = (16 * (skb->len + 4)) %
Johannes Berge039fa42008-05-15 12:55:29 +0200283 ((ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
Roel Kluin35a0ace2009-06-22 17:42:21 +0200284 if (remainder <= 6)
Michael Wuf6532112007-10-14 14:43:16 -0400285 plcp_len |= 1 << 15;
286 }
287
288 spin_lock_irqsave(&priv->lock, flags);
289 idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
290 entry = &ring->desc[idx];
291
292 entry->rts_duration = rts_duration;
293 entry->plcp_len = cpu_to_le16(plcp_len);
294 entry->tx_buf = cpu_to_le32(mapping);
295 entry->frame_len = cpu_to_le32(skb->len);
Johannes Berge6a98542008-10-21 12:40:02 +0200296 entry->flags2 = info->control.rates[1].idx >= 0 ?
Felix Fietkau870abdf2008-10-05 18:04:24 +0200297 ieee80211_get_alt_retry_rate(dev, info, 0)->bitrate << 4 : 0;
Johannes Berge6a98542008-10-21 12:40:02 +0200298 entry->retry_limit = info->control.rates[0].count;
Michael Wuf6532112007-10-14 14:43:16 -0400299 entry->flags = cpu_to_le32(tx_flags);
300 __skb_queue_tail(&ring->queue, skb);
301 if (ring->entries - skb_queue_len(&ring->queue) < 2)
Johannes Berge2530082008-05-17 00:57:14 +0200302 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
Michael Wuf6532112007-10-14 14:43:16 -0400303 spin_unlock_irqrestore(&priv->lock, flags);
304
305 rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
306
307 return 0;
308}
309
310void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
311{
312 u8 reg;
313
314 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
315 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
316 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
317 reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
318 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
319 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
320 reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
321 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
322}
323
324static int rtl8180_init_hw(struct ieee80211_hw *dev)
325{
326 struct rtl8180_priv *priv = dev->priv;
327 u16 reg;
328
329 rtl818x_iowrite8(priv, &priv->map->CMD, 0);
330 rtl818x_ioread8(priv, &priv->map->CMD);
331 msleep(10);
332
333 /* reset */
334 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
335 rtl818x_ioread8(priv, &priv->map->CMD);
336
337 reg = rtl818x_ioread8(priv, &priv->map->CMD);
338 reg &= (1 << 1);
339 reg |= RTL818X_CMD_RESET;
340 rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
341 rtl818x_ioread8(priv, &priv->map->CMD);
342 msleep(200);
343
344 /* check success of reset */
345 if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
346 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
347 return -ETIMEDOUT;
348 }
349
350 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
351 rtl818x_ioread8(priv, &priv->map->CMD);
352 msleep(200);
353
354 if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
355 /* For cardbus */
356 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
357 reg |= 1 << 1;
358 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
359 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
360 reg |= (1 << 15) | (1 << 14) | (1 << 4);
361 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
362 }
363
364 rtl818x_iowrite8(priv, &priv->map->MSR, 0);
365
366 if (!priv->r8185)
367 rtl8180_set_anaparam(priv, priv->anaparam);
368
369 rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
370 rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
371 rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
372 rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
373 rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
374
375 /* TODO: necessary? specs indicate not */
376 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
377 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
378 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
379 if (priv->r8185) {
380 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
381 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
382 }
383 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
384
385 /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
386
387 /* TODO: turn off hw wep on rtl8180 */
388
389 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
390
391 if (priv->r8185) {
392 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
393 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
394 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
395
396 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
397
398 /* TODO: set ClkRun enable? necessary? */
399 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
400 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
401 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
402 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
403 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
404 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
405 } else {
406 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
407 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
408
409 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
410 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
411 }
412
413 priv->rf->init(dev);
414 if (priv->r8185)
415 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
416 return 0;
417}
418
419static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
420{
421 struct rtl8180_priv *priv = dev->priv;
422 struct rtl8180_rx_desc *entry;
423 int i;
424
425 priv->rx_ring = pci_alloc_consistent(priv->pdev,
426 sizeof(*priv->rx_ring) * 32,
427 &priv->rx_ring_dma);
428
429 if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
430 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
431 wiphy_name(dev->wiphy));
432 return -ENOMEM;
433 }
434
435 memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
436 priv->rx_idx = 0;
437
438 for (i = 0; i < 32; i++) {
439 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
440 dma_addr_t *mapping;
441 entry = &priv->rx_ring[i];
442 if (!skb)
443 return 0;
444
445 priv->rx_buf[i] = skb;
446 mapping = (dma_addr_t *)skb->cb;
447 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
448 MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
449 entry->rx_buf = cpu_to_le32(*mapping);
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300450 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
Michael Wuf6532112007-10-14 14:43:16 -0400451 MAX_RX_SIZE);
452 }
Herton Ronaldo Krzesinski38e3b0d2008-07-16 11:44:18 -0300453 entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
Michael Wuf6532112007-10-14 14:43:16 -0400454 return 0;
455}
456
457static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
458{
459 struct rtl8180_priv *priv = dev->priv;
460 int i;
461
462 for (i = 0; i < 32; i++) {
463 struct sk_buff *skb = priv->rx_buf[i];
464 if (!skb)
465 continue;
466
467 pci_unmap_single(priv->pdev,
468 *((dma_addr_t *)skb->cb),
469 MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
470 kfree_skb(skb);
471 }
472
473 pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
474 priv->rx_ring, priv->rx_ring_dma);
475 priv->rx_ring = NULL;
476}
477
478static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
479 unsigned int prio, unsigned int entries)
480{
481 struct rtl8180_priv *priv = dev->priv;
482 struct rtl8180_tx_desc *ring;
483 dma_addr_t dma;
484 int i;
485
486 ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
487 if (!ring || (unsigned long)ring & 0xFF) {
488 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
489 wiphy_name(dev->wiphy), prio);
490 return -ENOMEM;
491 }
492
493 memset(ring, 0, sizeof(*ring)*entries);
494 priv->tx_ring[prio].desc = ring;
495 priv->tx_ring[prio].dma = dma;
496 priv->tx_ring[prio].idx = 0;
497 priv->tx_ring[prio].entries = entries;
498 skb_queue_head_init(&priv->tx_ring[prio].queue);
499
500 for (i = 0; i < entries; i++)
501 ring[i].next_tx_desc =
502 cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
503
504 return 0;
505}
506
507static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
508{
509 struct rtl8180_priv *priv = dev->priv;
510 struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
511
512 while (skb_queue_len(&ring->queue)) {
513 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
514 struct sk_buff *skb = __skb_dequeue(&ring->queue);
515
516 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
517 skb->len, PCI_DMA_TODEVICE);
Michael Wuf6532112007-10-14 14:43:16 -0400518 kfree_skb(skb);
519 ring->idx = (ring->idx + 1) % ring->entries;
520 }
521
522 pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
523 ring->desc, ring->dma);
524 ring->desc = NULL;
525}
526
527static int rtl8180_start(struct ieee80211_hw *dev)
528{
529 struct rtl8180_priv *priv = dev->priv;
530 int ret, i;
531 u32 reg;
532
533 ret = rtl8180_init_rx_ring(dev);
534 if (ret)
535 return ret;
536
537 for (i = 0; i < 4; i++)
538 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
539 goto err_free_rings;
540
541 ret = rtl8180_init_hw(dev);
542 if (ret)
543 goto err_free_rings;
544
545 rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
546 rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
547 rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
548 rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
549 rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
550
551 ret = request_irq(priv->pdev->irq, &rtl8180_interrupt,
552 IRQF_SHARED, KBUILD_MODNAME, dev);
553 if (ret) {
554 printk(KERN_ERR "%s: failed to register IRQ handler\n",
555 wiphy_name(dev->wiphy));
556 goto err_free_rings;
557 }
558
559 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
560
561 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
562 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
563
564 reg = RTL818X_RX_CONF_ONLYERLPKT |
565 RTL818X_RX_CONF_RX_AUTORESETPHY |
566 RTL818X_RX_CONF_MGMT |
567 RTL818X_RX_CONF_DATA |
568 (7 << 8 /* MAX RX DMA */) |
569 RTL818X_RX_CONF_BROADCAST |
570 RTL818X_RX_CONF_NICMAC;
571
572 if (priv->r8185)
573 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
574 else {
575 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
576 ? RTL818X_RX_CONF_CSDM1 : 0;
577 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
578 ? RTL818X_RX_CONF_CSDM2 : 0;
579 }
580
581 priv->rx_conf = reg;
582 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
583
584 if (priv->r8185) {
585 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
586 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
587 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
588 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
589
590 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
591 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
592 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
593 reg |= RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
594 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
595
596 /* disable early TX */
597 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
598 }
599
600 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
601 reg |= (6 << 21 /* MAX TX DMA */) |
602 RTL818X_TX_CONF_NO_ICV;
603
604 if (priv->r8185)
605 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
606 else
607 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
608
609 /* different meaning, same value on both rtl8185 and rtl8180 */
610 reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
611
612 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
613
614 reg = rtl818x_ioread8(priv, &priv->map->CMD);
615 reg |= RTL818X_CMD_RX_ENABLE;
616 reg |= RTL818X_CMD_TX_ENABLE;
617 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
618
Johannes Berg05c914f2008-09-11 00:01:58 +0200619 priv->mode = NL80211_IFTYPE_MONITOR;
Michael Wuf6532112007-10-14 14:43:16 -0400620 return 0;
621
622 err_free_rings:
623 rtl8180_free_rx_ring(dev);
624 for (i = 0; i < 4; i++)
625 if (priv->tx_ring[i].desc)
626 rtl8180_free_tx_ring(dev, i);
627
628 return ret;
629}
630
631static void rtl8180_stop(struct ieee80211_hw *dev)
632{
633 struct rtl8180_priv *priv = dev->priv;
634 u8 reg;
635 int i;
636
Johannes Berg05c914f2008-09-11 00:01:58 +0200637 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
Michael Wuf6532112007-10-14 14:43:16 -0400638
639 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
640
641 reg = rtl818x_ioread8(priv, &priv->map->CMD);
642 reg &= ~RTL818X_CMD_TX_ENABLE;
643 reg &= ~RTL818X_CMD_RX_ENABLE;
644 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
645
646 priv->rf->stop(dev);
647
648 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
649 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
650 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
651 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
652
653 free_irq(priv->pdev->irq, dev);
654
655 rtl8180_free_rx_ring(dev);
656 for (i = 0; i < 4; i++)
657 rtl8180_free_tx_ring(dev, i);
658}
659
660static int rtl8180_add_interface(struct ieee80211_hw *dev,
661 struct ieee80211_if_init_conf *conf)
662{
663 struct rtl8180_priv *priv = dev->priv;
664
Johannes Berg05c914f2008-09-11 00:01:58 +0200665 if (priv->mode != NL80211_IFTYPE_MONITOR)
Michael Wuf6532112007-10-14 14:43:16 -0400666 return -EOPNOTSUPP;
667
668 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +0200669 case NL80211_IFTYPE_STATION:
Michael Wuf6532112007-10-14 14:43:16 -0400670 priv->mode = conf->type;
671 break;
672 default:
673 return -EOPNOTSUPP;
674 }
675
Johannes Berg32bfd352007-12-19 01:31:26 +0100676 priv->vif = conf->vif;
677
Michael Wuf6532112007-10-14 14:43:16 -0400678 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
679 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
Al Viro717ddc02008-03-16 22:43:06 +0000680 le32_to_cpu(*(__le32 *)conf->mac_addr));
Michael Wuf6532112007-10-14 14:43:16 -0400681 rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
Al Viro717ddc02008-03-16 22:43:06 +0000682 le16_to_cpu(*(__le16 *)(conf->mac_addr + 4)));
Michael Wuf6532112007-10-14 14:43:16 -0400683 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
684
685 return 0;
686}
687
688static void rtl8180_remove_interface(struct ieee80211_hw *dev,
689 struct ieee80211_if_init_conf *conf)
690{
691 struct rtl8180_priv *priv = dev->priv;
Johannes Berg05c914f2008-09-11 00:01:58 +0200692 priv->mode = NL80211_IFTYPE_MONITOR;
Johannes Berg32bfd352007-12-19 01:31:26 +0100693 priv->vif = NULL;
Michael Wuf6532112007-10-14 14:43:16 -0400694}
695
Johannes Berge8975582008-10-09 12:18:51 +0200696static int rtl8180_config(struct ieee80211_hw *dev, u32 changed)
Michael Wuf6532112007-10-14 14:43:16 -0400697{
698 struct rtl8180_priv *priv = dev->priv;
Johannes Berge8975582008-10-09 12:18:51 +0200699 struct ieee80211_conf *conf = &dev->conf;
Michael Wuf6532112007-10-14 14:43:16 -0400700
701 priv->rf->set_chan(dev, conf);
702
703 return 0;
704}
705
John W. Linvilleda81ded2008-11-12 14:37:11 -0500706static void rtl8180_bss_info_changed(struct ieee80211_hw *dev,
707 struct ieee80211_vif *vif,
708 struct ieee80211_bss_conf *info,
709 u32 changed)
710{
711 struct rtl8180_priv *priv = dev->priv;
Johannes Berg2d0ddec2009-04-23 16:13:26 +0200712 int i;
713
714 if (changed & BSS_CHANGED_BSSID) {
715 for (i = 0; i < ETH_ALEN; i++)
716 rtl818x_iowrite8(priv, &priv->map->BSSID[i],
717 info->bssid[i]);
718
719 if (is_valid_ether_addr(info->bssid))
720 rtl818x_iowrite8(priv, &priv->map->MSR,
721 RTL818X_MSR_INFRA);
722 else
723 rtl818x_iowrite8(priv, &priv->map->MSR,
724 RTL818X_MSR_NO_LINK);
725 }
John W. Linvilleda81ded2008-11-12 14:37:11 -0500726
727 if (changed & BSS_CHANGED_ERP_SLOT && priv->rf->conf_erp)
728 priv->rf->conf_erp(dev, info);
729}
730
Michael Wuf6532112007-10-14 14:43:16 -0400731static void rtl8180_configure_filter(struct ieee80211_hw *dev,
732 unsigned int changed_flags,
733 unsigned int *total_flags,
734 int mc_count, struct dev_addr_list *mclist)
735{
736 struct rtl8180_priv *priv = dev->priv;
737
738 if (changed_flags & FIF_FCSFAIL)
739 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
740 if (changed_flags & FIF_CONTROL)
741 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
742 if (changed_flags & FIF_OTHER_BSS)
743 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
744 if (*total_flags & FIF_ALLMULTI || mc_count > 0)
745 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
746 else
747 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
748
749 *total_flags = 0;
750
751 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
752 *total_flags |= FIF_FCSFAIL;
753 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
754 *total_flags |= FIF_CONTROL;
755 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
756 *total_flags |= FIF_OTHER_BSS;
757 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
758 *total_flags |= FIF_ALLMULTI;
759
760 rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
761}
762
763static const struct ieee80211_ops rtl8180_ops = {
764 .tx = rtl8180_tx,
765 .start = rtl8180_start,
766 .stop = rtl8180_stop,
767 .add_interface = rtl8180_add_interface,
768 .remove_interface = rtl8180_remove_interface,
769 .config = rtl8180_config,
John W. Linvilleda81ded2008-11-12 14:37:11 -0500770 .bss_info_changed = rtl8180_bss_info_changed,
Michael Wuf6532112007-10-14 14:43:16 -0400771 .configure_filter = rtl8180_configure_filter,
772};
773
774static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
775{
776 struct ieee80211_hw *dev = eeprom->data;
777 struct rtl8180_priv *priv = dev->priv;
778 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
779
780 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
781 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
782 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
783 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
784}
785
786static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
787{
788 struct ieee80211_hw *dev = eeprom->data;
789 struct rtl8180_priv *priv = dev->priv;
790 u8 reg = 2 << 6;
791
792 if (eeprom->reg_data_in)
793 reg |= RTL818X_EEPROM_CMD_WRITE;
794 if (eeprom->reg_data_out)
795 reg |= RTL818X_EEPROM_CMD_READ;
796 if (eeprom->reg_data_clock)
797 reg |= RTL818X_EEPROM_CMD_CK;
798 if (eeprom->reg_chip_select)
799 reg |= RTL818X_EEPROM_CMD_CS;
800
801 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
802 rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
803 udelay(10);
804}
805
806static int __devinit rtl8180_probe(struct pci_dev *pdev,
807 const struct pci_device_id *id)
808{
809 struct ieee80211_hw *dev;
810 struct rtl8180_priv *priv;
811 unsigned long mem_addr, mem_len;
812 unsigned int io_addr, io_len;
813 int err, i;
814 struct eeprom_93cx6 eeprom;
815 const char *chip_name, *rf_name = NULL;
816 u32 reg;
817 u16 eeprom_val;
Michael Wuf6532112007-10-14 14:43:16 -0400818
819 err = pci_enable_device(pdev);
820 if (err) {
821 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
822 pci_name(pdev));
823 return err;
824 }
825
826 err = pci_request_regions(pdev, KBUILD_MODNAME);
827 if (err) {
828 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
829 pci_name(pdev));
830 return err;
831 }
832
833 io_addr = pci_resource_start(pdev, 0);
834 io_len = pci_resource_len(pdev, 0);
835 mem_addr = pci_resource_start(pdev, 1);
836 mem_len = pci_resource_len(pdev, 1);
837
838 if (mem_len < sizeof(struct rtl818x_csr) ||
839 io_len < sizeof(struct rtl818x_csr)) {
840 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
841 pci_name(pdev));
842 err = -ENOMEM;
843 goto err_free_reg;
844 }
845
846 if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
847 (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
848 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
849 pci_name(pdev));
850 goto err_free_reg;
851 }
852
853 pci_set_master(pdev);
854
855 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
856 if (!dev) {
857 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
858 pci_name(pdev));
859 err = -ENOMEM;
860 goto err_free_reg;
861 }
862
863 priv = dev->priv;
864 priv->pdev = pdev;
865
Johannes Berge6a98542008-10-21 12:40:02 +0200866 dev->max_rates = 2;
Michael Wuf6532112007-10-14 14:43:16 -0400867 SET_IEEE80211_DEV(dev, &pdev->dev);
868 pci_set_drvdata(pdev, dev);
869
870 priv->map = pci_iomap(pdev, 1, mem_len);
871 if (!priv->map)
872 priv->map = pci_iomap(pdev, 0, io_len);
873
874 if (!priv->map) {
875 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
876 pci_name(pdev));
877 goto err_free_dev;
878 }
879
Johannes Berg8318d782008-01-24 19:38:38 +0100880 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
881 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
882
Michael Wuf6532112007-10-14 14:43:16 -0400883 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
884 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
Johannes Berg8318d782008-01-24 19:38:38 +0100885
886 priv->band.band = IEEE80211_BAND_2GHZ;
887 priv->band.channels = priv->channels;
888 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
889 priv->band.bitrates = priv->rates;
890 priv->band.n_bitrates = 4;
891 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
892
Michael Wuf6532112007-10-14 14:43:16 -0400893 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
Bruno Randolf566bfe52008-05-08 19:15:40 +0200894 IEEE80211_HW_RX_INCLUDES_FCS |
895 IEEE80211_HW_SIGNAL_UNSPEC;
Larry Fingerb55eae32008-12-21 15:40:33 -0600896 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
Michael Wuf6532112007-10-14 14:43:16 -0400897 dev->queues = 1;
Bruno Randolf566bfe52008-05-08 19:15:40 +0200898 dev->max_signal = 65;
Michael Wuf6532112007-10-14 14:43:16 -0400899
900 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
901 reg &= RTL818X_TX_CONF_HWVER_MASK;
902 switch (reg) {
903 case RTL818X_TX_CONF_R8180_ABCD:
904 chip_name = "RTL8180";
905 break;
906 case RTL818X_TX_CONF_R8180_F:
907 chip_name = "RTL8180vF";
908 break;
909 case RTL818X_TX_CONF_R8185_ABC:
910 chip_name = "RTL8185";
911 break;
912 case RTL818X_TX_CONF_R8185_D:
913 chip_name = "RTL8185vD";
914 break;
915 default:
916 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
917 pci_name(pdev), reg >> 25);
918 goto err_iounmap;
919 }
920
921 priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
922 if (priv->r8185) {
Johannes Berg8318d782008-01-24 19:38:38 +0100923 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
Michael Wuf6532112007-10-14 14:43:16 -0400924 pci_try_set_mwi(pdev);
925 }
926
Michael Wuf6532112007-10-14 14:43:16 -0400927 eeprom.data = dev;
928 eeprom.register_read = rtl8180_eeprom_register_read;
929 eeprom.register_write = rtl8180_eeprom_register_write;
930 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
931 eeprom.width = PCI_EEPROM_WIDTH_93C66;
932 else
933 eeprom.width = PCI_EEPROM_WIDTH_93C46;
934
935 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
936 rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
937 udelay(10);
938
939 eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
940 eeprom_val &= 0xFF;
941 switch (eeprom_val) {
942 case 1: rf_name = "Intersil";
943 break;
944 case 2: rf_name = "RFMD";
945 break;
946 case 3: priv->rf = &sa2400_rf_ops;
947 break;
948 case 4: priv->rf = &max2820_rf_ops;
949 break;
950 case 5: priv->rf = &grf5101_rf_ops;
951 break;
952 case 9: priv->rf = rtl8180_detect_rf(dev);
953 break;
954 case 10:
955 rf_name = "RTL8255";
956 break;
957 default:
958 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
959 pci_name(pdev), eeprom_val);
960 goto err_iounmap;
961 }
962
963 if (!priv->rf) {
964 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
965 pci_name(pdev), rf_name);
966 goto err_iounmap;
967 }
968
969 eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
970 priv->csthreshold = eeprom_val >> 8;
971 if (!priv->r8185) {
972 __le32 anaparam;
973 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
974 priv->anaparam = le32_to_cpu(anaparam);
975 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
976 }
977
978 eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)dev->wiphy->perm_addr, 3);
979 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
980 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
981 " randomly generated MAC addr\n", pci_name(pdev));
982 random_ether_addr(dev->wiphy->perm_addr);
983 }
984
985 /* CCK TX power */
986 for (i = 0; i < 14; i += 2) {
987 u16 txpwr;
988 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
Johannes Berg8318d782008-01-24 19:38:38 +0100989 priv->channels[i].hw_value = txpwr & 0xFF;
990 priv->channels[i + 1].hw_value = txpwr >> 8;
Michael Wuf6532112007-10-14 14:43:16 -0400991 }
992
993 /* OFDM TX power */
994 if (priv->r8185) {
995 for (i = 0; i < 14; i += 2) {
996 u16 txpwr;
997 eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
Johannes Berg8318d782008-01-24 19:38:38 +0100998 priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
999 priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
Michael Wuf6532112007-10-14 14:43:16 -04001000 }
1001 }
1002
1003 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1004
1005 spin_lock_init(&priv->lock);
1006
1007 err = ieee80211_register_hw(dev);
1008 if (err) {
1009 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
1010 pci_name(pdev));
1011 goto err_iounmap;
1012 }
1013
Johannes Berge1749612008-10-27 15:59:26 -07001014 printk(KERN_INFO "%s: hwaddr %pM, %s + %s\n",
1015 wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
Michael Wuf6532112007-10-14 14:43:16 -04001016 chip_name, priv->rf->name);
1017
1018 return 0;
1019
1020 err_iounmap:
1021 iounmap(priv->map);
1022
1023 err_free_dev:
1024 pci_set_drvdata(pdev, NULL);
1025 ieee80211_free_hw(dev);
1026
1027 err_free_reg:
1028 pci_release_regions(pdev);
1029 pci_disable_device(pdev);
1030 return err;
1031}
1032
1033static void __devexit rtl8180_remove(struct pci_dev *pdev)
1034{
1035 struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1036 struct rtl8180_priv *priv;
1037
1038 if (!dev)
1039 return;
1040
1041 ieee80211_unregister_hw(dev);
1042
1043 priv = dev->priv;
1044
1045 pci_iounmap(pdev, priv->map);
1046 pci_release_regions(pdev);
1047 pci_disable_device(pdev);
1048 ieee80211_free_hw(dev);
1049}
1050
1051#ifdef CONFIG_PM
1052static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1053{
1054 pci_save_state(pdev);
1055 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1056 return 0;
1057}
1058
1059static int rtl8180_resume(struct pci_dev *pdev)
1060{
1061 pci_set_power_state(pdev, PCI_D0);
1062 pci_restore_state(pdev);
1063 return 0;
1064}
1065
1066#endif /* CONFIG_PM */
1067
1068static struct pci_driver rtl8180_driver = {
1069 .name = KBUILD_MODNAME,
1070 .id_table = rtl8180_table,
1071 .probe = rtl8180_probe,
1072 .remove = __devexit_p(rtl8180_remove),
1073#ifdef CONFIG_PM
1074 .suspend = rtl8180_suspend,
1075 .resume = rtl8180_resume,
1076#endif /* CONFIG_PM */
1077};
1078
1079static int __init rtl8180_init(void)
1080{
1081 return pci_register_driver(&rtl8180_driver);
1082}
1083
1084static void __exit rtl8180_exit(void)
1085{
1086 pci_unregister_driver(&rtl8180_driver);
1087}
1088
1089module_init(rtl8180_init);
1090module_exit(rtl8180_exit);