Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2004 Koninklijke Philips Electronics NV |
| 3 | * |
| 4 | * Conversion to platform driver and DT: |
| 5 | * Copyright 2014 Linaro Ltd. |
| 6 | * |
| 7 | * This software is licensed under the terms of the GNU General Public |
| 8 | * License version 2, as published by the Free Software Foundation, and |
| 9 | * may be copied, distributed, and modified under those terms. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * 14/04/2005 Initial version, colin.king@philips.com |
| 17 | */ |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/of_address.h> |
| 21 | #include <linux/of_pci.h> |
| 22 | #include <linux/of_platform.h> |
| 23 | #include <linux/pci.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | |
| 26 | static void __iomem *versatile_pci_base; |
| 27 | static void __iomem *versatile_cfg_base[2]; |
| 28 | |
| 29 | #define PCI_IMAP(m) (versatile_pci_base + ((m) * 4)) |
| 30 | #define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4)) |
| 31 | #define PCI_SELFID (versatile_pci_base + 0xc) |
| 32 | |
| 33 | #define VP_PCI_DEVICE_ID 0x030010ee |
| 34 | #define VP_PCI_CLASS_ID 0x0b400000 |
| 35 | |
| 36 | static u32 pci_slot_ignore; |
| 37 | |
| 38 | static int __init versatile_pci_slot_ignore(char *str) |
| 39 | { |
| 40 | int retval; |
| 41 | int slot; |
| 42 | |
| 43 | while ((retval = get_option(&str, &slot))) { |
| 44 | if ((slot < 0) || (slot > 31)) |
| 45 | pr_err("Illegal slot value: %d\n", slot); |
| 46 | else |
| 47 | pci_slot_ignore |= (1 << slot); |
| 48 | } |
| 49 | return 1; |
| 50 | } |
| 51 | __setup("pci_slot_ignore=", versatile_pci_slot_ignore); |
| 52 | |
| 53 | |
| 54 | static void __iomem *versatile_map_bus(struct pci_bus *bus, |
| 55 | unsigned int devfn, int offset) |
| 56 | { |
| 57 | unsigned int busnr = bus->number; |
| 58 | |
| 59 | if (pci_slot_ignore & (1 << PCI_SLOT(devfn))) |
| 60 | return NULL; |
| 61 | |
| 62 | return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset); |
| 63 | } |
| 64 | |
| 65 | static struct pci_ops pci_versatile_ops = { |
| 66 | .map_bus = versatile_map_bus, |
| 67 | .read = pci_generic_config_read32, |
| 68 | .write = pci_generic_config_write, |
| 69 | }; |
| 70 | |
| 71 | static int versatile_pci_parse_request_of_pci_ranges(struct device *dev, |
| 72 | struct list_head *res) |
| 73 | { |
| 74 | int err, mem = 1, res_valid = 0; |
| 75 | struct device_node *np = dev->of_node; |
| 76 | resource_size_t iobase; |
Linus Torvalds | 8729123 | 2015-02-10 15:09:41 -0800 | [diff] [blame] | 77 | struct resource_entry *win; |
Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 78 | |
| 79 | err = of_pci_get_host_bridge_resources(np, 0, 0xff, res, &iobase); |
| 80 | if (err) |
| 81 | return err; |
| 82 | |
Joachim Nilsson | f1651a2 | 2015-02-25 16:15:02 +0100 | [diff] [blame] | 83 | resource_list_for_each_entry(win, res) { |
Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 84 | struct resource *parent, *res = win->res; |
| 85 | |
| 86 | switch (resource_type(res)) { |
| 87 | case IORESOURCE_IO: |
| 88 | parent = &ioport_resource; |
| 89 | err = pci_remap_iospace(res, iobase); |
| 90 | if (err) { |
| 91 | dev_warn(dev, "error %d: failed to map resource %pR\n", |
| 92 | err, res); |
| 93 | continue; |
| 94 | } |
| 95 | break; |
| 96 | case IORESOURCE_MEM: |
| 97 | parent = &iomem_resource; |
| 98 | res_valid |= !(res->flags & IORESOURCE_PREFETCH); |
| 99 | |
| 100 | writel(res->start >> 28, PCI_IMAP(mem)); |
| 101 | writel(PHYS_OFFSET >> 28, PCI_SMAP(mem)); |
| 102 | mem++; |
| 103 | |
| 104 | break; |
| 105 | case IORESOURCE_BUS: |
| 106 | default: |
| 107 | continue; |
| 108 | } |
| 109 | |
| 110 | err = devm_request_resource(dev, parent, res); |
| 111 | if (err) |
| 112 | goto out_release_res; |
| 113 | } |
| 114 | |
| 115 | if (!res_valid) { |
| 116 | dev_err(dev, "non-prefetchable memory resource required\n"); |
| 117 | err = -EINVAL; |
| 118 | goto out_release_res; |
| 119 | } |
| 120 | |
| 121 | return 0; |
| 122 | |
| 123 | out_release_res: |
| 124 | pci_free_resource_list(res); |
| 125 | return err; |
| 126 | } |
| 127 | |
| 128 | /* Unused, temporary to satisfy ARM arch code */ |
| 129 | struct pci_sys_data sys; |
| 130 | |
| 131 | static int versatile_pci_probe(struct platform_device *pdev) |
| 132 | { |
| 133 | struct resource *res; |
| 134 | int ret, i, myslot = -1; |
| 135 | u32 val; |
| 136 | void __iomem *local_pci_cfg_base; |
| 137 | struct pci_bus *bus; |
| 138 | LIST_HEAD(pci_res); |
| 139 | |
| 140 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 141 | versatile_pci_base = devm_ioremap_resource(&pdev->dev, res); |
Jisheng Zhang | 8735816 | 2015-04-03 21:17:05 +0800 | [diff] [blame] | 142 | if (IS_ERR(versatile_pci_base)) |
| 143 | return PTR_ERR(versatile_pci_base); |
Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 144 | |
| 145 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 146 | versatile_cfg_base[0] = devm_ioremap_resource(&pdev->dev, res); |
Jisheng Zhang | 8735816 | 2015-04-03 21:17:05 +0800 | [diff] [blame] | 147 | if (IS_ERR(versatile_cfg_base[0])) |
| 148 | return PTR_ERR(versatile_cfg_base[0]); |
Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 149 | |
| 150 | res = platform_get_resource(pdev, IORESOURCE_MEM, 2); |
Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 151 | versatile_cfg_base[1] = devm_ioremap_resource(&pdev->dev, res); |
Jisheng Zhang | 8735816 | 2015-04-03 21:17:05 +0800 | [diff] [blame] | 152 | if (IS_ERR(versatile_cfg_base[1])) |
| 153 | return PTR_ERR(versatile_cfg_base[1]); |
Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 154 | |
| 155 | ret = versatile_pci_parse_request_of_pci_ranges(&pdev->dev, &pci_res); |
| 156 | if (ret) |
| 157 | return ret; |
| 158 | |
| 159 | /* |
| 160 | * We need to discover the PCI core first to configure itself |
| 161 | * before the main PCI probing is performed |
| 162 | */ |
| 163 | for (i = 0; i < 32; i++) { |
| 164 | if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) && |
| 165 | (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) { |
| 166 | myslot = i; |
| 167 | break; |
| 168 | } |
| 169 | } |
| 170 | if (myslot == -1) { |
| 171 | dev_err(&pdev->dev, "Cannot find PCI core!\n"); |
| 172 | return -EIO; |
| 173 | } |
| 174 | /* |
| 175 | * Do not to map Versatile FPGA PCI device into memory space |
| 176 | */ |
| 177 | pci_slot_ignore |= (1 << myslot); |
| 178 | |
| 179 | dev_info(&pdev->dev, "PCI core found (slot %d)\n", myslot); |
| 180 | |
| 181 | writel(myslot, PCI_SELFID); |
| 182 | local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11); |
| 183 | |
| 184 | val = readl(local_pci_cfg_base + PCI_COMMAND); |
| 185 | val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE; |
| 186 | writel(val, local_pci_cfg_base + PCI_COMMAND); |
| 187 | |
| 188 | /* |
| 189 | * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM |
| 190 | */ |
| 191 | writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0); |
| 192 | writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1); |
| 193 | writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2); |
| 194 | |
| 195 | /* |
| 196 | * For many years the kernel and QEMU were symbiotically buggy |
| 197 | * in that they both assumed the same broken IRQ mapping. |
| 198 | * QEMU therefore attempts to auto-detect old broken kernels |
| 199 | * so that they still work on newer QEMU as they did on old |
| 200 | * QEMU. Since we now use the correct (ie matching-hardware) |
| 201 | * IRQ mapping we write a definitely different value to a |
| 202 | * PCI_INTERRUPT_LINE register to tell QEMU that we expect |
| 203 | * real hardware behaviour and it need not be backwards |
| 204 | * compatible for us. This write is harmless on real hardware. |
| 205 | */ |
| 206 | writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE); |
| 207 | |
| 208 | pci_add_flags(PCI_ENABLE_PROC_DOMAINS); |
| 209 | pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC); |
| 210 | |
| 211 | bus = pci_scan_root_bus(&pdev->dev, 0, &pci_versatile_ops, &sys, &pci_res); |
| 212 | if (!bus) |
| 213 | return -ENOMEM; |
| 214 | |
| 215 | pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); |
| 216 | pci_assign_unassigned_bus_resources(bus); |
Yijing Wang | b97ea28 | 2015-03-16 11:18:56 +0800 | [diff] [blame] | 217 | pci_bus_add_devices(bus); |
Rob Herring | b7e7817 | 2015-01-28 10:16:18 -0600 | [diff] [blame] | 218 | |
| 219 | return 0; |
| 220 | } |
| 221 | |
| 222 | static const struct of_device_id versatile_pci_of_match[] = { |
| 223 | { .compatible = "arm,versatile-pci", }, |
| 224 | { }, |
| 225 | }; |
| 226 | MODULE_DEVICE_TABLE(of, versatile_pci_of_match); |
| 227 | |
| 228 | static struct platform_driver versatile_pci_driver = { |
| 229 | .driver = { |
| 230 | .name = "versatile-pci", |
| 231 | .of_match_table = versatile_pci_of_match, |
| 232 | }, |
| 233 | .probe = versatile_pci_probe, |
| 234 | }; |
| 235 | module_platform_driver(versatile_pci_driver); |
| 236 | |
| 237 | MODULE_DESCRIPTION("Versatile PCI driver"); |
| 238 | MODULE_LICENSE("GPL v2"); |