Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 1 | #include <linux/threads.h> |
| 2 | #include <linux/cpumask.h> |
| 3 | #include <linux/string.h> |
| 4 | #include <linux/kernel.h> |
| 5 | #include <linux/ctype.h> |
| 6 | #include <linux/init.h> |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 7 | #include <linux/dmar.h> |
| 8 | |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 9 | #include <asm/smp.h> |
Ingo Molnar | 7b6aa33 | 2009-02-17 13:58:15 +0100 | [diff] [blame] | 10 | #include <asm/apic.h> |
Yinghai Lu | c1eeb2d | 2009-02-16 23:02:14 -0800 | [diff] [blame] | 11 | #include <asm/ipi.h> |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 12 | |
| 13 | DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); |
| 14 | |
Marcin Slusarz | 2caa371 | 2008-10-12 11:44:11 +0200 | [diff] [blame] | 15 | static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 16 | { |
Suresh Siddha | ef1f87a | 2009-02-21 14:23:21 -0800 | [diff] [blame] | 17 | return x2apic_enabled(); |
Yinghai Lu | 1b9b89e | 2008-07-21 22:08:21 -0700 | [diff] [blame] | 18 | } |
| 19 | |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 20 | /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ |
| 21 | |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 22 | static const struct cpumask *x2apic_target_cpus(void) |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 23 | { |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 24 | return cpumask_of(0); |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 25 | } |
| 26 | |
| 27 | /* |
| 28 | * for now each logical cpu is in its own vector allocation domain. |
| 29 | */ |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 30 | static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask) |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 31 | { |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 32 | cpumask_clear(retmask); |
| 33 | cpumask_set_cpu(cpu, retmask); |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 34 | } |
| 35 | |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 36 | static void |
| 37 | __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest) |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 38 | { |
| 39 | unsigned long cfg; |
| 40 | |
| 41 | cfg = __prepare_ICR(0, vector, dest); |
| 42 | |
| 43 | /* |
| 44 | * send the IPI. |
| 45 | */ |
Yinghai Lu | c1eeb2d | 2009-02-16 23:02:14 -0800 | [diff] [blame] | 46 | native_x2apic_icr_write(cfg, apicid); |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 47 | } |
| 48 | |
| 49 | /* |
| 50 | * for now, we send the IPI's one by one in the cpumask. |
| 51 | * TBD: Based on the cpu mask, we can send the IPI's to the cluster group |
| 52 | * at once. We have 16 cpu's in a cluster. This will minimize IPI register |
| 53 | * writes. |
| 54 | */ |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 55 | static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 56 | { |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 57 | unsigned long query_cpu; |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 58 | unsigned long flags; |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 59 | |
Suresh Siddha | ce4e240 | 2009-03-17 10:16:54 -0800 | [diff] [blame] | 60 | x2apic_wrmsr_fence(); |
| 61 | |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 62 | local_irq_save(flags); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 63 | for_each_cpu(query_cpu, mask) { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 64 | __x2apic_send_IPI_dest( |
| 65 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), |
Ingo Molnar | bdb1a9b | 2009-01-28 05:29:25 +0100 | [diff] [blame] | 66 | vector, apic->dest_logical); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 67 | } |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 68 | local_irq_restore(flags); |
| 69 | } |
| 70 | |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 71 | static void |
| 72 | x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 73 | { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 74 | unsigned long this_cpu = smp_processor_id(); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 75 | unsigned long query_cpu; |
| 76 | unsigned long flags; |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 77 | |
Suresh Siddha | ce4e240 | 2009-03-17 10:16:54 -0800 | [diff] [blame] | 78 | x2apic_wrmsr_fence(); |
| 79 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 80 | local_irq_save(flags); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 81 | for_each_cpu(query_cpu, mask) { |
| 82 | if (query_cpu == this_cpu) |
| 83 | continue; |
| 84 | __x2apic_send_IPI_dest( |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 85 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), |
Ingo Molnar | bdb1a9b | 2009-01-28 05:29:25 +0100 | [diff] [blame] | 86 | vector, apic->dest_logical); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 87 | } |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 88 | local_irq_restore(flags); |
| 89 | } |
| 90 | |
| 91 | static void x2apic_send_IPI_allbutself(int vector) |
| 92 | { |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 93 | unsigned long this_cpu = smp_processor_id(); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 94 | unsigned long query_cpu; |
| 95 | unsigned long flags; |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 96 | |
Suresh Siddha | ce4e240 | 2009-03-17 10:16:54 -0800 | [diff] [blame] | 97 | x2apic_wrmsr_fence(); |
| 98 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 99 | local_irq_save(flags); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 100 | for_each_online_cpu(query_cpu) { |
| 101 | if (query_cpu == this_cpu) |
| 102 | continue; |
| 103 | __x2apic_send_IPI_dest( |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 104 | per_cpu(x86_cpu_to_logical_apicid, query_cpu), |
Ingo Molnar | bdb1a9b | 2009-01-28 05:29:25 +0100 | [diff] [blame] | 105 | vector, apic->dest_logical); |
Ingo Molnar | dac5f41 | 2009-01-28 15:42:24 +0100 | [diff] [blame] | 106 | } |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 107 | local_irq_restore(flags); |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 108 | } |
| 109 | |
| 110 | static void x2apic_send_IPI_all(int vector) |
| 111 | { |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 112 | x2apic_send_IPI_mask(cpu_online_mask, vector); |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 113 | } |
| 114 | |
| 115 | static int x2apic_apic_id_registered(void) |
| 116 | { |
| 117 | return 1; |
| 118 | } |
| 119 | |
Mike Travis | bcda016 | 2008-12-16 17:33:59 -0800 | [diff] [blame] | 120 | static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 121 | { |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 122 | /* |
Suresh Siddha | 7d87d53 | 2008-12-22 17:33:28 -0800 | [diff] [blame] | 123 | * We're using fixed IRQ delivery, can only return one logical APIC ID. |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 124 | * May as well be the first. |
| 125 | */ |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 126 | int cpu = cpumask_first(cpumask); |
| 127 | |
Mike Travis | e798673 | 2008-12-16 17:33:52 -0800 | [diff] [blame] | 128 | if ((unsigned)cpu < nr_cpu_ids) |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 129 | return per_cpu(x86_cpu_to_logical_apicid, cpu); |
| 130 | else |
| 131 | return BAD_APICID; |
| 132 | } |
| 133 | |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 134 | static unsigned int |
| 135 | x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
| 136 | const struct cpumask *andmask) |
Mike Travis | 95d313c | 2008-12-16 17:33:54 -0800 | [diff] [blame] | 137 | { |
| 138 | int cpu; |
| 139 | |
| 140 | /* |
Suresh Siddha | 7d87d53 | 2008-12-22 17:33:28 -0800 | [diff] [blame] | 141 | * We're using fixed IRQ delivery, can only return one logical APIC ID. |
Mike Travis | 95d313c | 2008-12-16 17:33:54 -0800 | [diff] [blame] | 142 | * May as well be the first. |
| 143 | */ |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 144 | for_each_cpu_and(cpu, cpumask, andmask) { |
Mike Travis | a775a38 | 2008-12-17 15:21:39 -0800 | [diff] [blame] | 145 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
| 146 | break; |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 147 | } |
| 148 | |
Mike Travis | 6eeb7c5 | 2008-12-16 17:33:55 -0800 | [diff] [blame] | 149 | if (cpu < nr_cpu_ids) |
Suresh Siddha | 7d87d53 | 2008-12-22 17:33:28 -0800 | [diff] [blame] | 150 | return per_cpu(x86_cpu_to_logical_apicid, cpu); |
Ingo Molnar | debccb3 | 2009-01-28 15:20:18 +0100 | [diff] [blame] | 151 | |
Mike Travis | 95d313c | 2008-12-16 17:33:54 -0800 | [diff] [blame] | 152 | return BAD_APICID; |
| 153 | } |
| 154 | |
Ingo Molnar | ca6c8ed | 2009-01-28 14:08:38 +0100 | [diff] [blame] | 155 | static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x) |
Yinghai Lu | f910a9d | 2008-07-12 01:01:20 -0700 | [diff] [blame] | 156 | { |
| 157 | unsigned int id; |
| 158 | |
| 159 | id = x; |
| 160 | return id; |
| 161 | } |
| 162 | |
| 163 | static unsigned long set_apic_id(unsigned int id) |
| 164 | { |
| 165 | unsigned long x; |
| 166 | |
| 167 | x = id; |
| 168 | return x; |
| 169 | } |
| 170 | |
Ingo Molnar | d4c9a9f | 2009-01-28 13:31:22 +0100 | [diff] [blame] | 171 | static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb) |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 172 | { |
Suresh Siddha | e17941b | 2008-08-23 17:47:11 +0200 | [diff] [blame] | 173 | return current_cpu_data.initial_apicid >> index_msb; |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 174 | } |
| 175 | |
| 176 | static void x2apic_send_IPI_self(int vector) |
| 177 | { |
| 178 | apic_write(APIC_SELF_IPI, vector); |
| 179 | } |
| 180 | |
| 181 | static void init_x2apic_ldr(void) |
| 182 | { |
| 183 | int cpu = smp_processor_id(); |
| 184 | |
| 185 | per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 186 | } |
| 187 | |
Ingo Molnar | be163a1 | 2009-02-17 16:28:46 +0100 | [diff] [blame] | 188 | struct apic apic_x2apic_cluster = { |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 189 | |
| 190 | .name = "cluster x2apic", |
| 191 | .probe = NULL, |
| 192 | .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, |
| 193 | .apic_id_registered = x2apic_apic_id_registered, |
| 194 | |
Ingo Molnar | f8987a1 | 2009-01-28 04:02:31 +0100 | [diff] [blame] | 195 | .irq_delivery_mode = dest_LowestPrio, |
Ingo Molnar | 0b06e73 | 2009-01-28 05:13:04 +0100 | [diff] [blame] | 196 | .irq_dest_mode = 1, /* logical */ |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 197 | |
| 198 | .target_cpus = x2apic_target_cpus, |
Ingo Molnar | 08125d3 | 2009-01-28 05:08:44 +0100 | [diff] [blame] | 199 | .disable_esr = 0, |
Ingo Molnar | bdb1a9b | 2009-01-28 05:29:25 +0100 | [diff] [blame] | 200 | .dest_logical = APIC_DEST_LOGICAL, |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 201 | .check_apicid_used = NULL, |
| 202 | .check_apicid_present = NULL, |
| 203 | |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 204 | .vector_allocation_domain = x2apic_vector_allocation_domain, |
| 205 | .init_apic_ldr = init_x2apic_ldr, |
| 206 | |
| 207 | .ioapic_phys_id_map = NULL, |
| 208 | .setup_apic_routing = NULL, |
| 209 | .multi_timer_check = NULL, |
| 210 | .apicid_to_node = NULL, |
| 211 | .cpu_to_logical_apicid = NULL, |
Ingo Molnar | a21769a4 | 2009-01-28 06:50:47 +0100 | [diff] [blame] | 212 | .cpu_present_to_apicid = default_cpu_present_to_apicid, |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 213 | .apicid_to_cpu_present = NULL, |
| 214 | .setup_portio_remap = NULL, |
Ingo Molnar | a27a621 | 2009-01-28 12:43:18 +0100 | [diff] [blame] | 215 | .check_phys_apicid_present = default_check_phys_apicid_present, |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 216 | .enable_apic_mode = NULL, |
Ingo Molnar | d4c9a9f | 2009-01-28 13:31:22 +0100 | [diff] [blame] | 217 | .phys_pkg_id = x2apic_cluster_phys_pkg_id, |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 218 | .mps_oem_check = NULL, |
| 219 | |
Ingo Molnar | ca6c8ed | 2009-01-28 14:08:38 +0100 | [diff] [blame] | 220 | .get_apic_id = x2apic_cluster_phys_get_apic_id, |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 221 | .set_apic_id = set_apic_id, |
| 222 | .apic_id_mask = 0xFFFFFFFFu, |
| 223 | |
| 224 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, |
| 225 | .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, |
| 226 | |
| 227 | .send_IPI_mask = x2apic_send_IPI_mask, |
| 228 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, |
| 229 | .send_IPI_allbutself = x2apic_send_IPI_allbutself, |
| 230 | .send_IPI_all = x2apic_send_IPI_all, |
| 231 | .send_IPI_self = x2apic_send_IPI_self, |
| 232 | |
Ingo Molnar | abfa584 | 2009-01-28 16:15:16 +0100 | [diff] [blame] | 233 | .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, |
| 234 | .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 235 | .wait_for_init_deassert = NULL, |
| 236 | .smp_callin_clear_local_apic = NULL, |
Ingo Molnar | 504a3c3 | 2009-01-28 02:37:01 +0100 | [diff] [blame] | 237 | .inquire_remote_apic = NULL, |
Yinghai Lu | c1eeb2d | 2009-02-16 23:02:14 -0800 | [diff] [blame] | 238 | |
| 239 | .read = native_apic_msr_read, |
| 240 | .write = native_apic_msr_write, |
| 241 | .icr_read = native_x2apic_icr_read, |
| 242 | .icr_write = native_x2apic_icr_write, |
| 243 | .wait_icr_idle = native_x2apic_wait_icr_idle, |
| 244 | .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, |
Suresh Siddha | 12a67cf | 2008-07-10 11:16:54 -0700 | [diff] [blame] | 245 | }; |