Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1 | /* |
| 2 | * rt5670.c -- RT5670 ALSA SoC audio codec driver |
| 3 | * |
| 4 | * Copyright 2014 Realtek Semiconductor Corp. |
| 5 | * Author: Bard Liao <bardliao@realtek.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/moduleparam.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/pm.h> |
Bard Liao | 64e89e5 | 2014-12-15 15:42:33 +0800 | [diff] [blame] | 17 | #include <linux/pm_runtime.h> |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 18 | #include <linux/i2c.h> |
| 19 | #include <linux/platform_device.h> |
Mengdong Lin | 0605815 | 2014-11-14 15:51:34 +0800 | [diff] [blame] | 20 | #include <linux/acpi.h> |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 21 | #include <linux/spi/spi.h> |
Bard Liao | 223c055 | 2014-12-18 11:32:52 +0800 | [diff] [blame] | 22 | #include <linux/dmi.h> |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 23 | #include <sound/core.h> |
| 24 | #include <sound/pcm.h> |
| 25 | #include <sound/pcm_params.h> |
| 26 | #include <sound/jack.h> |
| 27 | #include <sound/soc.h> |
| 28 | #include <sound/soc-dapm.h> |
| 29 | #include <sound/initval.h> |
| 30 | #include <sound/tlv.h> |
| 31 | #include <sound/rt5670.h> |
| 32 | |
| 33 | #include "rl6231.h" |
| 34 | #include "rt5670.h" |
| 35 | #include "rt5670-dsp.h" |
| 36 | |
| 37 | #define RT5670_DEVICE_ID 0x6271 |
| 38 | |
| 39 | #define RT5670_PR_RANGE_BASE (0xff + 1) |
| 40 | #define RT5670_PR_SPACING 0x100 |
| 41 | |
| 42 | #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING)) |
| 43 | |
| 44 | static const struct regmap_range_cfg rt5670_ranges[] = { |
| 45 | { .name = "PR", .range_min = RT5670_PR_BASE, |
| 46 | .range_max = RT5670_PR_BASE + 0xf8, |
| 47 | .selector_reg = RT5670_PRIV_INDEX, |
| 48 | .selector_mask = 0xff, |
| 49 | .selector_shift = 0x0, |
| 50 | .window_start = RT5670_PRIV_DATA, |
| 51 | .window_len = 0x1, }, |
| 52 | }; |
| 53 | |
Nariman Poushin | 8019ff6 | 2015-07-16 16:36:21 +0100 | [diff] [blame] | 54 | static const struct reg_sequence init_list[] = { |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 55 | { RT5670_PR_BASE + 0x14, 0x9a8a }, |
| 56 | { RT5670_PR_BASE + 0x38, 0x3ba1 }, |
| 57 | { RT5670_PR_BASE + 0x3d, 0x3640 }, |
Bard Liao | 874352a | 2016-06-17 12:08:02 +0800 | [diff] [blame] | 58 | { 0x8a, 0x0123 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 59 | }; |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 60 | |
| 61 | static const struct reg_default rt5670_reg[] = { |
| 62 | { 0x00, 0x0000 }, |
| 63 | { 0x02, 0x8888 }, |
| 64 | { 0x03, 0x8888 }, |
| 65 | { 0x0a, 0x0001 }, |
| 66 | { 0x0b, 0x0827 }, |
| 67 | { 0x0c, 0x0000 }, |
| 68 | { 0x0d, 0x0008 }, |
| 69 | { 0x0e, 0x0000 }, |
| 70 | { 0x0f, 0x0808 }, |
| 71 | { 0x19, 0xafaf }, |
| 72 | { 0x1a, 0xafaf }, |
| 73 | { 0x1b, 0x0011 }, |
| 74 | { 0x1c, 0x2f2f }, |
| 75 | { 0x1d, 0x2f2f }, |
| 76 | { 0x1e, 0x0000 }, |
| 77 | { 0x1f, 0x2f2f }, |
| 78 | { 0x20, 0x0000 }, |
| 79 | { 0x26, 0x7860 }, |
| 80 | { 0x27, 0x7860 }, |
| 81 | { 0x28, 0x7871 }, |
| 82 | { 0x29, 0x8080 }, |
| 83 | { 0x2a, 0x5656 }, |
| 84 | { 0x2b, 0x5454 }, |
| 85 | { 0x2c, 0xaaa0 }, |
| 86 | { 0x2d, 0x0000 }, |
| 87 | { 0x2e, 0x2f2f }, |
| 88 | { 0x2f, 0x1002 }, |
| 89 | { 0x30, 0x0000 }, |
| 90 | { 0x31, 0x5f00 }, |
| 91 | { 0x32, 0x0000 }, |
| 92 | { 0x33, 0x0000 }, |
| 93 | { 0x34, 0x0000 }, |
| 94 | { 0x35, 0x0000 }, |
| 95 | { 0x36, 0x0000 }, |
| 96 | { 0x37, 0x0000 }, |
| 97 | { 0x38, 0x0000 }, |
| 98 | { 0x3b, 0x0000 }, |
| 99 | { 0x3c, 0x007f }, |
| 100 | { 0x3d, 0x0000 }, |
| 101 | { 0x3e, 0x007f }, |
| 102 | { 0x45, 0xe00f }, |
| 103 | { 0x4c, 0x5380 }, |
| 104 | { 0x4f, 0x0073 }, |
| 105 | { 0x52, 0x00d3 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 106 | { 0x53, 0xf000 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 107 | { 0x61, 0x0000 }, |
| 108 | { 0x62, 0x0001 }, |
| 109 | { 0x63, 0x00c3 }, |
| 110 | { 0x64, 0x0000 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 111 | { 0x65, 0x0001 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 112 | { 0x66, 0x0000 }, |
| 113 | { 0x6f, 0x8000 }, |
| 114 | { 0x70, 0x8000 }, |
| 115 | { 0x71, 0x8000 }, |
| 116 | { 0x72, 0x8000 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 117 | { 0x73, 0x7770 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 118 | { 0x74, 0x0e00 }, |
| 119 | { 0x75, 0x1505 }, |
| 120 | { 0x76, 0x0015 }, |
| 121 | { 0x77, 0x0c00 }, |
| 122 | { 0x78, 0x4000 }, |
| 123 | { 0x79, 0x0123 }, |
| 124 | { 0x7f, 0x1100 }, |
| 125 | { 0x80, 0x0000 }, |
| 126 | { 0x81, 0x0000 }, |
| 127 | { 0x82, 0x0000 }, |
| 128 | { 0x83, 0x0000 }, |
| 129 | { 0x84, 0x0000 }, |
| 130 | { 0x85, 0x0000 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 131 | { 0x86, 0x0004 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 132 | { 0x87, 0x0000 }, |
| 133 | { 0x88, 0x0000 }, |
| 134 | { 0x89, 0x0000 }, |
Bard Liao | 874352a | 2016-06-17 12:08:02 +0800 | [diff] [blame] | 135 | { 0x8a, 0x0123 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 136 | { 0x8b, 0x0000 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 137 | { 0x8c, 0x0003 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 138 | { 0x8d, 0x0000 }, |
| 139 | { 0x8e, 0x0004 }, |
| 140 | { 0x8f, 0x1100 }, |
| 141 | { 0x90, 0x0646 }, |
| 142 | { 0x91, 0x0c06 }, |
| 143 | { 0x93, 0x0000 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 144 | { 0x94, 0x1270 }, |
| 145 | { 0x95, 0x1000 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 146 | { 0x97, 0x0000 }, |
| 147 | { 0x98, 0x0000 }, |
| 148 | { 0x99, 0x0000 }, |
| 149 | { 0x9a, 0x2184 }, |
| 150 | { 0x9b, 0x010a }, |
| 151 | { 0x9c, 0x0aea }, |
| 152 | { 0x9d, 0x000c }, |
| 153 | { 0x9e, 0x0400 }, |
| 154 | { 0xae, 0x7000 }, |
| 155 | { 0xaf, 0x0000 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 156 | { 0xb0, 0x7000 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 157 | { 0xb1, 0x0000 }, |
| 158 | { 0xb2, 0x0000 }, |
| 159 | { 0xb3, 0x001f }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 160 | { 0xb4, 0x220c }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 161 | { 0xb5, 0x1f00 }, |
| 162 | { 0xb6, 0x0000 }, |
| 163 | { 0xb7, 0x0000 }, |
| 164 | { 0xbb, 0x0000 }, |
| 165 | { 0xbc, 0x0000 }, |
| 166 | { 0xbd, 0x0000 }, |
| 167 | { 0xbe, 0x0000 }, |
| 168 | { 0xbf, 0x0000 }, |
| 169 | { 0xc0, 0x0000 }, |
| 170 | { 0xc1, 0x0000 }, |
| 171 | { 0xc2, 0x0000 }, |
| 172 | { 0xcd, 0x0000 }, |
| 173 | { 0xce, 0x0000 }, |
| 174 | { 0xcf, 0x1813 }, |
| 175 | { 0xd0, 0x0690 }, |
| 176 | { 0xd1, 0x1c17 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 177 | { 0xd3, 0xa220 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 178 | { 0xd4, 0x0000 }, |
| 179 | { 0xd6, 0x0400 }, |
| 180 | { 0xd9, 0x0809 }, |
| 181 | { 0xda, 0x0000 }, |
| 182 | { 0xdb, 0x0001 }, |
| 183 | { 0xdc, 0x0049 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 184 | { 0xdd, 0x0024 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 185 | { 0xe6, 0x8000 }, |
| 186 | { 0xe7, 0x0000 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 187 | { 0xec, 0xa200 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 188 | { 0xed, 0x0000 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 189 | { 0xee, 0xa200 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 190 | { 0xef, 0x0000 }, |
| 191 | { 0xf8, 0x0000 }, |
| 192 | { 0xf9, 0x0000 }, |
| 193 | { 0xfa, 0x8010 }, |
| 194 | { 0xfb, 0x0033 }, |
Bard Liao | ac87f22 | 2014-11-06 12:23:52 +0800 | [diff] [blame] | 195 | { 0xfc, 0x0100 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 196 | }; |
| 197 | |
| 198 | static bool rt5670_volatile_register(struct device *dev, unsigned int reg) |
| 199 | { |
| 200 | int i; |
| 201 | |
| 202 | for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { |
| 203 | if ((reg >= rt5670_ranges[i].window_start && |
| 204 | reg <= rt5670_ranges[i].window_start + |
| 205 | rt5670_ranges[i].window_len) || |
| 206 | (reg >= rt5670_ranges[i].range_min && |
| 207 | reg <= rt5670_ranges[i].range_max)) { |
| 208 | return true; |
| 209 | } |
| 210 | } |
| 211 | |
| 212 | switch (reg) { |
| 213 | case RT5670_RESET: |
| 214 | case RT5670_PDM_DATA_CTRL1: |
| 215 | case RT5670_PDM1_DATA_CTRL4: |
| 216 | case RT5670_PDM2_DATA_CTRL4: |
| 217 | case RT5670_PRIV_DATA: |
| 218 | case RT5670_ASRC_5: |
| 219 | case RT5670_CJ_CTRL1: |
| 220 | case RT5670_CJ_CTRL2: |
| 221 | case RT5670_CJ_CTRL3: |
| 222 | case RT5670_A_JD_CTRL1: |
| 223 | case RT5670_A_JD_CTRL2: |
| 224 | case RT5670_VAD_CTRL5: |
| 225 | case RT5670_ADC_EQ_CTRL1: |
| 226 | case RT5670_EQ_CTRL1: |
| 227 | case RT5670_ALC_CTRL_1: |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 228 | case RT5670_IRQ_CTRL2: |
| 229 | case RT5670_INT_IRQ_ST: |
| 230 | case RT5670_IL_CMD: |
| 231 | case RT5670_DSP_CTRL1: |
| 232 | case RT5670_DSP_CTRL2: |
| 233 | case RT5670_DSP_CTRL3: |
| 234 | case RT5670_DSP_CTRL4: |
| 235 | case RT5670_DSP_CTRL5: |
| 236 | case RT5670_VENDOR_ID: |
| 237 | case RT5670_VENDOR_ID1: |
| 238 | case RT5670_VENDOR_ID2: |
| 239 | return true; |
| 240 | default: |
| 241 | return false; |
| 242 | } |
| 243 | } |
| 244 | |
| 245 | static bool rt5670_readable_register(struct device *dev, unsigned int reg) |
| 246 | { |
| 247 | int i; |
| 248 | |
| 249 | for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) { |
| 250 | if ((reg >= rt5670_ranges[i].window_start && |
| 251 | reg <= rt5670_ranges[i].window_start + |
| 252 | rt5670_ranges[i].window_len) || |
| 253 | (reg >= rt5670_ranges[i].range_min && |
| 254 | reg <= rt5670_ranges[i].range_max)) { |
| 255 | return true; |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | switch (reg) { |
| 260 | case RT5670_RESET: |
| 261 | case RT5670_HP_VOL: |
| 262 | case RT5670_LOUT1: |
| 263 | case RT5670_CJ_CTRL1: |
| 264 | case RT5670_CJ_CTRL2: |
| 265 | case RT5670_CJ_CTRL3: |
| 266 | case RT5670_IN2: |
| 267 | case RT5670_INL1_INR1_VOL: |
| 268 | case RT5670_DAC1_DIG_VOL: |
| 269 | case RT5670_DAC2_DIG_VOL: |
| 270 | case RT5670_DAC_CTRL: |
| 271 | case RT5670_STO1_ADC_DIG_VOL: |
| 272 | case RT5670_MONO_ADC_DIG_VOL: |
| 273 | case RT5670_STO2_ADC_DIG_VOL: |
| 274 | case RT5670_ADC_BST_VOL1: |
| 275 | case RT5670_ADC_BST_VOL2: |
| 276 | case RT5670_STO2_ADC_MIXER: |
| 277 | case RT5670_STO1_ADC_MIXER: |
| 278 | case RT5670_MONO_ADC_MIXER: |
| 279 | case RT5670_AD_DA_MIXER: |
| 280 | case RT5670_STO_DAC_MIXER: |
| 281 | case RT5670_DD_MIXER: |
| 282 | case RT5670_DIG_MIXER: |
| 283 | case RT5670_DSP_PATH1: |
| 284 | case RT5670_DSP_PATH2: |
| 285 | case RT5670_DIG_INF1_DATA: |
| 286 | case RT5670_DIG_INF2_DATA: |
| 287 | case RT5670_PDM_OUT_CTRL: |
| 288 | case RT5670_PDM_DATA_CTRL1: |
| 289 | case RT5670_PDM1_DATA_CTRL2: |
| 290 | case RT5670_PDM1_DATA_CTRL3: |
| 291 | case RT5670_PDM1_DATA_CTRL4: |
| 292 | case RT5670_PDM2_DATA_CTRL2: |
| 293 | case RT5670_PDM2_DATA_CTRL3: |
| 294 | case RT5670_PDM2_DATA_CTRL4: |
| 295 | case RT5670_REC_L1_MIXER: |
| 296 | case RT5670_REC_L2_MIXER: |
| 297 | case RT5670_REC_R1_MIXER: |
| 298 | case RT5670_REC_R2_MIXER: |
| 299 | case RT5670_HPO_MIXER: |
| 300 | case RT5670_MONO_MIXER: |
| 301 | case RT5670_OUT_L1_MIXER: |
| 302 | case RT5670_OUT_R1_MIXER: |
| 303 | case RT5670_LOUT_MIXER: |
| 304 | case RT5670_PWR_DIG1: |
| 305 | case RT5670_PWR_DIG2: |
| 306 | case RT5670_PWR_ANLG1: |
| 307 | case RT5670_PWR_ANLG2: |
| 308 | case RT5670_PWR_MIXER: |
| 309 | case RT5670_PWR_VOL: |
| 310 | case RT5670_PRIV_INDEX: |
| 311 | case RT5670_PRIV_DATA: |
| 312 | case RT5670_I2S4_SDP: |
| 313 | case RT5670_I2S1_SDP: |
| 314 | case RT5670_I2S2_SDP: |
| 315 | case RT5670_I2S3_SDP: |
| 316 | case RT5670_ADDA_CLK1: |
| 317 | case RT5670_ADDA_CLK2: |
| 318 | case RT5670_DMIC_CTRL1: |
| 319 | case RT5670_DMIC_CTRL2: |
| 320 | case RT5670_TDM_CTRL_1: |
| 321 | case RT5670_TDM_CTRL_2: |
| 322 | case RT5670_TDM_CTRL_3: |
| 323 | case RT5670_DSP_CLK: |
| 324 | case RT5670_GLB_CLK: |
| 325 | case RT5670_PLL_CTRL1: |
| 326 | case RT5670_PLL_CTRL2: |
| 327 | case RT5670_ASRC_1: |
| 328 | case RT5670_ASRC_2: |
| 329 | case RT5670_ASRC_3: |
| 330 | case RT5670_ASRC_4: |
| 331 | case RT5670_ASRC_5: |
| 332 | case RT5670_ASRC_7: |
| 333 | case RT5670_ASRC_8: |
| 334 | case RT5670_ASRC_9: |
| 335 | case RT5670_ASRC_10: |
| 336 | case RT5670_ASRC_11: |
| 337 | case RT5670_ASRC_12: |
| 338 | case RT5670_ASRC_13: |
| 339 | case RT5670_ASRC_14: |
| 340 | case RT5670_DEPOP_M1: |
| 341 | case RT5670_DEPOP_M2: |
| 342 | case RT5670_DEPOP_M3: |
| 343 | case RT5670_CHARGE_PUMP: |
| 344 | case RT5670_MICBIAS: |
| 345 | case RT5670_A_JD_CTRL1: |
| 346 | case RT5670_A_JD_CTRL2: |
| 347 | case RT5670_VAD_CTRL1: |
| 348 | case RT5670_VAD_CTRL2: |
| 349 | case RT5670_VAD_CTRL3: |
| 350 | case RT5670_VAD_CTRL4: |
| 351 | case RT5670_VAD_CTRL5: |
| 352 | case RT5670_ADC_EQ_CTRL1: |
| 353 | case RT5670_ADC_EQ_CTRL2: |
| 354 | case RT5670_EQ_CTRL1: |
| 355 | case RT5670_EQ_CTRL2: |
| 356 | case RT5670_ALC_DRC_CTRL1: |
| 357 | case RT5670_ALC_DRC_CTRL2: |
| 358 | case RT5670_ALC_CTRL_1: |
| 359 | case RT5670_ALC_CTRL_2: |
| 360 | case RT5670_ALC_CTRL_3: |
| 361 | case RT5670_JD_CTRL: |
| 362 | case RT5670_IRQ_CTRL1: |
| 363 | case RT5670_IRQ_CTRL2: |
| 364 | case RT5670_INT_IRQ_ST: |
| 365 | case RT5670_GPIO_CTRL1: |
| 366 | case RT5670_GPIO_CTRL2: |
| 367 | case RT5670_GPIO_CTRL3: |
| 368 | case RT5670_SCRABBLE_FUN: |
| 369 | case RT5670_SCRABBLE_CTRL: |
| 370 | case RT5670_BASE_BACK: |
| 371 | case RT5670_MP3_PLUS1: |
| 372 | case RT5670_MP3_PLUS2: |
| 373 | case RT5670_ADJ_HPF1: |
| 374 | case RT5670_ADJ_HPF2: |
| 375 | case RT5670_HP_CALIB_AMP_DET: |
| 376 | case RT5670_SV_ZCD1: |
| 377 | case RT5670_SV_ZCD2: |
| 378 | case RT5670_IL_CMD: |
| 379 | case RT5670_IL_CMD2: |
| 380 | case RT5670_IL_CMD3: |
| 381 | case RT5670_DRC_HL_CTRL1: |
| 382 | case RT5670_DRC_HL_CTRL2: |
| 383 | case RT5670_ADC_MONO_HP_CTRL1: |
| 384 | case RT5670_ADC_MONO_HP_CTRL2: |
| 385 | case RT5670_ADC_STO2_HP_CTRL1: |
| 386 | case RT5670_ADC_STO2_HP_CTRL2: |
| 387 | case RT5670_JD_CTRL3: |
| 388 | case RT5670_JD_CTRL4: |
| 389 | case RT5670_DIG_MISC: |
| 390 | case RT5670_DSP_CTRL1: |
| 391 | case RT5670_DSP_CTRL2: |
| 392 | case RT5670_DSP_CTRL3: |
| 393 | case RT5670_DSP_CTRL4: |
| 394 | case RT5670_DSP_CTRL5: |
| 395 | case RT5670_GEN_CTRL2: |
| 396 | case RT5670_GEN_CTRL3: |
| 397 | case RT5670_VENDOR_ID: |
| 398 | case RT5670_VENDOR_ID1: |
| 399 | case RT5670_VENDOR_ID2: |
| 400 | return true; |
| 401 | default: |
| 402 | return false; |
| 403 | } |
| 404 | } |
| 405 | |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 406 | /** |
| 407 | * rt5670_headset_detect - Detect headset. |
| 408 | * @codec: SoC audio codec device. |
| 409 | * @jack_insert: Jack insert or not. |
| 410 | * |
| 411 | * Detect whether is headset or not when jack inserted. |
| 412 | * |
| 413 | * Returns detect status. |
| 414 | */ |
| 415 | |
| 416 | static int rt5670_headset_detect(struct snd_soc_codec *codec, int jack_insert) |
| 417 | { |
| 418 | int val; |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 419 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 420 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 421 | |
| 422 | if (jack_insert) { |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 423 | snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power"); |
| 424 | snd_soc_dapm_sync(dapm); |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 425 | snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x0); |
| 426 | snd_soc_update_bits(codec, RT5670_CJ_CTRL2, |
| 427 | RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD, |
| 428 | RT5670_CBJ_MN_JD); |
| 429 | snd_soc_write(codec, RT5670_GPIO_CTRL2, 0x0004); |
| 430 | snd_soc_update_bits(codec, RT5670_GPIO_CTRL1, |
| 431 | RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); |
| 432 | snd_soc_update_bits(codec, RT5670_CJ_CTRL1, |
| 433 | RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN); |
| 434 | snd_soc_write(codec, RT5670_JD_CTRL3, 0x00f0); |
| 435 | snd_soc_update_bits(codec, RT5670_CJ_CTRL2, |
| 436 | RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD); |
| 437 | snd_soc_update_bits(codec, RT5670_CJ_CTRL2, |
| 438 | RT5670_CBJ_MN_JD, 0); |
| 439 | msleep(300); |
| 440 | val = snd_soc_read(codec, RT5670_CJ_CTRL3) & 0x7; |
| 441 | if (val == 0x1 || val == 0x2) { |
| 442 | rt5670->jack_type = SND_JACK_HEADSET; |
| 443 | /* for push button */ |
| 444 | snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x8); |
| 445 | snd_soc_update_bits(codec, RT5670_IL_CMD, 0x40, 0x40); |
| 446 | snd_soc_read(codec, RT5670_IL_CMD); |
| 447 | } else { |
| 448 | snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4); |
| 449 | rt5670->jack_type = SND_JACK_HEADPHONE; |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 450 | snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); |
| 451 | snd_soc_dapm_sync(dapm); |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 452 | } |
| 453 | } else { |
| 454 | snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x0); |
| 455 | snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4); |
| 456 | rt5670->jack_type = 0; |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 457 | snd_soc_dapm_disable_pin(dapm, "Mic Det Power"); |
| 458 | snd_soc_dapm_sync(dapm); |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 459 | } |
| 460 | |
| 461 | return rt5670->jack_type; |
| 462 | } |
| 463 | |
Bard Liao | cc3c340 | 2015-03-11 11:42:45 +0800 | [diff] [blame] | 464 | void rt5670_jack_suspend(struct snd_soc_codec *codec) |
| 465 | { |
| 466 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 467 | |
| 468 | rt5670->jack_type_saved = rt5670->jack_type; |
| 469 | rt5670_headset_detect(codec, 0); |
| 470 | } |
| 471 | EXPORT_SYMBOL_GPL(rt5670_jack_suspend); |
| 472 | |
| 473 | void rt5670_jack_resume(struct snd_soc_codec *codec) |
| 474 | { |
| 475 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 476 | |
| 477 | if (rt5670->jack_type_saved) |
| 478 | rt5670_headset_detect(codec, 1); |
| 479 | } |
| 480 | EXPORT_SYMBOL_GPL(rt5670_jack_resume); |
| 481 | |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 482 | static int rt5670_button_detect(struct snd_soc_codec *codec) |
| 483 | { |
| 484 | int btn_type, val; |
| 485 | |
| 486 | val = snd_soc_read(codec, RT5670_IL_CMD); |
| 487 | btn_type = val & 0xff80; |
| 488 | snd_soc_write(codec, RT5670_IL_CMD, val); |
| 489 | if (btn_type != 0) { |
| 490 | msleep(20); |
| 491 | val = snd_soc_read(codec, RT5670_IL_CMD); |
| 492 | snd_soc_write(codec, RT5670_IL_CMD, val); |
| 493 | } |
| 494 | |
| 495 | return btn_type; |
| 496 | } |
| 497 | |
| 498 | static int rt5670_irq_detection(void *data) |
| 499 | { |
| 500 | struct rt5670_priv *rt5670 = (struct rt5670_priv *)data; |
| 501 | struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio; |
| 502 | struct snd_soc_jack *jack = rt5670->jack; |
| 503 | int val, btn_type, report = jack->status; |
| 504 | |
| 505 | if (rt5670->pdata.jd_mode == 1) /* 2 port */ |
| 506 | val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0070; |
| 507 | else |
| 508 | val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0020; |
| 509 | |
| 510 | switch (val) { |
| 511 | /* jack in */ |
| 512 | case 0x30: /* 2 port */ |
| 513 | case 0x0: /* 1 port or 2 port */ |
| 514 | if (rt5670->jack_type == 0) { |
| 515 | report = rt5670_headset_detect(rt5670->codec, 1); |
| 516 | /* for push button and jack out */ |
| 517 | gpio->debounce_time = 25; |
| 518 | break; |
| 519 | } |
| 520 | btn_type = 0; |
| 521 | if (snd_soc_read(rt5670->codec, RT5670_INT_IRQ_ST) & 0x4) { |
| 522 | /* button pressed */ |
| 523 | report = SND_JACK_HEADSET; |
| 524 | btn_type = rt5670_button_detect(rt5670->codec); |
| 525 | switch (btn_type) { |
| 526 | case 0x2000: /* up */ |
| 527 | report |= SND_JACK_BTN_1; |
| 528 | break; |
| 529 | case 0x0400: /* center */ |
| 530 | report |= SND_JACK_BTN_0; |
| 531 | break; |
| 532 | case 0x0080: /* down */ |
| 533 | report |= SND_JACK_BTN_2; |
| 534 | break; |
| 535 | default: |
| 536 | dev_err(rt5670->codec->dev, |
| 537 | "Unexpected button code 0x%04x\n", |
| 538 | btn_type); |
| 539 | break; |
| 540 | } |
| 541 | } |
| 542 | if (btn_type == 0)/* button release */ |
| 543 | report = rt5670->jack_type; |
| 544 | |
| 545 | break; |
| 546 | /* jack out */ |
| 547 | case 0x70: /* 2 port */ |
| 548 | case 0x10: /* 2 port */ |
| 549 | case 0x20: /* 1 port */ |
| 550 | report = 0; |
| 551 | snd_soc_update_bits(rt5670->codec, RT5670_INT_IRQ_ST, 0x1, 0x0); |
| 552 | rt5670_headset_detect(rt5670->codec, 0); |
| 553 | gpio->debounce_time = 150; /* for jack in */ |
| 554 | break; |
| 555 | default: |
| 556 | break; |
| 557 | } |
| 558 | |
| 559 | return report; |
| 560 | } |
| 561 | |
| 562 | int rt5670_set_jack_detect(struct snd_soc_codec *codec, |
| 563 | struct snd_soc_jack *jack) |
| 564 | { |
| 565 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 566 | int ret; |
| 567 | |
| 568 | rt5670->jack = jack; |
| 569 | rt5670->hp_gpio.gpiod_dev = codec->dev; |
| 570 | rt5670->hp_gpio.name = "headphone detect"; |
| 571 | rt5670->hp_gpio.report = SND_JACK_HEADSET | |
| 572 | SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2; |
| 573 | rt5670->hp_gpio.debounce_time = 150; |
| 574 | rt5670->hp_gpio.wake = true; |
| 575 | rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670; |
| 576 | rt5670->hp_gpio.jack_status_check = rt5670_irq_detection; |
| 577 | |
| 578 | ret = snd_soc_jack_add_gpios(rt5670->jack, 1, |
| 579 | &rt5670->hp_gpio); |
| 580 | if (ret) { |
| 581 | dev_err(codec->dev, "Adding jack GPIO failed\n"); |
| 582 | return ret; |
| 583 | } |
| 584 | |
| 585 | return 0; |
| 586 | } |
| 587 | EXPORT_SYMBOL_GPL(rt5670_set_jack_detect); |
| 588 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 589 | static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); |
| 590 | static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); |
| 591 | static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); |
| 592 | static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); |
| 593 | static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); |
| 594 | |
| 595 | /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ |
Lars-Peter Clausen | dea6d32 | 2015-08-02 17:19:51 +0200 | [diff] [blame] | 596 | static const DECLARE_TLV_DB_RANGE(bst_tlv, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 597 | 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), |
| 598 | 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), |
| 599 | 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), |
| 600 | 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), |
| 601 | 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), |
| 602 | 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), |
Lars-Peter Clausen | dea6d32 | 2015-08-02 17:19:51 +0200 | [diff] [blame] | 603 | 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) |
| 604 | ); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 605 | |
| 606 | /* Interface data select */ |
| 607 | static const char * const rt5670_data_select[] = { |
| 608 | "Normal", "Swap", "left copy to right", "right copy to left" |
| 609 | }; |
| 610 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 611 | static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 612 | RT5670_IF2_DAC_SEL_SFT, rt5670_data_select); |
| 613 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 614 | static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 615 | RT5670_IF2_ADC_SEL_SFT, rt5670_data_select); |
| 616 | |
| 617 | static const struct snd_kcontrol_new rt5670_snd_controls[] = { |
| 618 | /* Headphone Output Volume */ |
| 619 | SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL, |
| 620 | RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), |
| 621 | SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL, |
| 622 | RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, |
Bard Liao | e1f42a2 | 2016-06-07 11:03:08 +0800 | [diff] [blame] | 623 | 39, 1, out_vol_tlv), |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 624 | /* OUTPUT Control */ |
| 625 | SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1, |
| 626 | RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1), |
| 627 | SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1, |
| 628 | RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv), |
| 629 | /* DAC Digital Volume */ |
| 630 | SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL, |
| 631 | RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1), |
| 632 | SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL, |
| 633 | RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, |
| 634 | 175, 0, dac_vol_tlv), |
| 635 | SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL, |
| 636 | RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, |
| 637 | 175, 0, dac_vol_tlv), |
| 638 | /* IN1/IN2 Control */ |
| 639 | SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1, |
| 640 | RT5670_BST_SFT1, 8, 0, bst_tlv), |
| 641 | SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2, |
| 642 | RT5670_BST_SFT1, 8, 0, bst_tlv), |
| 643 | /* INL/INR Volume Control */ |
| 644 | SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL, |
| 645 | RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT, |
| 646 | 31, 1, in_vol_tlv), |
| 647 | /* ADC Digital Volume Control */ |
| 648 | SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL, |
| 649 | RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1), |
| 650 | SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL, |
| 651 | RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, |
| 652 | 127, 0, adc_vol_tlv), |
| 653 | |
| 654 | SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL, |
| 655 | RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, |
| 656 | 127, 0, adc_vol_tlv), |
| 657 | |
| 658 | /* ADC Boost Volume Control */ |
| 659 | SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, |
| 660 | RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT, |
| 661 | 3, 0, adc_bst_tlv), |
| 662 | |
| 663 | SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1, |
| 664 | RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT, |
| 665 | 3, 0, adc_bst_tlv), |
| 666 | |
| 667 | SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum), |
| 668 | SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum), |
| 669 | }; |
| 670 | |
| 671 | /** |
| 672 | * set_dmic_clk - Set parameter of dmic. |
| 673 | * |
| 674 | * @w: DAPM widget. |
| 675 | * @kcontrol: The kcontrol of this widget. |
| 676 | * @event: Event id. |
| 677 | * |
| 678 | * Choose dmic clock between 1MHz and 3MHz. |
| 679 | * It is better for clock to approximate 3MHz. |
| 680 | */ |
| 681 | static int set_dmic_clk(struct snd_soc_dapm_widget *w, |
| 682 | struct snd_kcontrol *kcontrol, int event) |
| 683 | { |
Lars-Peter Clausen | 8eee146 | 2015-01-15 12:52:15 +0100 | [diff] [blame] | 684 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 685 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
Oder Chiou | 00a6d6e5 | 2015-08-05 10:03:18 +0800 | [diff] [blame] | 686 | int idx, rate; |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 687 | |
Oder Chiou | 00a6d6e5 | 2015-08-05 10:03:18 +0800 | [diff] [blame] | 688 | rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap, |
| 689 | RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT); |
| 690 | idx = rl6231_calc_dmic_clk(rate); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 691 | if (idx < 0) |
| 692 | dev_err(codec->dev, "Failed to set DMIC clock\n"); |
| 693 | else |
| 694 | snd_soc_update_bits(codec, RT5670_DMIC_CTRL1, |
| 695 | RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT); |
| 696 | return idx; |
| 697 | } |
| 698 | |
| 699 | static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, |
| 700 | struct snd_soc_dapm_widget *sink) |
| 701 | { |
Lars-Peter Clausen | 66454b3 | 2015-01-15 12:52:15 +0100 | [diff] [blame] | 702 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); |
Bard Liao | 485372d | 2015-03-09 16:55:23 +0800 | [diff] [blame] | 703 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 704 | |
Bard Liao | 485372d | 2015-03-09 16:55:23 +0800 | [diff] [blame] | 705 | if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1) |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 706 | return 1; |
| 707 | else |
| 708 | return 0; |
| 709 | } |
| 710 | |
| 711 | static int is_using_asrc(struct snd_soc_dapm_widget *source, |
| 712 | struct snd_soc_dapm_widget *sink) |
| 713 | { |
Lars-Peter Clausen | 8eee146 | 2015-01-15 12:52:15 +0100 | [diff] [blame] | 714 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 715 | unsigned int reg, shift, val; |
| 716 | |
| 717 | switch (source->shift) { |
| 718 | case 0: |
| 719 | reg = RT5670_ASRC_3; |
| 720 | shift = 0; |
| 721 | break; |
| 722 | case 1: |
| 723 | reg = RT5670_ASRC_3; |
| 724 | shift = 4; |
| 725 | break; |
| 726 | case 2: |
| 727 | reg = RT5670_ASRC_5; |
| 728 | shift = 12; |
| 729 | break; |
| 730 | case 3: |
| 731 | reg = RT5670_ASRC_2; |
| 732 | shift = 0; |
| 733 | break; |
| 734 | case 8: |
| 735 | reg = RT5670_ASRC_2; |
| 736 | shift = 4; |
| 737 | break; |
| 738 | case 9: |
| 739 | reg = RT5670_ASRC_2; |
| 740 | shift = 8; |
| 741 | break; |
| 742 | case 10: |
| 743 | reg = RT5670_ASRC_2; |
| 744 | shift = 12; |
| 745 | break; |
| 746 | default: |
| 747 | return 0; |
| 748 | } |
| 749 | |
Lars-Peter Clausen | 8eee146 | 2015-01-15 12:52:15 +0100 | [diff] [blame] | 750 | val = (snd_soc_read(codec, reg) >> shift) & 0xf; |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 751 | switch (val) { |
| 752 | case 1: |
| 753 | case 2: |
| 754 | case 3: |
| 755 | case 4: |
| 756 | return 1; |
| 757 | default: |
| 758 | return 0; |
| 759 | } |
| 760 | |
| 761 | } |
| 762 | |
Bard Liao | e50334d | 2014-11-17 15:27:21 +0800 | [diff] [blame] | 763 | static int can_use_asrc(struct snd_soc_dapm_widget *source, |
| 764 | struct snd_soc_dapm_widget *sink) |
| 765 | { |
| 766 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); |
| 767 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 768 | |
| 769 | if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384) |
| 770 | return 1; |
| 771 | |
| 772 | return 0; |
| 773 | } |
| 774 | |
Mengdong Lin | ea232b3 | 2015-01-07 10:19:12 +0800 | [diff] [blame] | 775 | |
| 776 | /** |
| 777 | * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters |
| 778 | * @codec: SoC audio codec device. |
| 779 | * @filter_mask: mask of filters. |
| 780 | * @clk_src: clock source |
| 781 | * |
| 782 | * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can |
| 783 | * only support standard 32fs or 64fs i2s format, ASRC should be enabled to |
| 784 | * support special i2s clock format such as Intel's 100fs(100 * sampling rate). |
| 785 | * ASRC function will track i2s clock and generate a corresponding system clock |
| 786 | * for codec. This function provides an API to select the clock source for a |
| 787 | * set of filters specified by the mask. And the codec driver will turn on ASRC |
| 788 | * for these filters if ASRC is selected as their clock source. |
| 789 | */ |
| 790 | int rt5670_sel_asrc_clk_src(struct snd_soc_codec *codec, |
| 791 | unsigned int filter_mask, unsigned int clk_src) |
| 792 | { |
| 793 | unsigned int asrc2_mask = 0, asrc2_value = 0; |
| 794 | unsigned int asrc3_mask = 0, asrc3_value = 0; |
| 795 | |
| 796 | if (clk_src > RT5670_CLK_SEL_SYS3) |
| 797 | return -EINVAL; |
| 798 | |
| 799 | if (filter_mask & RT5670_DA_STEREO_FILTER) { |
| 800 | asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK; |
| 801 | asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK) |
| 802 | | (clk_src << RT5670_DA_STO_CLK_SEL_SFT); |
| 803 | } |
| 804 | |
| 805 | if (filter_mask & RT5670_DA_MONO_L_FILTER) { |
| 806 | asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK; |
| 807 | asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK) |
| 808 | | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT); |
| 809 | } |
| 810 | |
| 811 | if (filter_mask & RT5670_DA_MONO_R_FILTER) { |
| 812 | asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK; |
| 813 | asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK) |
| 814 | | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT); |
| 815 | } |
| 816 | |
| 817 | if (filter_mask & RT5670_AD_STEREO_FILTER) { |
| 818 | asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK; |
| 819 | asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK) |
| 820 | | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT); |
| 821 | } |
| 822 | |
| 823 | if (filter_mask & RT5670_AD_MONO_L_FILTER) { |
| 824 | asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK; |
| 825 | asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK) |
| 826 | | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT); |
| 827 | } |
| 828 | |
| 829 | if (filter_mask & RT5670_AD_MONO_R_FILTER) { |
| 830 | asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK; |
| 831 | asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK) |
| 832 | | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT); |
| 833 | } |
| 834 | |
| 835 | if (filter_mask & RT5670_UP_RATE_FILTER) { |
| 836 | asrc3_mask |= RT5670_UP_CLK_SEL_MASK; |
| 837 | asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK) |
| 838 | | (clk_src << RT5670_UP_CLK_SEL_SFT); |
| 839 | } |
| 840 | |
| 841 | if (filter_mask & RT5670_DOWN_RATE_FILTER) { |
| 842 | asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK; |
| 843 | asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK) |
| 844 | | (clk_src << RT5670_DOWN_CLK_SEL_SFT); |
| 845 | } |
| 846 | |
| 847 | if (asrc2_mask) |
| 848 | snd_soc_update_bits(codec, RT5670_ASRC_2, |
| 849 | asrc2_mask, asrc2_value); |
| 850 | |
| 851 | if (asrc3_mask) |
| 852 | snd_soc_update_bits(codec, RT5670_ASRC_3, |
| 853 | asrc3_mask, asrc3_value); |
| 854 | return 0; |
| 855 | } |
| 856 | EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src); |
| 857 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 858 | /* Digital Mixer */ |
| 859 | static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = { |
| 860 | SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, |
| 861 | RT5670_M_ADC_L1_SFT, 1, 1), |
| 862 | SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, |
| 863 | RT5670_M_ADC_L2_SFT, 1, 1), |
| 864 | }; |
| 865 | |
| 866 | static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = { |
| 867 | SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER, |
| 868 | RT5670_M_ADC_R1_SFT, 1, 1), |
| 869 | SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER, |
| 870 | RT5670_M_ADC_R2_SFT, 1, 1), |
| 871 | }; |
| 872 | |
| 873 | static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = { |
| 874 | SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, |
| 875 | RT5670_M_ADC_L1_SFT, 1, 1), |
| 876 | SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, |
| 877 | RT5670_M_ADC_L2_SFT, 1, 1), |
| 878 | }; |
| 879 | |
| 880 | static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = { |
| 881 | SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER, |
| 882 | RT5670_M_ADC_R1_SFT, 1, 1), |
| 883 | SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER, |
| 884 | RT5670_M_ADC_R2_SFT, 1, 1), |
| 885 | }; |
| 886 | |
| 887 | static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = { |
| 888 | SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, |
| 889 | RT5670_M_MONO_ADC_L1_SFT, 1, 1), |
| 890 | SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, |
| 891 | RT5670_M_MONO_ADC_L2_SFT, 1, 1), |
| 892 | }; |
| 893 | |
| 894 | static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = { |
| 895 | SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER, |
| 896 | RT5670_M_MONO_ADC_R1_SFT, 1, 1), |
| 897 | SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER, |
| 898 | RT5670_M_MONO_ADC_R2_SFT, 1, 1), |
| 899 | }; |
| 900 | |
| 901 | static const struct snd_kcontrol_new rt5670_dac_l_mix[] = { |
| 902 | SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, |
| 903 | RT5670_M_ADCMIX_L_SFT, 1, 1), |
| 904 | SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, |
| 905 | RT5670_M_DAC1_L_SFT, 1, 1), |
| 906 | }; |
| 907 | |
| 908 | static const struct snd_kcontrol_new rt5670_dac_r_mix[] = { |
| 909 | SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER, |
| 910 | RT5670_M_ADCMIX_R_SFT, 1, 1), |
| 911 | SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER, |
| 912 | RT5670_M_DAC1_R_SFT, 1, 1), |
| 913 | }; |
| 914 | |
| 915 | static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = { |
| 916 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, |
| 917 | RT5670_M_DAC_L1_SFT, 1, 1), |
| 918 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER, |
| 919 | RT5670_M_DAC_L2_SFT, 1, 1), |
| 920 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, |
| 921 | RT5670_M_DAC_R1_STO_L_SFT, 1, 1), |
| 922 | }; |
| 923 | |
| 924 | static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = { |
| 925 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER, |
| 926 | RT5670_M_DAC_R1_SFT, 1, 1), |
| 927 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER, |
| 928 | RT5670_M_DAC_R2_SFT, 1, 1), |
| 929 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER, |
| 930 | RT5670_M_DAC_L1_STO_R_SFT, 1, 1), |
| 931 | }; |
| 932 | |
| 933 | static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = { |
| 934 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER, |
| 935 | RT5670_M_DAC_L1_MONO_L_SFT, 1, 1), |
| 936 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, |
| 937 | RT5670_M_DAC_L2_MONO_L_SFT, 1, 1), |
| 938 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, |
| 939 | RT5670_M_DAC_R2_MONO_L_SFT, 1, 1), |
| 940 | }; |
| 941 | |
| 942 | static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = { |
| 943 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER, |
| 944 | RT5670_M_DAC_R1_MONO_R_SFT, 1, 1), |
| 945 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER, |
| 946 | RT5670_M_DAC_R2_MONO_R_SFT, 1, 1), |
| 947 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER, |
| 948 | RT5670_M_DAC_L2_MONO_R_SFT, 1, 1), |
| 949 | }; |
| 950 | |
| 951 | static const struct snd_kcontrol_new rt5670_dig_l_mix[] = { |
| 952 | SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER, |
| 953 | RT5670_M_STO_L_DAC_L_SFT, 1, 1), |
| 954 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, |
| 955 | RT5670_M_DAC_L2_DAC_L_SFT, 1, 1), |
| 956 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, |
| 957 | RT5670_M_DAC_R2_DAC_L_SFT, 1, 1), |
| 958 | }; |
| 959 | |
| 960 | static const struct snd_kcontrol_new rt5670_dig_r_mix[] = { |
| 961 | SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER, |
| 962 | RT5670_M_STO_R_DAC_R_SFT, 1, 1), |
| 963 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER, |
| 964 | RT5670_M_DAC_R2_DAC_R_SFT, 1, 1), |
| 965 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER, |
| 966 | RT5670_M_DAC_L2_DAC_R_SFT, 1, 1), |
| 967 | }; |
| 968 | |
| 969 | /* Analog Input Mixer */ |
| 970 | static const struct snd_kcontrol_new rt5670_rec_l_mix[] = { |
| 971 | SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER, |
| 972 | RT5670_M_IN_L_RM_L_SFT, 1, 1), |
| 973 | SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER, |
| 974 | RT5670_M_BST2_RM_L_SFT, 1, 1), |
| 975 | SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER, |
| 976 | RT5670_M_BST1_RM_L_SFT, 1, 1), |
| 977 | }; |
| 978 | |
| 979 | static const struct snd_kcontrol_new rt5670_rec_r_mix[] = { |
| 980 | SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER, |
| 981 | RT5670_M_IN_R_RM_R_SFT, 1, 1), |
| 982 | SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER, |
| 983 | RT5670_M_BST2_RM_R_SFT, 1, 1), |
| 984 | SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER, |
| 985 | RT5670_M_BST1_RM_R_SFT, 1, 1), |
| 986 | }; |
| 987 | |
| 988 | static const struct snd_kcontrol_new rt5670_out_l_mix[] = { |
| 989 | SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER, |
| 990 | RT5670_M_BST1_OM_L_SFT, 1, 1), |
| 991 | SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER, |
| 992 | RT5670_M_IN_L_OM_L_SFT, 1, 1), |
| 993 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER, |
| 994 | RT5670_M_DAC_L2_OM_L_SFT, 1, 1), |
| 995 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER, |
| 996 | RT5670_M_DAC_L1_OM_L_SFT, 1, 1), |
| 997 | }; |
| 998 | |
| 999 | static const struct snd_kcontrol_new rt5670_out_r_mix[] = { |
| 1000 | SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER, |
| 1001 | RT5670_M_BST2_OM_R_SFT, 1, 1), |
| 1002 | SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER, |
| 1003 | RT5670_M_IN_R_OM_R_SFT, 1, 1), |
| 1004 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER, |
| 1005 | RT5670_M_DAC_R2_OM_R_SFT, 1, 1), |
| 1006 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER, |
| 1007 | RT5670_M_DAC_R1_OM_R_SFT, 1, 1), |
| 1008 | }; |
| 1009 | |
| 1010 | static const struct snd_kcontrol_new rt5670_hpo_mix[] = { |
| 1011 | SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, |
| 1012 | RT5670_M_DAC1_HM_SFT, 1, 1), |
| 1013 | SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER, |
| 1014 | RT5670_M_HPVOL_HM_SFT, 1, 1), |
| 1015 | }; |
| 1016 | |
| 1017 | static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = { |
| 1018 | SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, |
| 1019 | RT5670_M_DACL1_HML_SFT, 1, 1), |
| 1020 | SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER, |
| 1021 | RT5670_M_INL1_HML_SFT, 1, 1), |
| 1022 | }; |
| 1023 | |
| 1024 | static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = { |
| 1025 | SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER, |
| 1026 | RT5670_M_DACR1_HMR_SFT, 1, 1), |
| 1027 | SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER, |
| 1028 | RT5670_M_INR1_HMR_SFT, 1, 1), |
| 1029 | }; |
| 1030 | |
| 1031 | static const struct snd_kcontrol_new rt5670_lout_mix[] = { |
| 1032 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER, |
| 1033 | RT5670_M_DAC_L1_LM_SFT, 1, 1), |
| 1034 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER, |
| 1035 | RT5670_M_DAC_R1_LM_SFT, 1, 1), |
| 1036 | SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER, |
| 1037 | RT5670_M_OV_L_LM_SFT, 1, 1), |
| 1038 | SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER, |
| 1039 | RT5670_M_OV_R_LM_SFT, 1, 1), |
| 1040 | }; |
| 1041 | |
| 1042 | static const struct snd_kcontrol_new rt5670_hpl_mix[] = { |
| 1043 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER, |
| 1044 | RT5670_M_DACL1_HML_SFT, 1, 1), |
| 1045 | SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER, |
| 1046 | RT5670_M_INL1_HML_SFT, 1, 1), |
| 1047 | }; |
| 1048 | |
| 1049 | static const struct snd_kcontrol_new rt5670_hpr_mix[] = { |
| 1050 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER, |
| 1051 | RT5670_M_DACR1_HMR_SFT, 1, 1), |
| 1052 | SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER, |
| 1053 | RT5670_M_INR1_HMR_SFT, 1, 1), |
| 1054 | }; |
| 1055 | |
| 1056 | static const struct snd_kcontrol_new lout_l_enable_control = |
| 1057 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, |
| 1058 | RT5670_L_MUTE_SFT, 1, 1); |
| 1059 | |
| 1060 | static const struct snd_kcontrol_new lout_r_enable_control = |
| 1061 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1, |
| 1062 | RT5670_R_MUTE_SFT, 1, 1); |
| 1063 | |
| 1064 | /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */ |
| 1065 | static const char * const rt5670_dac1_src[] = { |
| 1066 | "IF1 DAC", "IF2 DAC" |
| 1067 | }; |
| 1068 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1069 | static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1070 | RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src); |
| 1071 | |
| 1072 | static const struct snd_kcontrol_new rt5670_dac1l_mux = |
| 1073 | SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum); |
| 1074 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1075 | static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1076 | RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src); |
| 1077 | |
| 1078 | static const struct snd_kcontrol_new rt5670_dac1r_mux = |
| 1079 | SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum); |
| 1080 | |
| 1081 | /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */ |
| 1082 | /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */ |
| 1083 | static const char * const rt5670_dac12_src[] = { |
| 1084 | "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", |
| 1085 | "Bass", "VAD_ADC", "IF4 DAC" |
| 1086 | }; |
| 1087 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1088 | static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1089 | RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src); |
| 1090 | |
| 1091 | static const struct snd_kcontrol_new rt5670_dac_l2_mux = |
| 1092 | SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum); |
| 1093 | |
| 1094 | static const char * const rt5670_dacr2_src[] = { |
| 1095 | "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC" |
| 1096 | }; |
| 1097 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1098 | static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1099 | RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src); |
| 1100 | |
| 1101 | static const struct snd_kcontrol_new rt5670_dac_r2_mux = |
| 1102 | SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum); |
| 1103 | |
| 1104 | /*RxDP source*/ /* MX-2D [15:13] */ |
| 1105 | static const char * const rt5670_rxdp_src[] = { |
| 1106 | "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer", |
| 1107 | "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1" |
| 1108 | }; |
| 1109 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1110 | static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1111 | RT5670_RXDP_SEL_SFT, rt5670_rxdp_src); |
| 1112 | |
| 1113 | static const struct snd_kcontrol_new rt5670_rxdp_mux = |
| 1114 | SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum); |
| 1115 | |
| 1116 | /* MX-2D [1] [0] */ |
| 1117 | static const char * const rt5670_dsp_bypass_src[] = { |
| 1118 | "DSP", "Bypass" |
| 1119 | }; |
| 1120 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1121 | static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1122 | RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src); |
| 1123 | |
| 1124 | static const struct snd_kcontrol_new rt5670_dsp_ul_mux = |
| 1125 | SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum); |
| 1126 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1127 | static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1128 | RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src); |
| 1129 | |
| 1130 | static const struct snd_kcontrol_new rt5670_dsp_dl_mux = |
| 1131 | SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum); |
| 1132 | |
| 1133 | /* Stereo2 ADC source */ |
| 1134 | /* MX-26 [15] */ |
| 1135 | static const char * const rt5670_stereo2_adc_lr_src[] = { |
| 1136 | "L", "LR" |
| 1137 | }; |
| 1138 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1139 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1140 | RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src); |
| 1141 | |
| 1142 | static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux = |
| 1143 | SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum); |
| 1144 | |
| 1145 | /* Stereo1 ADC source */ |
| 1146 | /* MX-27 MX-26 [12] */ |
| 1147 | static const char * const rt5670_stereo_adc1_src[] = { |
| 1148 | "DAC MIX", "ADC" |
| 1149 | }; |
| 1150 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1151 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1152 | RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); |
| 1153 | |
| 1154 | static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux = |
| 1155 | SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum); |
| 1156 | |
| 1157 | static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux = |
| 1158 | SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum); |
| 1159 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1160 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1161 | RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src); |
| 1162 | |
| 1163 | static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux = |
| 1164 | SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum); |
| 1165 | |
| 1166 | static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux = |
| 1167 | SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum); |
| 1168 | |
| 1169 | /* MX-27 MX-26 [11] */ |
| 1170 | static const char * const rt5670_stereo_adc2_src[] = { |
| 1171 | "DAC MIX", "DMIC" |
| 1172 | }; |
| 1173 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1174 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1175 | RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); |
| 1176 | |
| 1177 | static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux = |
| 1178 | SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum); |
| 1179 | |
| 1180 | static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux = |
| 1181 | SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum); |
| 1182 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1183 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1184 | RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src); |
| 1185 | |
| 1186 | static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux = |
| 1187 | SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum); |
| 1188 | |
| 1189 | static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux = |
| 1190 | SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum); |
| 1191 | |
| 1192 | /* MX-27 MX26 [10] */ |
| 1193 | static const char * const rt5670_stereo_adc_src[] = { |
| 1194 | "ADC1L ADC2R", "ADC3" |
| 1195 | }; |
| 1196 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1197 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1198 | RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src); |
| 1199 | |
| 1200 | static const struct snd_kcontrol_new rt5670_sto_adc_mux = |
| 1201 | SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum); |
| 1202 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1203 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1204 | RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src); |
| 1205 | |
| 1206 | static const struct snd_kcontrol_new rt5670_sto2_adc_mux = |
| 1207 | SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum); |
| 1208 | |
| 1209 | /* MX-27 MX-26 [9:8] */ |
| 1210 | static const char * const rt5670_stereo_dmic_src[] = { |
| 1211 | "DMIC1", "DMIC2", "DMIC3" |
| 1212 | }; |
| 1213 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1214 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1215 | RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); |
| 1216 | |
| 1217 | static const struct snd_kcontrol_new rt5670_sto1_dmic_mux = |
| 1218 | SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum); |
| 1219 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1220 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1221 | RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src); |
| 1222 | |
| 1223 | static const struct snd_kcontrol_new rt5670_sto2_dmic_mux = |
| 1224 | SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum); |
| 1225 | |
| 1226 | /* MX-27 [0] */ |
| 1227 | static const char * const rt5670_stereo_dmic3_src[] = { |
| 1228 | "DMIC3", "PDM ADC" |
| 1229 | }; |
| 1230 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1231 | static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1232 | RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src); |
| 1233 | |
| 1234 | static const struct snd_kcontrol_new rt5670_sto_dmic3_mux = |
| 1235 | SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum); |
| 1236 | |
| 1237 | /* Mono ADC source */ |
| 1238 | /* MX-28 [12] */ |
| 1239 | static const char * const rt5670_mono_adc_l1_src[] = { |
| 1240 | "Mono DAC MIXL", "ADC1" |
| 1241 | }; |
| 1242 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1243 | static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1244 | RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src); |
| 1245 | |
| 1246 | static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux = |
| 1247 | SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum); |
| 1248 | /* MX-28 [11] */ |
| 1249 | static const char * const rt5670_mono_adc_l2_src[] = { |
| 1250 | "Mono DAC MIXL", "DMIC" |
| 1251 | }; |
| 1252 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1253 | static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1254 | RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src); |
| 1255 | |
| 1256 | static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux = |
| 1257 | SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum); |
| 1258 | |
| 1259 | /* MX-28 [9:8] */ |
| 1260 | static const char * const rt5670_mono_dmic_src[] = { |
| 1261 | "DMIC1", "DMIC2", "DMIC3" |
| 1262 | }; |
| 1263 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1264 | static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1265 | RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src); |
| 1266 | |
| 1267 | static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux = |
| 1268 | SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum); |
| 1269 | /* MX-28 [1:0] */ |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1270 | static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1271 | RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src); |
| 1272 | |
| 1273 | static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux = |
| 1274 | SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum); |
| 1275 | /* MX-28 [4] */ |
| 1276 | static const char * const rt5670_mono_adc_r1_src[] = { |
| 1277 | "Mono DAC MIXR", "ADC2" |
| 1278 | }; |
| 1279 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1280 | static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1281 | RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src); |
| 1282 | |
| 1283 | static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux = |
| 1284 | SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum); |
| 1285 | /* MX-28 [3] */ |
| 1286 | static const char * const rt5670_mono_adc_r2_src[] = { |
| 1287 | "Mono DAC MIXR", "DMIC" |
| 1288 | }; |
| 1289 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1290 | static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1291 | RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src); |
| 1292 | |
| 1293 | static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux = |
| 1294 | SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum); |
| 1295 | |
| 1296 | /* MX-2D [3:2] */ |
| 1297 | static const char * const rt5670_txdp_slot_src[] = { |
| 1298 | "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7" |
| 1299 | }; |
| 1300 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1301 | static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1302 | RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src); |
| 1303 | |
| 1304 | static const struct snd_kcontrol_new rt5670_txdp_slot_mux = |
| 1305 | SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum); |
| 1306 | |
| 1307 | /* MX-2F [15] */ |
| 1308 | static const char * const rt5670_if1_adc2_in_src[] = { |
| 1309 | "IF_ADC2", "VAD_ADC" |
| 1310 | }; |
| 1311 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1312 | static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1313 | RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src); |
| 1314 | |
| 1315 | static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux = |
| 1316 | SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum); |
| 1317 | |
| 1318 | /* MX-2F [14:12] */ |
| 1319 | static const char * const rt5670_if2_adc_in_src[] = { |
| 1320 | "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC" |
| 1321 | }; |
| 1322 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1323 | static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1324 | RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src); |
| 1325 | |
| 1326 | static const struct snd_kcontrol_new rt5670_if2_adc_in_mux = |
| 1327 | SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum); |
| 1328 | |
| 1329 | /* MX-30 [5:4] */ |
| 1330 | static const char * const rt5670_if4_adc_in_src[] = { |
| 1331 | "IF_ADC1", "IF_ADC2", "IF_ADC3" |
| 1332 | }; |
| 1333 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1334 | static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1335 | RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src); |
| 1336 | |
| 1337 | static const struct snd_kcontrol_new rt5670_if4_adc_in_mux = |
| 1338 | SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum); |
| 1339 | |
| 1340 | /* MX-31 [15] [13] [11] [9] */ |
| 1341 | static const char * const rt5670_pdm_src[] = { |
| 1342 | "Mono DAC", "Stereo DAC" |
| 1343 | }; |
| 1344 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1345 | static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1346 | RT5670_PDM1_L_SFT, rt5670_pdm_src); |
| 1347 | |
| 1348 | static const struct snd_kcontrol_new rt5670_pdm1_l_mux = |
| 1349 | SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum); |
| 1350 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1351 | static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1352 | RT5670_PDM1_R_SFT, rt5670_pdm_src); |
| 1353 | |
| 1354 | static const struct snd_kcontrol_new rt5670_pdm1_r_mux = |
| 1355 | SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum); |
| 1356 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1357 | static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1358 | RT5670_PDM2_L_SFT, rt5670_pdm_src); |
| 1359 | |
| 1360 | static const struct snd_kcontrol_new rt5670_pdm2_l_mux = |
| 1361 | SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum); |
| 1362 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1363 | static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1364 | RT5670_PDM2_R_SFT, rt5670_pdm_src); |
| 1365 | |
| 1366 | static const struct snd_kcontrol_new rt5670_pdm2_r_mux = |
| 1367 | SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum); |
| 1368 | |
| 1369 | /* MX-FA [12] */ |
| 1370 | static const char * const rt5670_if1_adc1_in1_src[] = { |
| 1371 | "IF_ADC1", "IF1_ADC3" |
| 1372 | }; |
| 1373 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1374 | static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1375 | RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src); |
| 1376 | |
| 1377 | static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux = |
| 1378 | SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum); |
| 1379 | |
| 1380 | /* MX-FA [11] */ |
| 1381 | static const char * const rt5670_if1_adc1_in2_src[] = { |
| 1382 | "IF1_ADC1_IN1", "IF1_ADC4" |
| 1383 | }; |
| 1384 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1385 | static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1386 | RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src); |
| 1387 | |
| 1388 | static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux = |
| 1389 | SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum); |
| 1390 | |
| 1391 | /* MX-FA [10] */ |
| 1392 | static const char * const rt5670_if1_adc2_in1_src[] = { |
| 1393 | "IF1_ADC2_IN", "IF1_ADC4" |
| 1394 | }; |
| 1395 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1396 | static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1397 | RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src); |
| 1398 | |
| 1399 | static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux = |
| 1400 | SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum); |
| 1401 | |
| 1402 | /* MX-9D [9:8] */ |
| 1403 | static const char * const rt5670_vad_adc_src[] = { |
| 1404 | "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L" |
| 1405 | }; |
| 1406 | |
Mark Brown | 0195757 | 2014-08-01 17:30:38 +0100 | [diff] [blame] | 1407 | static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1408 | RT5670_VAD_SEL_SFT, rt5670_vad_adc_src); |
| 1409 | |
| 1410 | static const struct snd_kcontrol_new rt5670_vad_adc_mux = |
| 1411 | SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum); |
| 1412 | |
| 1413 | static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w, |
| 1414 | struct snd_kcontrol *kcontrol, int event) |
| 1415 | { |
Lars-Peter Clausen | 8eee146 | 2015-01-15 12:52:15 +0100 | [diff] [blame] | 1416 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1417 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 1418 | |
| 1419 | switch (event) { |
| 1420 | case SND_SOC_DAPM_POST_PMU: |
| 1421 | regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP, |
| 1422 | RT5670_PM_HP_MASK, RT5670_PM_HP_HV); |
| 1423 | regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, |
| 1424 | 0x0400, 0x0400); |
| 1425 | /* headphone amp power on */ |
| 1426 | regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, |
| 1427 | RT5670_PWR_HA | RT5670_PWR_FV1 | |
| 1428 | RT5670_PWR_FV2, RT5670_PWR_HA | |
| 1429 | RT5670_PWR_FV1 | RT5670_PWR_FV2); |
| 1430 | /* depop parameters */ |
| 1431 | regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100); |
| 1432 | regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009); |
| 1433 | regmap_write(rt5670->regmap, RT5670_PR_BASE + |
| 1434 | RT5670_HP_DCC_INT1, 0x9f00); |
| 1435 | mdelay(20); |
| 1436 | regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); |
| 1437 | break; |
| 1438 | case SND_SOC_DAPM_PRE_PMD: |
| 1439 | regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004); |
| 1440 | msleep(30); |
| 1441 | break; |
| 1442 | default: |
| 1443 | return 0; |
| 1444 | } |
| 1445 | |
| 1446 | return 0; |
| 1447 | } |
| 1448 | |
| 1449 | static int rt5670_hp_event(struct snd_soc_dapm_widget *w, |
| 1450 | struct snd_kcontrol *kcontrol, int event) |
| 1451 | { |
Lars-Peter Clausen | 8eee146 | 2015-01-15 12:52:15 +0100 | [diff] [blame] | 1452 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1453 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 1454 | |
| 1455 | switch (event) { |
| 1456 | case SND_SOC_DAPM_POST_PMU: |
| 1457 | /* headphone unmute sequence */ |
| 1458 | regmap_write(rt5670->regmap, RT5670_PR_BASE + |
| 1459 | RT5670_MAMP_INT_REG2, 0xb400); |
| 1460 | regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); |
| 1461 | regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d); |
| 1462 | regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); |
| 1463 | regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2, |
| 1464 | 0x0300, 0x0300); |
| 1465 | regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, |
| 1466 | RT5670_L_MUTE | RT5670_R_MUTE, 0); |
| 1467 | msleep(80); |
| 1468 | regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); |
| 1469 | break; |
| 1470 | |
| 1471 | case SND_SOC_DAPM_PRE_PMD: |
| 1472 | /* headphone mute sequence */ |
| 1473 | regmap_write(rt5670->regmap, RT5670_PR_BASE + |
| 1474 | RT5670_MAMP_INT_REG2, 0xb400); |
| 1475 | regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772); |
| 1476 | regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d); |
| 1477 | mdelay(10); |
| 1478 | regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d); |
| 1479 | mdelay(10); |
| 1480 | regmap_update_bits(rt5670->regmap, RT5670_HP_VOL, |
| 1481 | RT5670_L_MUTE | RT5670_R_MUTE, |
| 1482 | RT5670_L_MUTE | RT5670_R_MUTE); |
| 1483 | msleep(20); |
| 1484 | regmap_update_bits(rt5670->regmap, |
| 1485 | RT5670_GEN_CTRL2, 0x0300, 0x0); |
| 1486 | regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019); |
| 1487 | regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707); |
| 1488 | regmap_write(rt5670->regmap, RT5670_PR_BASE + |
| 1489 | RT5670_MAMP_INT_REG2, 0xfc00); |
| 1490 | break; |
| 1491 | |
| 1492 | default: |
| 1493 | return 0; |
| 1494 | } |
| 1495 | |
| 1496 | return 0; |
| 1497 | } |
| 1498 | |
| 1499 | static int rt5670_bst1_event(struct snd_soc_dapm_widget *w, |
| 1500 | struct snd_kcontrol *kcontrol, int event) |
| 1501 | { |
Lars-Peter Clausen | 8eee146 | 2015-01-15 12:52:15 +0100 | [diff] [blame] | 1502 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1503 | |
| 1504 | switch (event) { |
| 1505 | case SND_SOC_DAPM_POST_PMU: |
| 1506 | snd_soc_update_bits(codec, RT5670_PWR_ANLG2, |
| 1507 | RT5670_PWR_BST1_P, RT5670_PWR_BST1_P); |
| 1508 | break; |
| 1509 | |
| 1510 | case SND_SOC_DAPM_PRE_PMD: |
| 1511 | snd_soc_update_bits(codec, RT5670_PWR_ANLG2, |
| 1512 | RT5670_PWR_BST1_P, 0); |
| 1513 | break; |
| 1514 | |
| 1515 | default: |
| 1516 | return 0; |
| 1517 | } |
| 1518 | |
| 1519 | return 0; |
| 1520 | } |
| 1521 | |
| 1522 | static int rt5670_bst2_event(struct snd_soc_dapm_widget *w, |
| 1523 | struct snd_kcontrol *kcontrol, int event) |
| 1524 | { |
Lars-Peter Clausen | 8eee146 | 2015-01-15 12:52:15 +0100 | [diff] [blame] | 1525 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1526 | |
| 1527 | switch (event) { |
| 1528 | case SND_SOC_DAPM_POST_PMU: |
| 1529 | snd_soc_update_bits(codec, RT5670_PWR_ANLG2, |
| 1530 | RT5670_PWR_BST2_P, RT5670_PWR_BST2_P); |
| 1531 | break; |
| 1532 | |
| 1533 | case SND_SOC_DAPM_PRE_PMD: |
| 1534 | snd_soc_update_bits(codec, RT5670_PWR_ANLG2, |
| 1535 | RT5670_PWR_BST2_P, 0); |
| 1536 | break; |
| 1537 | |
| 1538 | default: |
| 1539 | return 0; |
| 1540 | } |
| 1541 | |
| 1542 | return 0; |
| 1543 | } |
| 1544 | |
| 1545 | static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = { |
| 1546 | SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2, |
| 1547 | RT5670_PWR_PLL_BIT, 0, NULL, 0), |
| 1548 | SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2, |
| 1549 | RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0), |
| 1550 | SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL, |
| 1551 | RT5670_PWR_MIC_DET_BIT, 0, NULL, 0), |
| 1552 | |
| 1553 | /* ASRC */ |
| 1554 | SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1, |
| 1555 | 11, 0, NULL, 0), |
| 1556 | SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1, |
| 1557 | 12, 0, NULL, 0), |
| 1558 | SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1, |
| 1559 | 10, 0, NULL, 0), |
| 1560 | SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1, |
| 1561 | 9, 0, NULL, 0), |
| 1562 | SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1, |
| 1563 | 8, 0, NULL, 0), |
Bard Liao | ff4541c | 2014-11-17 15:27:22 +0800 | [diff] [blame] | 1564 | SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1, |
| 1565 | 7, 0, NULL, 0), |
| 1566 | SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1, |
| 1567 | 6, 0, NULL, 0), |
| 1568 | SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1, |
| 1569 | 5, 0, NULL, 0), |
| 1570 | SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1, |
| 1571 | 4, 0, NULL, 0), |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1572 | SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1, |
| 1573 | 3, 0, NULL, 0), |
| 1574 | SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1, |
| 1575 | 2, 0, NULL, 0), |
| 1576 | SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1, |
| 1577 | 1, 0, NULL, 0), |
| 1578 | SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1, |
| 1579 | 0, 0, NULL, 0), |
| 1580 | |
| 1581 | /* Input Side */ |
| 1582 | /* micbias */ |
| 1583 | SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2, |
| 1584 | RT5670_PWR_MB1_BIT, 0, NULL, 0), |
| 1585 | |
| 1586 | /* Input Lines */ |
| 1587 | SND_SOC_DAPM_INPUT("DMIC L1"), |
| 1588 | SND_SOC_DAPM_INPUT("DMIC R1"), |
| 1589 | SND_SOC_DAPM_INPUT("DMIC L2"), |
| 1590 | SND_SOC_DAPM_INPUT("DMIC R2"), |
| 1591 | SND_SOC_DAPM_INPUT("DMIC L3"), |
| 1592 | SND_SOC_DAPM_INPUT("DMIC R3"), |
| 1593 | |
| 1594 | SND_SOC_DAPM_INPUT("IN1P"), |
| 1595 | SND_SOC_DAPM_INPUT("IN1N"), |
| 1596 | SND_SOC_DAPM_INPUT("IN2P"), |
| 1597 | SND_SOC_DAPM_INPUT("IN2N"), |
| 1598 | |
| 1599 | SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1600 | SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1601 | SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1602 | |
| 1603 | SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, |
| 1604 | set_dmic_clk, SND_SOC_DAPM_PRE_PMU), |
| 1605 | SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1, |
| 1606 | RT5670_DMIC_1_EN_SFT, 0, NULL, 0), |
| 1607 | SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1, |
| 1608 | RT5670_DMIC_2_EN_SFT, 0, NULL, 0), |
| 1609 | SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1, |
| 1610 | RT5670_DMIC_3_EN_SFT, 0, NULL, 0), |
| 1611 | /* Boost */ |
| 1612 | SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT, |
| 1613 | 0, NULL, 0, rt5670_bst1_event, |
| 1614 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
| 1615 | SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT, |
| 1616 | 0, NULL, 0, rt5670_bst2_event, |
| 1617 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
| 1618 | /* Input Volume */ |
| 1619 | SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL, |
| 1620 | RT5670_PWR_IN_L_BIT, 0, NULL, 0), |
| 1621 | SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL, |
| 1622 | RT5670_PWR_IN_R_BIT, 0, NULL, 0), |
| 1623 | |
| 1624 | /* REC Mixer */ |
| 1625 | SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0, |
| 1626 | rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)), |
| 1627 | SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0, |
| 1628 | rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)), |
| 1629 | /* ADCs */ |
| 1630 | SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), |
| 1631 | SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0), |
| 1632 | |
| 1633 | SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1634 | |
| 1635 | SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1, |
| 1636 | RT5670_PWR_ADC_L_BIT, 0, NULL, 0), |
| 1637 | SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1, |
| 1638 | RT5670_PWR_ADC_R_BIT, 0, NULL, 0), |
| 1639 | SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE + |
| 1640 | RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0), |
| 1641 | /* ADC Mux */ |
| 1642 | SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, |
| 1643 | &rt5670_sto1_dmic_mux), |
| 1644 | SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, |
| 1645 | &rt5670_sto_adc_l2_mux), |
| 1646 | SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, |
| 1647 | &rt5670_sto_adc_r2_mux), |
| 1648 | SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, |
| 1649 | &rt5670_sto_adc_l1_mux), |
| 1650 | SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, |
| 1651 | &rt5670_sto_adc_r1_mux), |
| 1652 | SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0, |
| 1653 | &rt5670_sto2_dmic_mux), |
| 1654 | SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, |
| 1655 | &rt5670_sto2_adc_l2_mux), |
| 1656 | SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, |
| 1657 | &rt5670_sto2_adc_r2_mux), |
| 1658 | SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, |
| 1659 | &rt5670_sto2_adc_l1_mux), |
| 1660 | SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, |
| 1661 | &rt5670_sto2_adc_r1_mux), |
| 1662 | SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0, |
| 1663 | &rt5670_sto2_adc_lr_mux), |
| 1664 | SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0, |
| 1665 | &rt5670_mono_dmic_l_mux), |
| 1666 | SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0, |
| 1667 | &rt5670_mono_dmic_r_mux), |
| 1668 | SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0, |
| 1669 | &rt5670_mono_adc_l2_mux), |
| 1670 | SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0, |
| 1671 | &rt5670_mono_adc_l1_mux), |
| 1672 | SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0, |
| 1673 | &rt5670_mono_adc_r1_mux), |
| 1674 | SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0, |
| 1675 | &rt5670_mono_adc_r2_mux), |
| 1676 | /* ADC Mixer */ |
| 1677 | SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2, |
| 1678 | RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0), |
| 1679 | SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2, |
| 1680 | RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0), |
| 1681 | SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL, |
| 1682 | RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix, |
| 1683 | ARRAY_SIZE(rt5670_sto1_adc_l_mix)), |
| 1684 | SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL, |
| 1685 | RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix, |
| 1686 | ARRAY_SIZE(rt5670_sto1_adc_r_mix)), |
| 1687 | SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0, |
| 1688 | rt5670_sto2_adc_l_mix, |
| 1689 | ARRAY_SIZE(rt5670_sto2_adc_l_mix)), |
| 1690 | SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0, |
| 1691 | rt5670_sto2_adc_r_mix, |
| 1692 | ARRAY_SIZE(rt5670_sto2_adc_r_mix)), |
| 1693 | SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2, |
| 1694 | RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0), |
| 1695 | SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL, |
| 1696 | RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix, |
| 1697 | ARRAY_SIZE(rt5670_mono_adc_l_mix)), |
| 1698 | SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2, |
| 1699 | RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0), |
| 1700 | SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL, |
| 1701 | RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix, |
| 1702 | ARRAY_SIZE(rt5670_mono_adc_r_mix)), |
| 1703 | |
| 1704 | /* ADC PGA */ |
| 1705 | SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1706 | SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1707 | SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1708 | SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1709 | SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1710 | SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1711 | SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1712 | SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1713 | SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1714 | SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1715 | SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1716 | SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1717 | SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1718 | SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1719 | SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1720 | SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1721 | |
| 1722 | /* DSP */ |
| 1723 | SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1724 | SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1725 | SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1726 | SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1727 | |
| 1728 | SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0, |
| 1729 | &rt5670_txdp_slot_mux), |
| 1730 | |
| 1731 | SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0, |
| 1732 | &rt5670_dsp_ul_mux), |
| 1733 | SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0, |
| 1734 | &rt5670_dsp_dl_mux), |
| 1735 | |
| 1736 | SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0, |
| 1737 | &rt5670_rxdp_mux), |
| 1738 | |
| 1739 | /* IF2 Mux */ |
| 1740 | SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0, |
| 1741 | &rt5670_if2_adc_in_mux), |
| 1742 | |
| 1743 | /* Digital Interface */ |
| 1744 | SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1, |
| 1745 | RT5670_PWR_I2S1_BIT, 0, NULL, 0), |
| 1746 | SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1747 | SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1748 | SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1749 | SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1750 | SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1751 | SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1752 | SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1753 | SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1754 | SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1755 | SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1, |
| 1756 | RT5670_PWR_I2S2_BIT, 0, NULL, 0), |
| 1757 | SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1758 | SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1759 | SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1760 | SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1761 | SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1762 | SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1763 | |
| 1764 | /* Digital Interface Select */ |
| 1765 | SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0, |
| 1766 | &rt5670_if1_adc1_in1_mux), |
| 1767 | SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0, |
| 1768 | &rt5670_if1_adc1_in2_mux), |
| 1769 | SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0, |
| 1770 | &rt5670_if1_adc2_in_mux), |
| 1771 | SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0, |
| 1772 | &rt5670_if1_adc2_in1_mux), |
| 1773 | SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0, |
| 1774 | &rt5670_vad_adc_mux), |
| 1775 | |
| 1776 | /* Audio Interface */ |
| 1777 | SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), |
| 1778 | SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), |
| 1779 | SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), |
| 1780 | SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, |
| 1781 | RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1), |
| 1782 | |
| 1783 | /* Audio DSP */ |
| 1784 | SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1785 | |
| 1786 | /* Output Side */ |
| 1787 | /* DAC mixer before sound effect */ |
| 1788 | SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0, |
| 1789 | rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)), |
| 1790 | SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0, |
| 1791 | rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)), |
| 1792 | SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1793 | |
| 1794 | /* DAC2 channel Mux */ |
| 1795 | SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, |
| 1796 | &rt5670_dac_l2_mux), |
| 1797 | SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, |
| 1798 | &rt5670_dac_r2_mux), |
| 1799 | SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1, |
| 1800 | RT5670_PWR_DAC_L2_BIT, 0, NULL, 0), |
| 1801 | SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1, |
| 1802 | RT5670_PWR_DAC_R2_BIT, 0, NULL, 0), |
| 1803 | |
| 1804 | SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux), |
| 1805 | SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux), |
| 1806 | |
| 1807 | /* DAC Mixer */ |
| 1808 | SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2, |
| 1809 | RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0), |
| 1810 | SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2, |
| 1811 | RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0), |
| 1812 | SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2, |
| 1813 | RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0), |
| 1814 | SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, |
| 1815 | rt5670_sto_dac_l_mix, |
| 1816 | ARRAY_SIZE(rt5670_sto_dac_l_mix)), |
| 1817 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, |
| 1818 | rt5670_sto_dac_r_mix, |
| 1819 | ARRAY_SIZE(rt5670_sto_dac_r_mix)), |
| 1820 | SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0, |
| 1821 | rt5670_mono_dac_l_mix, |
| 1822 | ARRAY_SIZE(rt5670_mono_dac_l_mix)), |
| 1823 | SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0, |
| 1824 | rt5670_mono_dac_r_mix, |
| 1825 | ARRAY_SIZE(rt5670_mono_dac_r_mix)), |
| 1826 | SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, |
| 1827 | rt5670_dig_l_mix, |
| 1828 | ARRAY_SIZE(rt5670_dig_l_mix)), |
| 1829 | SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, |
| 1830 | rt5670_dig_r_mix, |
| 1831 | ARRAY_SIZE(rt5670_dig_r_mix)), |
| 1832 | |
| 1833 | /* DACs */ |
| 1834 | SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1, |
| 1835 | RT5670_PWR_DAC_L1_BIT, 0, NULL, 0), |
| 1836 | SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1, |
| 1837 | RT5670_PWR_DAC_R1_BIT, 0, NULL, 0), |
| 1838 | SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), |
| 1839 | SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), |
| 1840 | SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1, |
| 1841 | RT5670_PWR_DAC_L2_BIT, 0), |
| 1842 | |
| 1843 | SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1, |
| 1844 | RT5670_PWR_DAC_R2_BIT, 0), |
| 1845 | /* OUT Mixer */ |
| 1846 | |
| 1847 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT, |
| 1848 | 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)), |
| 1849 | SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT, |
| 1850 | 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)), |
| 1851 | /* Ouput Volume */ |
| 1852 | SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL, |
| 1853 | RT5670_PWR_HV_L_BIT, 0, |
| 1854 | rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)), |
| 1855 | SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL, |
| 1856 | RT5670_PWR_HV_R_BIT, 0, |
| 1857 | rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)), |
| 1858 | SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1859 | SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1860 | SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1861 | |
| 1862 | /* HPO/LOUT/Mono Mixer */ |
| 1863 | SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, |
| 1864 | rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)), |
| 1865 | SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT, |
| 1866 | 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)), |
| 1867 | SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0, |
| 1868 | rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU | |
| 1869 | SND_SOC_DAPM_PRE_PMD), |
| 1870 | SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1, |
| 1871 | RT5670_PWR_HP_L_BIT, 0, NULL, 0), |
| 1872 | SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1, |
| 1873 | RT5670_PWR_HP_R_BIT, 0, NULL, 0), |
| 1874 | SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, |
| 1875 | rt5670_hp_event, SND_SOC_DAPM_PRE_PMD | |
| 1876 | SND_SOC_DAPM_POST_PMU), |
| 1877 | SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, |
| 1878 | &lout_l_enable_control), |
| 1879 | SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, |
| 1880 | &lout_r_enable_control), |
| 1881 | SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1882 | |
| 1883 | /* PDM */ |
| 1884 | SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2, |
| 1885 | RT5670_PWR_PDM1_BIT, 0, NULL, 0), |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1886 | |
| 1887 | SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL, |
| 1888 | RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux), |
| 1889 | SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL, |
| 1890 | RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux), |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1891 | |
| 1892 | /* Output Lines */ |
| 1893 | SND_SOC_DAPM_OUTPUT("HPOL"), |
| 1894 | SND_SOC_DAPM_OUTPUT("HPOR"), |
| 1895 | SND_SOC_DAPM_OUTPUT("LOUTL"), |
| 1896 | SND_SOC_DAPM_OUTPUT("LOUTR"), |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 1897 | }; |
| 1898 | |
| 1899 | static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = { |
| 1900 | SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2, |
| 1901 | RT5670_PWR_PDM2_BIT, 0, NULL, 0), |
| 1902 | SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL, |
| 1903 | RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux), |
| 1904 | SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL, |
| 1905 | RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux), |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1906 | SND_SOC_DAPM_OUTPUT("PDM1L"), |
| 1907 | SND_SOC_DAPM_OUTPUT("PDM1R"), |
| 1908 | SND_SOC_DAPM_OUTPUT("PDM2L"), |
| 1909 | SND_SOC_DAPM_OUTPUT("PDM2R"), |
| 1910 | }; |
| 1911 | |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 1912 | static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = { |
| 1913 | SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1914 | SND_SOC_DAPM_OUTPUT("SPOLP"), |
| 1915 | SND_SOC_DAPM_OUTPUT("SPOLN"), |
| 1916 | SND_SOC_DAPM_OUTPUT("SPORP"), |
| 1917 | SND_SOC_DAPM_OUTPUT("SPORN"), |
| 1918 | }; |
| 1919 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1920 | static const struct snd_soc_dapm_route rt5670_dapm_routes[] = { |
| 1921 | { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc }, |
| 1922 | { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc }, |
| 1923 | { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc }, |
| 1924 | { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc }, |
| 1925 | { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc }, |
| 1926 | { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc }, |
| 1927 | { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc }, |
Bard Liao | ff4541c | 2014-11-17 15:27:22 +0800 | [diff] [blame] | 1928 | { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc }, |
| 1929 | { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc }, |
| 1930 | { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc }, |
| 1931 | { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1932 | |
Bard Liao | e50334d | 2014-11-17 15:27:21 +0800 | [diff] [blame] | 1933 | { "I2S1", NULL, "I2S1 ASRC", can_use_asrc}, |
| 1934 | { "I2S2", NULL, "I2S2 ASRC", can_use_asrc}, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 1935 | |
| 1936 | { "DMIC1", NULL, "DMIC L1" }, |
| 1937 | { "DMIC1", NULL, "DMIC R1" }, |
| 1938 | { "DMIC2", NULL, "DMIC L2" }, |
| 1939 | { "DMIC2", NULL, "DMIC R2" }, |
| 1940 | { "DMIC3", NULL, "DMIC L3" }, |
| 1941 | { "DMIC3", NULL, "DMIC R3" }, |
| 1942 | |
| 1943 | { "BST1", NULL, "IN1P" }, |
| 1944 | { "BST1", NULL, "IN1N" }, |
| 1945 | { "BST1", NULL, "Mic Det Power" }, |
| 1946 | { "BST2", NULL, "IN2P" }, |
| 1947 | { "BST2", NULL, "IN2N" }, |
| 1948 | |
| 1949 | { "INL VOL", NULL, "IN2P" }, |
| 1950 | { "INR VOL", NULL, "IN2N" }, |
| 1951 | |
| 1952 | { "RECMIXL", "INL Switch", "INL VOL" }, |
| 1953 | { "RECMIXL", "BST2 Switch", "BST2" }, |
| 1954 | { "RECMIXL", "BST1 Switch", "BST1" }, |
| 1955 | |
| 1956 | { "RECMIXR", "INR Switch", "INR VOL" }, |
| 1957 | { "RECMIXR", "BST2 Switch", "BST2" }, |
| 1958 | { "RECMIXR", "BST1 Switch", "BST1" }, |
| 1959 | |
| 1960 | { "ADC 1", NULL, "RECMIXL" }, |
| 1961 | { "ADC 1", NULL, "ADC 1 power" }, |
| 1962 | { "ADC 1", NULL, "ADC clock" }, |
| 1963 | { "ADC 2", NULL, "RECMIXR" }, |
| 1964 | { "ADC 2", NULL, "ADC 2 power" }, |
| 1965 | { "ADC 2", NULL, "ADC clock" }, |
| 1966 | |
| 1967 | { "DMIC L1", NULL, "DMIC CLK" }, |
| 1968 | { "DMIC L1", NULL, "DMIC1 Power" }, |
| 1969 | { "DMIC R1", NULL, "DMIC CLK" }, |
| 1970 | { "DMIC R1", NULL, "DMIC1 Power" }, |
| 1971 | { "DMIC L2", NULL, "DMIC CLK" }, |
| 1972 | { "DMIC L2", NULL, "DMIC2 Power" }, |
| 1973 | { "DMIC R2", NULL, "DMIC CLK" }, |
| 1974 | { "DMIC R2", NULL, "DMIC2 Power" }, |
| 1975 | { "DMIC L3", NULL, "DMIC CLK" }, |
| 1976 | { "DMIC L3", NULL, "DMIC3 Power" }, |
| 1977 | { "DMIC R3", NULL, "DMIC CLK" }, |
| 1978 | { "DMIC R3", NULL, "DMIC3 Power" }, |
| 1979 | |
| 1980 | { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, |
| 1981 | { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, |
| 1982 | { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" }, |
| 1983 | |
| 1984 | { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" }, |
| 1985 | { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" }, |
| 1986 | { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" }, |
| 1987 | |
| 1988 | { "Mono DMIC L Mux", "DMIC1", "DMIC L1" }, |
| 1989 | { "Mono DMIC L Mux", "DMIC2", "DMIC L2" }, |
| 1990 | { "Mono DMIC L Mux", "DMIC3", "DMIC L3" }, |
| 1991 | |
| 1992 | { "Mono DMIC R Mux", "DMIC1", "DMIC R1" }, |
| 1993 | { "Mono DMIC R Mux", "DMIC2", "DMIC R2" }, |
| 1994 | { "Mono DMIC R Mux", "DMIC3", "DMIC R3" }, |
| 1995 | |
| 1996 | { "ADC 1_2", NULL, "ADC 1" }, |
| 1997 | { "ADC 1_2", NULL, "ADC 2" }, |
| 1998 | |
| 1999 | { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" }, |
| 2000 | { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, |
| 2001 | { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" }, |
| 2002 | { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, |
| 2003 | |
| 2004 | { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" }, |
| 2005 | { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, |
| 2006 | { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" }, |
| 2007 | { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, |
| 2008 | |
| 2009 | { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" }, |
| 2010 | { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, |
| 2011 | { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" }, |
| 2012 | { "Mono ADC L1 Mux", "ADC1", "ADC 1" }, |
| 2013 | |
| 2014 | { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, |
| 2015 | { "Mono ADC R1 Mux", "ADC2", "ADC 2" }, |
| 2016 | { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" }, |
| 2017 | { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" }, |
| 2018 | |
| 2019 | { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" }, |
| 2020 | { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" }, |
| 2021 | { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" }, |
| 2022 | { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" }, |
| 2023 | |
| 2024 | { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, |
| 2025 | { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" }, |
| 2026 | { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, |
| 2027 | |
| 2028 | { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, |
| 2029 | { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" }, |
| 2030 | { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, |
| 2031 | |
| 2032 | { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" }, |
| 2033 | { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" }, |
| 2034 | { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" }, |
| 2035 | { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, |
| 2036 | |
| 2037 | { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" }, |
| 2038 | { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" }, |
| 2039 | { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" }, |
| 2040 | { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, |
| 2041 | |
| 2042 | { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" }, |
| 2043 | { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" }, |
| 2044 | { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" }, |
| 2045 | { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" }, |
| 2046 | |
| 2047 | { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" }, |
| 2048 | { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" }, |
| 2049 | { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" }, |
| 2050 | { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" }, |
| 2051 | |
| 2052 | { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" }, |
| 2053 | { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" }, |
| 2054 | { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" }, |
| 2055 | { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" }, |
| 2056 | |
| 2057 | { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" }, |
| 2058 | { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" }, |
| 2059 | |
| 2060 | { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" }, |
| 2061 | { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" }, |
| 2062 | |
| 2063 | { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" }, |
| 2064 | { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" }, |
| 2065 | { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, |
| 2066 | |
| 2067 | { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" }, |
| 2068 | { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" }, |
| 2069 | { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll }, |
| 2070 | |
| 2071 | { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" }, |
| 2072 | { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" }, |
| 2073 | { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" }, |
| 2074 | { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" }, |
| 2075 | |
| 2076 | { "VAD_ADC", NULL, "VAD ADC Mux" }, |
| 2077 | |
| 2078 | { "IF_ADC1", NULL, "Stereo1 ADC MIXL" }, |
| 2079 | { "IF_ADC1", NULL, "Stereo1 ADC MIXR" }, |
| 2080 | { "IF_ADC2", NULL, "Mono ADC MIXL" }, |
| 2081 | { "IF_ADC2", NULL, "Mono ADC MIXR" }, |
| 2082 | { "IF_ADC3", NULL, "Stereo2 ADC MIXL" }, |
| 2083 | { "IF_ADC3", NULL, "Stereo2 ADC MIXR" }, |
| 2084 | |
| 2085 | { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" }, |
| 2086 | { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" }, |
| 2087 | |
| 2088 | { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" }, |
| 2089 | { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" }, |
| 2090 | |
| 2091 | { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" }, |
| 2092 | { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" }, |
| 2093 | |
| 2094 | { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" }, |
| 2095 | { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" }, |
| 2096 | |
| 2097 | { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" }, |
| 2098 | { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" }, |
| 2099 | |
| 2100 | { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" }, |
| 2101 | { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" }, |
| 2102 | { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" }, |
| 2103 | { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" }, |
| 2104 | { "Mono ADC MIX", NULL, "Mono ADC MIXL" }, |
| 2105 | { "Mono ADC MIX", NULL, "Mono ADC MIXR" }, |
| 2106 | |
| 2107 | { "RxDP Mux", "IF2 DAC", "IF2 DAC" }, |
| 2108 | { "RxDP Mux", "IF1 DAC", "IF1 DAC2" }, |
| 2109 | { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" }, |
| 2110 | { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" }, |
| 2111 | { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" }, |
| 2112 | { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" }, |
| 2113 | { "RxDP Mux", "DAC1", "DAC MIX" }, |
| 2114 | |
| 2115 | { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" }, |
| 2116 | { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" }, |
| 2117 | { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" }, |
| 2118 | { "TDM Data Mux", "Slot 6-7", "IF2 DAC" }, |
| 2119 | |
| 2120 | { "DSP UL Mux", "Bypass", "TDM Data Mux" }, |
| 2121 | { "DSP UL Mux", NULL, "I2S DSP" }, |
| 2122 | { "DSP DL Mux", "Bypass", "RxDP Mux" }, |
| 2123 | { "DSP DL Mux", NULL, "I2S DSP" }, |
| 2124 | |
| 2125 | { "TxDP_ADC_L", NULL, "DSP UL Mux" }, |
| 2126 | { "TxDP_ADC_R", NULL, "DSP UL Mux" }, |
| 2127 | { "TxDC_DAC", NULL, "DSP DL Mux" }, |
| 2128 | |
| 2129 | { "TxDP_ADC", NULL, "TxDP_ADC_L" }, |
| 2130 | { "TxDP_ADC", NULL, "TxDP_ADC_R" }, |
| 2131 | |
| 2132 | { "IF1 ADC", NULL, "I2S1" }, |
| 2133 | { "IF1 ADC", NULL, "IF1_ADC1" }, |
| 2134 | { "IF1 ADC", NULL, "IF1_ADC2" }, |
| 2135 | { "IF1 ADC", NULL, "IF_ADC3" }, |
| 2136 | { "IF1 ADC", NULL, "TxDP_ADC" }, |
| 2137 | |
| 2138 | { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" }, |
| 2139 | { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" }, |
| 2140 | { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" }, |
| 2141 | { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" }, |
| 2142 | { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" }, |
| 2143 | { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" }, |
| 2144 | |
| 2145 | { "IF2 ADC L", NULL, "IF2 ADC Mux" }, |
| 2146 | { "IF2 ADC R", NULL, "IF2 ADC Mux" }, |
| 2147 | |
| 2148 | { "IF2 ADC", NULL, "I2S2" }, |
| 2149 | { "IF2 ADC", NULL, "IF2 ADC L" }, |
| 2150 | { "IF2 ADC", NULL, "IF2 ADC R" }, |
| 2151 | |
| 2152 | { "AIF1TX", NULL, "IF1 ADC" }, |
| 2153 | { "AIF2TX", NULL, "IF2 ADC" }, |
| 2154 | |
| 2155 | { "IF1 DAC1", NULL, "AIF1RX" }, |
| 2156 | { "IF1 DAC2", NULL, "AIF1RX" }, |
| 2157 | { "IF2 DAC", NULL, "AIF2RX" }, |
| 2158 | |
| 2159 | { "IF1 DAC1", NULL, "I2S1" }, |
| 2160 | { "IF1 DAC2", NULL, "I2S1" }, |
| 2161 | { "IF2 DAC", NULL, "I2S2" }, |
| 2162 | |
| 2163 | { "IF1 DAC2 L", NULL, "IF1 DAC2" }, |
| 2164 | { "IF1 DAC2 R", NULL, "IF1 DAC2" }, |
| 2165 | { "IF1 DAC1 L", NULL, "IF1 DAC1" }, |
| 2166 | { "IF1 DAC1 R", NULL, "IF1 DAC1" }, |
| 2167 | { "IF2 DAC L", NULL, "IF2 DAC" }, |
| 2168 | { "IF2 DAC R", NULL, "IF2 DAC" }, |
| 2169 | |
| 2170 | { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" }, |
| 2171 | { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" }, |
| 2172 | |
| 2173 | { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" }, |
| 2174 | { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" }, |
| 2175 | |
| 2176 | { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" }, |
| 2177 | { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" }, |
| 2178 | { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" }, |
| 2179 | { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" }, |
| 2180 | { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" }, |
| 2181 | { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" }, |
| 2182 | |
Bard Liao | 96927ac | 2014-11-06 12:23:54 +0800 | [diff] [blame] | 2183 | { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll }, |
| 2184 | { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll }, |
| 2185 | { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll }, |
| 2186 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2187 | { "DAC MIX", NULL, "DAC1 MIXL" }, |
| 2188 | { "DAC MIX", NULL, "DAC1 MIXR" }, |
| 2189 | |
| 2190 | { "Audio DSP", NULL, "DAC1 MIXL" }, |
| 2191 | { "Audio DSP", NULL, "DAC1 MIXR" }, |
| 2192 | |
| 2193 | { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" }, |
| 2194 | { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" }, |
| 2195 | { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" }, |
| 2196 | { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" }, |
| 2197 | { "DAC L2 Volume", NULL, "DAC L2 Mux" }, |
| 2198 | { "DAC L2 Volume", NULL, "DAC Mono Left Filter" }, |
| 2199 | |
| 2200 | { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" }, |
| 2201 | { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" }, |
| 2202 | { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" }, |
| 2203 | { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" }, |
| 2204 | { "DAC R2 Volume", NULL, "DAC R2 Mux" }, |
| 2205 | { "DAC R2 Volume", NULL, "DAC Mono Right Filter" }, |
| 2206 | |
| 2207 | { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, |
| 2208 | { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" }, |
| 2209 | { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, |
| 2210 | { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" }, |
| 2211 | { "Stereo DAC MIXL", NULL, "DAC L1 Power" }, |
| 2212 | { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, |
| 2213 | { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" }, |
| 2214 | { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, |
| 2215 | { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" }, |
| 2216 | { "Stereo DAC MIXR", NULL, "DAC R1 Power" }, |
| 2217 | |
| 2218 | { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" }, |
| 2219 | { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, |
| 2220 | { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, |
| 2221 | { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" }, |
| 2222 | { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" }, |
| 2223 | { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, |
| 2224 | { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, |
| 2225 | { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" }, |
| 2226 | |
| 2227 | { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" }, |
| 2228 | { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" }, |
| 2229 | { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" }, |
| 2230 | { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" }, |
| 2231 | { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" }, |
| 2232 | { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" }, |
| 2233 | |
| 2234 | { "DAC L1", NULL, "DAC L1 Power" }, |
| 2235 | { "DAC L1", NULL, "Stereo DAC MIXL" }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2236 | { "DAC R1", NULL, "DAC R1 Power" }, |
| 2237 | { "DAC R1", NULL, "Stereo DAC MIXR" }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2238 | { "DAC L2", NULL, "Mono DAC MIXL" }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2239 | { "DAC R2", NULL, "Mono DAC MIXR" }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2240 | |
| 2241 | { "OUT MIXL", "BST1 Switch", "BST1" }, |
| 2242 | { "OUT MIXL", "INL Switch", "INL VOL" }, |
| 2243 | { "OUT MIXL", "DAC L2 Switch", "DAC L2" }, |
| 2244 | { "OUT MIXL", "DAC L1 Switch", "DAC L1" }, |
| 2245 | |
| 2246 | { "OUT MIXR", "BST2 Switch", "BST2" }, |
| 2247 | { "OUT MIXR", "INR Switch", "INR VOL" }, |
| 2248 | { "OUT MIXR", "DAC R2 Switch", "DAC R2" }, |
| 2249 | { "OUT MIXR", "DAC R1 Switch", "DAC R1" }, |
| 2250 | |
| 2251 | { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" }, |
| 2252 | { "HPOVOL MIXL", "INL Switch", "INL VOL" }, |
| 2253 | { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" }, |
| 2254 | { "HPOVOL MIXR", "INR Switch", "INR VOL" }, |
| 2255 | |
| 2256 | { "DAC 2", NULL, "DAC L2" }, |
| 2257 | { "DAC 2", NULL, "DAC R2" }, |
| 2258 | { "DAC 1", NULL, "DAC L1" }, |
| 2259 | { "DAC 1", NULL, "DAC R1" }, |
| 2260 | { "HPOVOL", NULL, "HPOVOL MIXL" }, |
| 2261 | { "HPOVOL", NULL, "HPOVOL MIXR" }, |
| 2262 | { "HPO MIX", "DAC1 Switch", "DAC 1" }, |
| 2263 | { "HPO MIX", "HPVOL Switch", "HPOVOL" }, |
| 2264 | |
| 2265 | { "LOUT MIX", "DAC L1 Switch", "DAC L1" }, |
| 2266 | { "LOUT MIX", "DAC R1 Switch", "DAC R1" }, |
| 2267 | { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" }, |
| 2268 | { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" }, |
| 2269 | |
| 2270 | { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, |
| 2271 | { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" }, |
| 2272 | { "PDM1 L Mux", NULL, "PDM1 Power" }, |
| 2273 | { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, |
| 2274 | { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" }, |
| 2275 | { "PDM1 R Mux", NULL, "PDM1 Power" }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2276 | |
| 2277 | { "HP Amp", NULL, "HPO MIX" }, |
| 2278 | { "HP Amp", NULL, "Mic Det Power" }, |
| 2279 | { "HPOL", NULL, "HP Amp" }, |
| 2280 | { "HPOL", NULL, "HP L Amp" }, |
| 2281 | { "HPOL", NULL, "Improve HP Amp Drv" }, |
| 2282 | { "HPOR", NULL, "HP Amp" }, |
| 2283 | { "HPOR", NULL, "HP R Amp" }, |
| 2284 | { "HPOR", NULL, "Improve HP Amp Drv" }, |
| 2285 | |
| 2286 | { "LOUT Amp", NULL, "LOUT MIX" }, |
| 2287 | { "LOUT L Playback", "Switch", "LOUT Amp" }, |
| 2288 | { "LOUT R Playback", "Switch", "LOUT Amp" }, |
| 2289 | { "LOUTL", NULL, "LOUT L Playback" }, |
| 2290 | { "LOUTR", NULL, "LOUT R Playback" }, |
| 2291 | { "LOUTL", NULL, "Improve HP Amp Drv" }, |
| 2292 | { "LOUTR", NULL, "Improve HP Amp Drv" }, |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 2293 | }; |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2294 | |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 2295 | static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = { |
| 2296 | { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" }, |
| 2297 | { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" }, |
| 2298 | { "PDM2 L Mux", NULL, "PDM2 Power" }, |
| 2299 | { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" }, |
| 2300 | { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" }, |
| 2301 | { "PDM2 R Mux", NULL, "PDM2 Power" }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2302 | { "PDM1L", NULL, "PDM1 L Mux" }, |
| 2303 | { "PDM1R", NULL, "PDM1 R Mux" }, |
| 2304 | { "PDM2L", NULL, "PDM2 L Mux" }, |
| 2305 | { "PDM2R", NULL, "PDM2 R Mux" }, |
| 2306 | }; |
| 2307 | |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 2308 | static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = { |
| 2309 | { "SPO Amp", NULL, "PDM1 L Mux" }, |
| 2310 | { "SPO Amp", NULL, "PDM1 R Mux" }, |
| 2311 | { "SPOLP", NULL, "SPO Amp" }, |
| 2312 | { "SPOLN", NULL, "SPO Amp" }, |
| 2313 | { "SPORP", NULL, "SPO Amp" }, |
| 2314 | { "SPORN", NULL, "SPO Amp" }, |
| 2315 | }; |
| 2316 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2317 | static int rt5670_hw_params(struct snd_pcm_substream *substream, |
| 2318 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
| 2319 | { |
| 2320 | struct snd_soc_codec *codec = dai->codec; |
| 2321 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 2322 | unsigned int val_len = 0, val_clk, mask_clk; |
| 2323 | int pre_div, bclk_ms, frame_size; |
| 2324 | |
| 2325 | rt5670->lrck[dai->id] = params_rate(params); |
| 2326 | pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]); |
| 2327 | if (pre_div < 0) { |
| 2328 | dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n", |
| 2329 | rt5670->lrck[dai->id], dai->id); |
| 2330 | return -EINVAL; |
| 2331 | } |
| 2332 | frame_size = snd_soc_params_to_frame_size(params); |
| 2333 | if (frame_size < 0) { |
| 2334 | dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); |
| 2335 | return -EINVAL; |
| 2336 | } |
| 2337 | bclk_ms = frame_size > 32; |
| 2338 | rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms); |
| 2339 | |
| 2340 | dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", |
| 2341 | rt5670->bclk[dai->id], rt5670->lrck[dai->id]); |
| 2342 | dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", |
| 2343 | bclk_ms, pre_div, dai->id); |
| 2344 | |
| 2345 | switch (params_width(params)) { |
| 2346 | case 16: |
| 2347 | break; |
| 2348 | case 20: |
| 2349 | val_len |= RT5670_I2S_DL_20; |
| 2350 | break; |
| 2351 | case 24: |
| 2352 | val_len |= RT5670_I2S_DL_24; |
| 2353 | break; |
| 2354 | case 8: |
| 2355 | val_len |= RT5670_I2S_DL_8; |
| 2356 | break; |
| 2357 | default: |
| 2358 | return -EINVAL; |
| 2359 | } |
| 2360 | |
| 2361 | switch (dai->id) { |
| 2362 | case RT5670_AIF1: |
| 2363 | mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK; |
| 2364 | val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT | |
| 2365 | pre_div << RT5670_I2S_PD1_SFT; |
| 2366 | snd_soc_update_bits(codec, RT5670_I2S1_SDP, |
| 2367 | RT5670_I2S_DL_MASK, val_len); |
| 2368 | snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk); |
| 2369 | break; |
| 2370 | case RT5670_AIF2: |
| 2371 | mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK; |
| 2372 | val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT | |
| 2373 | pre_div << RT5670_I2S_PD2_SFT; |
| 2374 | snd_soc_update_bits(codec, RT5670_I2S2_SDP, |
| 2375 | RT5670_I2S_DL_MASK, val_len); |
| 2376 | snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk); |
| 2377 | break; |
| 2378 | default: |
| 2379 | dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); |
| 2380 | return -EINVAL; |
| 2381 | } |
| 2382 | |
| 2383 | return 0; |
| 2384 | } |
| 2385 | |
| 2386 | static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
| 2387 | { |
| 2388 | struct snd_soc_codec *codec = dai->codec; |
| 2389 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 2390 | unsigned int reg_val = 0; |
| 2391 | |
| 2392 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 2393 | case SND_SOC_DAIFMT_CBM_CFM: |
| 2394 | rt5670->master[dai->id] = 1; |
| 2395 | break; |
| 2396 | case SND_SOC_DAIFMT_CBS_CFS: |
| 2397 | reg_val |= RT5670_I2S_MS_S; |
| 2398 | rt5670->master[dai->id] = 0; |
| 2399 | break; |
| 2400 | default: |
| 2401 | return -EINVAL; |
| 2402 | } |
| 2403 | |
| 2404 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 2405 | case SND_SOC_DAIFMT_NB_NF: |
| 2406 | break; |
| 2407 | case SND_SOC_DAIFMT_IB_NF: |
| 2408 | reg_val |= RT5670_I2S_BP_INV; |
| 2409 | break; |
| 2410 | default: |
| 2411 | return -EINVAL; |
| 2412 | } |
| 2413 | |
| 2414 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 2415 | case SND_SOC_DAIFMT_I2S: |
| 2416 | break; |
| 2417 | case SND_SOC_DAIFMT_LEFT_J: |
| 2418 | reg_val |= RT5670_I2S_DF_LEFT; |
| 2419 | break; |
| 2420 | case SND_SOC_DAIFMT_DSP_A: |
| 2421 | reg_val |= RT5670_I2S_DF_PCM_A; |
| 2422 | break; |
| 2423 | case SND_SOC_DAIFMT_DSP_B: |
| 2424 | reg_val |= RT5670_I2S_DF_PCM_B; |
| 2425 | break; |
| 2426 | default: |
| 2427 | return -EINVAL; |
| 2428 | } |
| 2429 | |
| 2430 | switch (dai->id) { |
| 2431 | case RT5670_AIF1: |
| 2432 | snd_soc_update_bits(codec, RT5670_I2S1_SDP, |
| 2433 | RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | |
| 2434 | RT5670_I2S_DF_MASK, reg_val); |
| 2435 | break; |
| 2436 | case RT5670_AIF2: |
| 2437 | snd_soc_update_bits(codec, RT5670_I2S2_SDP, |
| 2438 | RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK | |
| 2439 | RT5670_I2S_DF_MASK, reg_val); |
| 2440 | break; |
| 2441 | default: |
| 2442 | dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); |
| 2443 | return -EINVAL; |
| 2444 | } |
| 2445 | return 0; |
| 2446 | } |
| 2447 | |
| 2448 | static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai, |
| 2449 | int clk_id, unsigned int freq, int dir) |
| 2450 | { |
| 2451 | struct snd_soc_codec *codec = dai->codec; |
| 2452 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 2453 | unsigned int reg_val = 0; |
| 2454 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2455 | switch (clk_id) { |
| 2456 | case RT5670_SCLK_S_MCLK: |
| 2457 | reg_val |= RT5670_SCLK_SRC_MCLK; |
| 2458 | break; |
| 2459 | case RT5670_SCLK_S_PLL1: |
| 2460 | reg_val |= RT5670_SCLK_SRC_PLL1; |
| 2461 | break; |
| 2462 | case RT5670_SCLK_S_RCCLK: |
| 2463 | reg_val |= RT5670_SCLK_SRC_RCCLK; |
| 2464 | break; |
| 2465 | default: |
| 2466 | dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); |
| 2467 | return -EINVAL; |
| 2468 | } |
| 2469 | snd_soc_update_bits(codec, RT5670_GLB_CLK, |
| 2470 | RT5670_SCLK_SRC_MASK, reg_val); |
| 2471 | rt5670->sysclk = freq; |
Bard Liao | 485372d | 2015-03-09 16:55:23 +0800 | [diff] [blame] | 2472 | if (clk_id != RT5670_SCLK_S_RCCLK) |
| 2473 | rt5670->sysclk_src = clk_id; |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2474 | |
| 2475 | dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); |
| 2476 | |
| 2477 | return 0; |
| 2478 | } |
| 2479 | |
| 2480 | static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, |
| 2481 | unsigned int freq_in, unsigned int freq_out) |
| 2482 | { |
| 2483 | struct snd_soc_codec *codec = dai->codec; |
| 2484 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 2485 | struct rl6231_pll_code pll_code; |
| 2486 | int ret; |
| 2487 | |
| 2488 | if (source == rt5670->pll_src && freq_in == rt5670->pll_in && |
| 2489 | freq_out == rt5670->pll_out) |
| 2490 | return 0; |
| 2491 | |
| 2492 | if (!freq_in || !freq_out) { |
| 2493 | dev_dbg(codec->dev, "PLL disabled\n"); |
| 2494 | |
| 2495 | rt5670->pll_in = 0; |
| 2496 | rt5670->pll_out = 0; |
| 2497 | snd_soc_update_bits(codec, RT5670_GLB_CLK, |
| 2498 | RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK); |
| 2499 | return 0; |
| 2500 | } |
| 2501 | |
| 2502 | switch (source) { |
| 2503 | case RT5670_PLL1_S_MCLK: |
| 2504 | snd_soc_update_bits(codec, RT5670_GLB_CLK, |
| 2505 | RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK); |
| 2506 | break; |
| 2507 | case RT5670_PLL1_S_BCLK1: |
| 2508 | case RT5670_PLL1_S_BCLK2: |
| 2509 | case RT5670_PLL1_S_BCLK3: |
| 2510 | case RT5670_PLL1_S_BCLK4: |
| 2511 | switch (dai->id) { |
| 2512 | case RT5670_AIF1: |
| 2513 | snd_soc_update_bits(codec, RT5670_GLB_CLK, |
| 2514 | RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1); |
| 2515 | break; |
| 2516 | case RT5670_AIF2: |
| 2517 | snd_soc_update_bits(codec, RT5670_GLB_CLK, |
| 2518 | RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2); |
| 2519 | break; |
| 2520 | default: |
| 2521 | dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id); |
| 2522 | return -EINVAL; |
| 2523 | } |
| 2524 | break; |
| 2525 | default: |
| 2526 | dev_err(codec->dev, "Unknown PLL source %d\n", source); |
| 2527 | return -EINVAL; |
| 2528 | } |
| 2529 | |
| 2530 | ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); |
| 2531 | if (ret < 0) { |
| 2532 | dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); |
| 2533 | return ret; |
| 2534 | } |
| 2535 | |
| 2536 | dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", |
| 2537 | pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), |
| 2538 | pll_code.n_code, pll_code.k_code); |
| 2539 | |
| 2540 | snd_soc_write(codec, RT5670_PLL_CTRL1, |
| 2541 | pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code); |
| 2542 | snd_soc_write(codec, RT5670_PLL_CTRL2, |
| 2543 | (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT | |
| 2544 | pll_code.m_bp << RT5670_PLL_M_BP_SFT); |
| 2545 | |
| 2546 | rt5670->pll_in = freq_in; |
| 2547 | rt5670->pll_out = freq_out; |
| 2548 | rt5670->pll_src = source; |
| 2549 | |
| 2550 | return 0; |
| 2551 | } |
| 2552 | |
| 2553 | static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, |
| 2554 | unsigned int rx_mask, int slots, int slot_width) |
| 2555 | { |
| 2556 | struct snd_soc_codec *codec = dai->codec; |
| 2557 | unsigned int val = 0; |
| 2558 | |
| 2559 | if (rx_mask || tx_mask) |
| 2560 | val |= (1 << 14); |
| 2561 | |
| 2562 | switch (slots) { |
| 2563 | case 4: |
| 2564 | val |= (1 << 12); |
| 2565 | break; |
| 2566 | case 6: |
| 2567 | val |= (2 << 12); |
| 2568 | break; |
| 2569 | case 8: |
| 2570 | val |= (3 << 12); |
| 2571 | break; |
| 2572 | case 2: |
| 2573 | break; |
| 2574 | default: |
| 2575 | return -EINVAL; |
| 2576 | } |
| 2577 | |
| 2578 | switch (slot_width) { |
| 2579 | case 20: |
| 2580 | val |= (1 << 10); |
| 2581 | break; |
| 2582 | case 24: |
| 2583 | val |= (2 << 10); |
| 2584 | break; |
| 2585 | case 32: |
| 2586 | val |= (3 << 10); |
| 2587 | break; |
| 2588 | case 16: |
| 2589 | break; |
| 2590 | default: |
| 2591 | return -EINVAL; |
| 2592 | } |
| 2593 | |
| 2594 | snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val); |
| 2595 | |
| 2596 | return 0; |
| 2597 | } |
| 2598 | |
| 2599 | static int rt5670_set_bias_level(struct snd_soc_codec *codec, |
| 2600 | enum snd_soc_bias_level level) |
| 2601 | { |
Bard Liao | 044b724 | 2014-11-12 19:54:30 +0800 | [diff] [blame] | 2602 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 2603 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2604 | switch (level) { |
| 2605 | case SND_SOC_BIAS_PREPARE: |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 2606 | if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) { |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2607 | snd_soc_update_bits(codec, RT5670_PWR_ANLG1, |
| 2608 | RT5670_PWR_VREF1 | RT5670_PWR_MB | |
| 2609 | RT5670_PWR_BG | RT5670_PWR_VREF2, |
| 2610 | RT5670_PWR_VREF1 | RT5670_PWR_MB | |
| 2611 | RT5670_PWR_BG | RT5670_PWR_VREF2); |
| 2612 | mdelay(10); |
| 2613 | snd_soc_update_bits(codec, RT5670_PWR_ANLG1, |
| 2614 | RT5670_PWR_FV1 | RT5670_PWR_FV2, |
| 2615 | RT5670_PWR_FV1 | RT5670_PWR_FV2); |
| 2616 | snd_soc_update_bits(codec, RT5670_CHARGE_PUMP, |
| 2617 | RT5670_OSW_L_MASK | RT5670_OSW_R_MASK, |
| 2618 | RT5670_OSW_L_DIS | RT5670_OSW_R_DIS); |
| 2619 | snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1); |
| 2620 | snd_soc_update_bits(codec, RT5670_PWR_ANLG1, |
| 2621 | RT5670_LDO_SEL_MASK, 0x3); |
| 2622 | } |
| 2623 | break; |
| 2624 | case SND_SOC_BIAS_STANDBY: |
Bard Liao | 044b724 | 2014-11-12 19:54:30 +0800 | [diff] [blame] | 2625 | snd_soc_update_bits(codec, RT5670_PWR_ANLG1, |
| 2626 | RT5670_PWR_VREF1 | RT5670_PWR_VREF2 | |
| 2627 | RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2628 | snd_soc_update_bits(codec, RT5670_PWR_ANLG1, |
| 2629 | RT5670_LDO_SEL_MASK, 0x1); |
| 2630 | break; |
Bard Liao | 044b724 | 2014-11-12 19:54:30 +0800 | [diff] [blame] | 2631 | case SND_SOC_BIAS_OFF: |
| 2632 | if (rt5670->pdata.jd_mode) |
| 2633 | snd_soc_update_bits(codec, RT5670_PWR_ANLG1, |
| 2634 | RT5670_PWR_VREF1 | RT5670_PWR_MB | |
| 2635 | RT5670_PWR_BG | RT5670_PWR_VREF2 | |
| 2636 | RT5670_PWR_FV1 | RT5670_PWR_FV2, |
| 2637 | RT5670_PWR_MB | RT5670_PWR_BG); |
| 2638 | else |
| 2639 | snd_soc_update_bits(codec, RT5670_PWR_ANLG1, |
| 2640 | RT5670_PWR_VREF1 | RT5670_PWR_MB | |
| 2641 | RT5670_PWR_BG | RT5670_PWR_VREF2 | |
| 2642 | RT5670_PWR_FV1 | RT5670_PWR_FV2, 0); |
| 2643 | |
| 2644 | snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0); |
| 2645 | break; |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2646 | |
| 2647 | default: |
| 2648 | break; |
| 2649 | } |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2650 | |
| 2651 | return 0; |
| 2652 | } |
| 2653 | |
| 2654 | static int rt5670_probe(struct snd_soc_codec *codec) |
| 2655 | { |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 2656 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2657 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 2658 | |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 2659 | switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) { |
| 2660 | case RT5670_ID_5670: |
| 2661 | case RT5670_ID_5671: |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 2662 | snd_soc_dapm_new_controls(dapm, |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 2663 | rt5670_specific_dapm_widgets, |
| 2664 | ARRAY_SIZE(rt5670_specific_dapm_widgets)); |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 2665 | snd_soc_dapm_add_routes(dapm, |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 2666 | rt5670_specific_dapm_routes, |
| 2667 | ARRAY_SIZE(rt5670_specific_dapm_routes)); |
| 2668 | break; |
| 2669 | case RT5670_ID_5672: |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 2670 | snd_soc_dapm_new_controls(dapm, |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 2671 | rt5672_specific_dapm_widgets, |
| 2672 | ARRAY_SIZE(rt5672_specific_dapm_widgets)); |
Lars-Peter Clausen | 6d8135f | 2015-05-19 21:49:10 +0200 | [diff] [blame] | 2673 | snd_soc_dapm_add_routes(dapm, |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 2674 | rt5672_specific_dapm_routes, |
| 2675 | ARRAY_SIZE(rt5672_specific_dapm_routes)); |
| 2676 | break; |
| 2677 | default: |
| 2678 | dev_err(codec->dev, |
| 2679 | "The driver is for RT5670 RT5671 or RT5672 only\n"); |
| 2680 | return -ENODEV; |
| 2681 | } |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2682 | rt5670->codec = codec; |
| 2683 | |
| 2684 | return 0; |
| 2685 | } |
| 2686 | |
| 2687 | static int rt5670_remove(struct snd_soc_codec *codec) |
| 2688 | { |
| 2689 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 2690 | |
| 2691 | regmap_write(rt5670->regmap, RT5670_RESET, 0); |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 2692 | snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2693 | return 0; |
| 2694 | } |
| 2695 | |
| 2696 | #ifdef CONFIG_PM |
| 2697 | static int rt5670_suspend(struct snd_soc_codec *codec) |
| 2698 | { |
| 2699 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 2700 | |
| 2701 | regcache_cache_only(rt5670->regmap, true); |
| 2702 | regcache_mark_dirty(rt5670->regmap); |
| 2703 | return 0; |
| 2704 | } |
| 2705 | |
| 2706 | static int rt5670_resume(struct snd_soc_codec *codec) |
| 2707 | { |
| 2708 | struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec); |
| 2709 | |
| 2710 | regcache_cache_only(rt5670->regmap, false); |
| 2711 | regcache_sync(rt5670->regmap); |
| 2712 | |
| 2713 | return 0; |
| 2714 | } |
| 2715 | #else |
| 2716 | #define rt5670_suspend NULL |
| 2717 | #define rt5670_resume NULL |
| 2718 | #endif |
| 2719 | |
| 2720 | #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000 |
| 2721 | #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ |
| 2722 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) |
| 2723 | |
Axel Lin | 6479304 | 2015-07-15 15:38:14 +0800 | [diff] [blame] | 2724 | static const struct snd_soc_dai_ops rt5670_aif_dai_ops = { |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2725 | .hw_params = rt5670_hw_params, |
| 2726 | .set_fmt = rt5670_set_dai_fmt, |
| 2727 | .set_sysclk = rt5670_set_dai_sysclk, |
| 2728 | .set_tdm_slot = rt5670_set_tdm_slot, |
| 2729 | .set_pll = rt5670_set_dai_pll, |
| 2730 | }; |
| 2731 | |
Mark Brown | ff62b95 | 2014-08-01 17:22:19 +0100 | [diff] [blame] | 2732 | static struct snd_soc_dai_driver rt5670_dai[] = { |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2733 | { |
| 2734 | .name = "rt5670-aif1", |
| 2735 | .id = RT5670_AIF1, |
| 2736 | .playback = { |
| 2737 | .stream_name = "AIF1 Playback", |
| 2738 | .channels_min = 1, |
| 2739 | .channels_max = 2, |
| 2740 | .rates = RT5670_STEREO_RATES, |
| 2741 | .formats = RT5670_FORMATS, |
| 2742 | }, |
| 2743 | .capture = { |
| 2744 | .stream_name = "AIF1 Capture", |
| 2745 | .channels_min = 1, |
| 2746 | .channels_max = 2, |
| 2747 | .rates = RT5670_STEREO_RATES, |
| 2748 | .formats = RT5670_FORMATS, |
| 2749 | }, |
| 2750 | .ops = &rt5670_aif_dai_ops, |
| 2751 | }, |
| 2752 | { |
| 2753 | .name = "rt5670-aif2", |
| 2754 | .id = RT5670_AIF2, |
| 2755 | .playback = { |
| 2756 | .stream_name = "AIF2 Playback", |
| 2757 | .channels_min = 1, |
| 2758 | .channels_max = 2, |
| 2759 | .rates = RT5670_STEREO_RATES, |
| 2760 | .formats = RT5670_FORMATS, |
| 2761 | }, |
| 2762 | .capture = { |
| 2763 | .stream_name = "AIF2 Capture", |
| 2764 | .channels_min = 1, |
| 2765 | .channels_max = 2, |
| 2766 | .rates = RT5670_STEREO_RATES, |
| 2767 | .formats = RT5670_FORMATS, |
| 2768 | }, |
| 2769 | .ops = &rt5670_aif_dai_ops, |
| 2770 | }, |
| 2771 | }; |
| 2772 | |
| 2773 | static struct snd_soc_codec_driver soc_codec_dev_rt5670 = { |
| 2774 | .probe = rt5670_probe, |
| 2775 | .remove = rt5670_remove, |
| 2776 | .suspend = rt5670_suspend, |
| 2777 | .resume = rt5670_resume, |
| 2778 | .set_bias_level = rt5670_set_bias_level, |
| 2779 | .idle_bias_off = true, |
Kuninori Morimoto | 462fe79 | 2016-08-08 09:23:24 +0000 | [diff] [blame] | 2780 | .component_driver = { |
| 2781 | .controls = rt5670_snd_controls, |
| 2782 | .num_controls = ARRAY_SIZE(rt5670_snd_controls), |
| 2783 | .dapm_widgets = rt5670_dapm_widgets, |
| 2784 | .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets), |
| 2785 | .dapm_routes = rt5670_dapm_routes, |
| 2786 | .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes), |
| 2787 | }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2788 | }; |
| 2789 | |
| 2790 | static const struct regmap_config rt5670_regmap = { |
| 2791 | .reg_bits = 8, |
| 2792 | .val_bits = 16, |
Bard Liao | 92b133f | 2015-02-09 14:41:50 +0800 | [diff] [blame] | 2793 | .use_single_rw = true, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2794 | .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) * |
| 2795 | RT5670_PR_SPACING), |
| 2796 | .volatile_reg = rt5670_volatile_register, |
| 2797 | .readable_reg = rt5670_readable_register, |
| 2798 | .cache_type = REGCACHE_RBTREE, |
| 2799 | .reg_defaults = rt5670_reg, |
| 2800 | .num_reg_defaults = ARRAY_SIZE(rt5670_reg), |
| 2801 | .ranges = rt5670_ranges, |
| 2802 | .num_ranges = ARRAY_SIZE(rt5670_ranges), |
| 2803 | }; |
| 2804 | |
| 2805 | static const struct i2c_device_id rt5670_i2c_id[] = { |
| 2806 | { "rt5670", 0 }, |
Bard Liao | 0cf1863 | 2014-11-11 17:59:50 +0800 | [diff] [blame] | 2807 | { "rt5671", 0 }, |
| 2808 | { "rt5672", 0 }, |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2809 | { } |
| 2810 | }; |
| 2811 | MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id); |
| 2812 | |
Mengdong Lin | 0605815 | 2014-11-14 15:51:34 +0800 | [diff] [blame] | 2813 | #ifdef CONFIG_ACPI |
Mathias Krause | 4e0ce6a | 2015-06-13 14:25:15 +0200 | [diff] [blame] | 2814 | static const struct acpi_device_id rt5670_acpi_match[] = { |
Mengdong Lin | 0605815 | 2014-11-14 15:51:34 +0800 | [diff] [blame] | 2815 | { "10EC5670", 0}, |
Takashi Iwai | 58153cc | 2017-04-04 19:32:28 +0000 | [diff] [blame] | 2816 | { "10EC5672", 0}, |
Pierre-Louis Bossart | d572cfb | 2017-04-04 19:32:28 +0000 | [diff] [blame] | 2817 | { "10EC5640", 0}, /* quirk */ |
Mengdong Lin | 0605815 | 2014-11-14 15:51:34 +0800 | [diff] [blame] | 2818 | { }, |
| 2819 | }; |
| 2820 | MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match); |
| 2821 | #endif |
| 2822 | |
Bard Liao | 223c055 | 2014-12-18 11:32:52 +0800 | [diff] [blame] | 2823 | static const struct dmi_system_id dmi_platform_intel_braswell[] = { |
| 2824 | { |
| 2825 | .ident = "Intel Braswell", |
| 2826 | .matches = { |
| 2827 | DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"), |
| 2828 | DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"), |
| 2829 | }, |
| 2830 | }, |
| 2831 | {} |
| 2832 | }; |
| 2833 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2834 | static int rt5670_i2c_probe(struct i2c_client *i2c, |
| 2835 | const struct i2c_device_id *id) |
| 2836 | { |
| 2837 | struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev); |
| 2838 | struct rt5670_priv *rt5670; |
| 2839 | int ret; |
| 2840 | unsigned int val; |
| 2841 | |
| 2842 | rt5670 = devm_kzalloc(&i2c->dev, |
| 2843 | sizeof(struct rt5670_priv), |
| 2844 | GFP_KERNEL); |
| 2845 | if (NULL == rt5670) |
| 2846 | return -ENOMEM; |
| 2847 | |
| 2848 | i2c_set_clientdata(i2c, rt5670); |
| 2849 | |
| 2850 | if (pdata) |
| 2851 | rt5670->pdata = *pdata; |
| 2852 | |
Bard Liao | 223c055 | 2014-12-18 11:32:52 +0800 | [diff] [blame] | 2853 | if (dmi_check_system(dmi_platform_intel_braswell)) { |
| 2854 | rt5670->pdata.dmic_en = true; |
| 2855 | rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P; |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 2856 | rt5670->pdata.dev_gpio = true; |
Bard Liao | 223c055 | 2014-12-18 11:32:52 +0800 | [diff] [blame] | 2857 | rt5670->pdata.jd_mode = 1; |
| 2858 | } |
| 2859 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2860 | rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap); |
| 2861 | if (IS_ERR(rt5670->regmap)) { |
| 2862 | ret = PTR_ERR(rt5670->regmap); |
| 2863 | dev_err(&i2c->dev, "Failed to allocate register map: %d\n", |
| 2864 | ret); |
| 2865 | return ret; |
| 2866 | } |
| 2867 | |
| 2868 | regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val); |
| 2869 | if (val != RT5670_DEVICE_ID) { |
| 2870 | dev_err(&i2c->dev, |
Jarkko Nikula | 387ad57 | 2015-06-25 13:59:00 +0300 | [diff] [blame] | 2871 | "Device with ID register %#x is not rt5670/72\n", val); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2872 | return -ENODEV; |
| 2873 | } |
| 2874 | |
| 2875 | regmap_write(rt5670->regmap, RT5670_RESET, 0); |
| 2876 | regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, |
| 2877 | RT5670_PWR_HP_L | RT5670_PWR_HP_R | |
| 2878 | RT5670_PWR_VREF2, RT5670_PWR_VREF2); |
| 2879 | msleep(100); |
| 2880 | |
| 2881 | regmap_write(rt5670->regmap, RT5670_RESET, 0); |
| 2882 | |
Bard Liao | 2bf9eba | 2015-03-03 18:31:29 +0800 | [diff] [blame] | 2883 | regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val); |
| 2884 | if (val >= 4) |
| 2885 | regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980); |
| 2886 | else |
| 2887 | regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00); |
| 2888 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2889 | ret = regmap_register_patch(rt5670->regmap, init_list, |
| 2890 | ARRAY_SIZE(init_list)); |
| 2891 | if (ret != 0) |
| 2892 | dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); |
| 2893 | |
| 2894 | if (rt5670->pdata.in2_diff) |
| 2895 | regmap_update_bits(rt5670->regmap, RT5670_IN2, |
| 2896 | RT5670_IN_DF2, RT5670_IN_DF2); |
| 2897 | |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 2898 | if (rt5670->pdata.dev_gpio) { |
| 2899 | /* for push button */ |
| 2900 | regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000); |
| 2901 | regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010); |
| 2902 | regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014); |
| 2903 | /* for irq */ |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2904 | regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, |
| 2905 | RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ); |
| 2906 | regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2, |
| 2907 | RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT); |
Bard Liao | d3ef705 | 2015-03-11 11:42:44 +0800 | [diff] [blame] | 2908 | regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC, 0x8, 0x8); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2909 | } |
| 2910 | |
| 2911 | if (rt5670->pdata.jd_mode) { |
Bard Liao | 026e7368 | 2014-12-15 15:42:34 +0800 | [diff] [blame] | 2912 | regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK, |
| 2913 | RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK); |
| 2914 | rt5670->sysclk = 0; |
| 2915 | rt5670->sysclk_src = RT5670_SCLK_S_RCCLK; |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 2916 | regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1, |
| 2917 | RT5670_PWR_MB, RT5670_PWR_MB); |
| 2918 | regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2, |
| 2919 | RT5670_PWR_JD1, RT5670_PWR_JD1); |
| 2920 | regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1, |
| 2921 | RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN); |
| 2922 | regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3, |
| 2923 | RT5670_JD_TRI_CBJ_SEL_MASK | |
| 2924 | RT5670_JD_TRI_HPO_SEL_MASK, |
| 2925 | RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1); |
| 2926 | switch (rt5670->pdata.jd_mode) { |
| 2927 | case 1: |
| 2928 | regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, |
| 2929 | RT5670_JD1_MODE_MASK, |
| 2930 | RT5670_JD1_MODE_0); |
| 2931 | break; |
| 2932 | case 2: |
| 2933 | regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, |
| 2934 | RT5670_JD1_MODE_MASK, |
| 2935 | RT5670_JD1_MODE_1); |
| 2936 | break; |
| 2937 | case 3: |
| 2938 | regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1, |
| 2939 | RT5670_JD1_MODE_MASK, |
| 2940 | RT5670_JD1_MODE_2); |
| 2941 | break; |
| 2942 | default: |
| 2943 | break; |
| 2944 | } |
| 2945 | } |
| 2946 | |
| 2947 | if (rt5670->pdata.dmic_en) { |
| 2948 | regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, |
| 2949 | RT5670_GP2_PIN_MASK, |
| 2950 | RT5670_GP2_PIN_DMIC1_SCL); |
| 2951 | |
| 2952 | switch (rt5670->pdata.dmic1_data_pin) { |
| 2953 | case RT5670_DMIC_DATA_IN2P: |
| 2954 | regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, |
| 2955 | RT5670_DMIC_1_DP_MASK, |
| 2956 | RT5670_DMIC_1_DP_IN2P); |
| 2957 | break; |
| 2958 | |
| 2959 | case RT5670_DMIC_DATA_GPIO6: |
| 2960 | regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, |
| 2961 | RT5670_DMIC_1_DP_MASK, |
| 2962 | RT5670_DMIC_1_DP_GPIO6); |
| 2963 | regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, |
| 2964 | RT5670_GP6_PIN_MASK, |
| 2965 | RT5670_GP6_PIN_DMIC1_SDA); |
| 2966 | break; |
| 2967 | |
| 2968 | case RT5670_DMIC_DATA_GPIO7: |
| 2969 | regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, |
| 2970 | RT5670_DMIC_1_DP_MASK, |
| 2971 | RT5670_DMIC_1_DP_GPIO7); |
| 2972 | regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, |
| 2973 | RT5670_GP7_PIN_MASK, |
| 2974 | RT5670_GP7_PIN_DMIC1_SDA); |
| 2975 | break; |
| 2976 | |
| 2977 | default: |
| 2978 | break; |
| 2979 | } |
| 2980 | |
| 2981 | switch (rt5670->pdata.dmic2_data_pin) { |
| 2982 | case RT5670_DMIC_DATA_IN3N: |
| 2983 | regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, |
| 2984 | RT5670_DMIC_2_DP_MASK, |
| 2985 | RT5670_DMIC_2_DP_IN3N); |
| 2986 | break; |
| 2987 | |
| 2988 | case RT5670_DMIC_DATA_GPIO8: |
| 2989 | regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1, |
| 2990 | RT5670_DMIC_2_DP_MASK, |
| 2991 | RT5670_DMIC_2_DP_GPIO8); |
| 2992 | regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, |
| 2993 | RT5670_GP8_PIN_MASK, |
| 2994 | RT5670_GP8_PIN_DMIC2_SDA); |
| 2995 | break; |
| 2996 | |
| 2997 | default: |
| 2998 | break; |
| 2999 | } |
| 3000 | |
| 3001 | switch (rt5670->pdata.dmic3_data_pin) { |
| 3002 | case RT5670_DMIC_DATA_GPIO5: |
| 3003 | regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2, |
| 3004 | RT5670_DMIC_3_DP_MASK, |
| 3005 | RT5670_DMIC_3_DP_GPIO5); |
| 3006 | regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1, |
| 3007 | RT5670_GP5_PIN_MASK, |
| 3008 | RT5670_GP5_PIN_DMIC3_SDA); |
| 3009 | break; |
| 3010 | |
| 3011 | case RT5670_DMIC_DATA_GPIO9: |
| 3012 | case RT5670_DMIC_DATA_GPIO10: |
| 3013 | dev_err(&i2c->dev, |
| 3014 | "Always use GPIO5 as DMIC3 data pin\n"); |
| 3015 | break; |
| 3016 | |
| 3017 | default: |
| 3018 | break; |
| 3019 | } |
| 3020 | |
| 3021 | } |
| 3022 | |
Bard Liao | 64e89e5 | 2014-12-15 15:42:33 +0800 | [diff] [blame] | 3023 | pm_runtime_enable(&i2c->dev); |
| 3024 | pm_request_idle(&i2c->dev); |
| 3025 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 3026 | ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670, |
| 3027 | rt5670_dai, ARRAY_SIZE(rt5670_dai)); |
| 3028 | if (ret < 0) |
| 3029 | goto err; |
| 3030 | |
Bard Liao | 64e89e5 | 2014-12-15 15:42:33 +0800 | [diff] [blame] | 3031 | pm_runtime_put(&i2c->dev); |
| 3032 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 3033 | return 0; |
| 3034 | err: |
Bard Liao | 64e89e5 | 2014-12-15 15:42:33 +0800 | [diff] [blame] | 3035 | pm_runtime_disable(&i2c->dev); |
| 3036 | |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 3037 | return ret; |
| 3038 | } |
| 3039 | |
| 3040 | static int rt5670_i2c_remove(struct i2c_client *i2c) |
| 3041 | { |
Bard Liao | 64e89e5 | 2014-12-15 15:42:33 +0800 | [diff] [blame] | 3042 | pm_runtime_disable(&i2c->dev); |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 3043 | snd_soc_unregister_codec(&i2c->dev); |
| 3044 | |
| 3045 | return 0; |
| 3046 | } |
| 3047 | |
Mark Brown | ff62b95 | 2014-08-01 17:22:19 +0100 | [diff] [blame] | 3048 | static struct i2c_driver rt5670_i2c_driver = { |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 3049 | .driver = { |
| 3050 | .name = "rt5670", |
Mengdong Lin | 0605815 | 2014-11-14 15:51:34 +0800 | [diff] [blame] | 3051 | .acpi_match_table = ACPI_PTR(rt5670_acpi_match), |
Bard Liao | 5e8351d | 2014-06-30 20:31:13 +0800 | [diff] [blame] | 3052 | }, |
| 3053 | .probe = rt5670_i2c_probe, |
| 3054 | .remove = rt5670_i2c_remove, |
| 3055 | .id_table = rt5670_i2c_id, |
| 3056 | }; |
| 3057 | |
| 3058 | module_i2c_driver(rt5670_i2c_driver); |
| 3059 | |
| 3060 | MODULE_DESCRIPTION("ASoC RT5670 driver"); |
| 3061 | MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); |
| 3062 | MODULE_LICENSE("GPL v2"); |