blob: b340552efe4e32ac83bb9d1a52b69b87079b1ef7 [file] [log] [blame]
Mark Browna2342ae2009-07-29 21:21:49 +01001/*
2 * wm_hubs.c -- WM8993/4 common code
3 *
Mark Brown656baae2012-05-23 12:39:07 +01004 * Copyright 2009-12 Wolfson Microelectronics plc
Mark Browna2342ae2009-07-29 21:21:49 +01005 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
Mark Brown79ef0ab2011-08-01 13:02:17 +090020#include <linux/mfd/wm8994/registers.h>
Mark Browna2342ae2009-07-29 21:21:49 +010021#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
Mark Browna2342ae2009-07-29 21:21:49 +010025#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "wm8993.h"
29#include "wm_hubs.h"
30
31const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
32EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
33
34static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
35static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
36static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
37static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
38static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
39static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
40static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
41static const unsigned int spkboost_tlv[] = {
Clemens Ladisch028aa632011-11-20 15:15:31 +010042 TLV_DB_RANGE_HEAD(2),
Mark Browna2342ae2009-07-29 21:21:49 +010043 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
45};
46static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
47
48static const char *speaker_ref_text[] = {
49 "SPKVDD/2",
50 "VMID",
51};
52
53static const struct soc_enum speaker_ref =
54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
55
56static const char *speaker_mode_text[] = {
57 "Class D",
58 "Class AB",
59};
60
61static const struct soc_enum speaker_mode =
62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
63
Mark Brown4dcc93d2010-03-29 17:18:41 +010064static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
Mark Browna2342ae2009-07-29 21:21:49 +010065{
Mark Brownd96ca3c2011-07-12 15:25:03 +090066 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Browna2342ae2009-07-29 21:21:49 +010067 unsigned int reg;
68 int count = 0;
Mark Brown1479c3f2011-07-15 17:33:26 +090069 int timeout;
Mark Brown4dcc93d2010-03-29 17:18:41 +010070 unsigned int val;
71
72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
73
74 /* Trigger the command */
75 snd_soc_write(codec, WM8993_DC_SERVO_0, val);
Mark Browna2342ae2009-07-29 21:21:49 +010076
77 dev_dbg(codec->dev, "Waiting for DC servo...\n");
Mark Brown3ed70742010-01-20 17:39:45 +000078
Mark Brown1479c3f2011-07-15 17:33:26 +090079 if (hubs->dcs_done_irq)
80 timeout = 4;
81 else
82 timeout = 400;
83
84 do {
85 count++;
86
87 if (hubs->dcs_done_irq)
88 wait_for_completion_timeout(&hubs->dcs_done,
89 msecs_to_jiffies(250));
90 else
91 msleep(1);
Mark Brownd96ca3c2011-07-12 15:25:03 +090092
Mark Brown4dcc93d2010-03-29 17:18:41 +010093 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
Mark Brown1479c3f2011-07-15 17:33:26 +090094 dev_dbg(codec->dev, "DC servo: %x\n", reg);
95 } while (reg & op && count < timeout);
Mark Browna2342ae2009-07-29 21:21:49 +010096
Mark Brown4dcc93d2010-03-29 17:18:41 +010097 if (reg & op)
Mark Brown5a9f91c2011-02-17 12:05:46 -080098 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
99 op);
Mark Browna2342ae2009-07-29 21:21:49 +0100100}
101
Mark Brownd96ca3c2011-07-12 15:25:03 +0900102irqreturn_t wm_hubs_dcs_done(int irq, void *data)
103{
104 struct wm_hubs_data *hubs = data;
105
106 complete(&hubs->dcs_done);
107
108 return IRQ_HANDLED;
109}
110EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
111
Mark Brownaf31a222012-04-26 20:06:56 +0100112static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec)
113{
114 int reg;
115
116 /* If we're going via the mixer we'll need to do additional checks */
117 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1);
118 if (!(reg & WM8993_DACL_TO_HPOUT1L)) {
119 if (reg & ~WM8993_DACL_TO_MIXOUTL) {
120 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
121 reg & ~WM8993_DACL_TO_HPOUT1L);
122 return false;
123 } else {
124 dev_vdbg(codec->dev, "HPL connected to mixer\n");
Mark Brownaf31a222012-04-26 20:06:56 +0100125 }
126 } else {
127 dev_vdbg(codec->dev, "HPL connected to DAC\n");
128 }
129
130 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2);
131 if (!(reg & WM8993_DACR_TO_HPOUT1R)) {
132 if (reg & ~WM8993_DACR_TO_MIXOUTR) {
133 dev_vdbg(codec->dev, "Analogue paths connected: %x\n",
134 reg & ~WM8993_DACR_TO_HPOUT1R);
135 return false;
136 } else {
137 dev_vdbg(codec->dev, "HPR connected to mixer\n");
Mark Brownaf31a222012-04-26 20:06:56 +0100138 }
139 } else {
140 dev_vdbg(codec->dev, "HPR connected to DAC\n");
141 }
142
143 return true;
144}
145
Mark Brown94aa7332012-05-01 18:45:09 +0100146struct wm_hubs_dcs_cache {
147 struct list_head list;
148 unsigned int left;
149 unsigned int right;
150 u16 dcs_cfg;
151};
152
153static bool wm_hubs_dcs_cache_get(struct snd_soc_codec *codec,
154 struct wm_hubs_dcs_cache **entry)
155{
156 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
157 struct wm_hubs_dcs_cache *cache;
158 unsigned int left, right;
159
160 left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME);
161 left &= WM8993_HPOUT1L_VOL_MASK;
162
163 right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME);
164 right &= WM8993_HPOUT1R_VOL_MASK;
165
166 list_for_each_entry(cache, &hubs->dcs_cache, list) {
167 if (cache->left != left || cache->right != right)
168 continue;
169
170 *entry = cache;
171 return true;
172 }
173
174 return false;
175}
176
177static void wm_hubs_dcs_cache_set(struct snd_soc_codec *codec, u16 dcs_cfg)
178{
179 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
180 struct wm_hubs_dcs_cache *cache;
181
182 if (hubs->no_cache_dac_hp_direct)
183 return;
184
185 cache = devm_kzalloc(codec->dev, sizeof(*cache), GFP_KERNEL);
186 if (!cache) {
187 dev_err(codec->dev, "Failed to allocate DCS cache entry\n");
188 return;
189 }
190
191 cache->left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME);
192 cache->left &= WM8993_HPOUT1L_VOL_MASK;
193
194 cache->right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME);
195 cache->right &= WM8993_HPOUT1R_VOL_MASK;
196
197 cache->dcs_cfg = dcs_cfg;
198
199 list_add_tail(&cache->list, &hubs->dcs_cache);
200}
201
Mark Brownfae4efa2012-07-23 19:49:06 +0100202static void wm_hubs_read_dc_servo(struct snd_soc_codec *codec,
203 u16 *reg_l, u16 *reg_r)
204{
205 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
206 u16 dcs_reg, reg;
207
208 switch (hubs->dcs_readback_mode) {
209 case 2:
210 dcs_reg = WM8994_DC_SERVO_4E;
211 break;
212 case 1:
213 dcs_reg = WM8994_DC_SERVO_READBACK;
214 break;
215 default:
216 dcs_reg = WM8993_DC_SERVO_3;
217 break;
218 }
219
220 /* Different chips in the family support different readback
221 * methods.
222 */
223 switch (hubs->dcs_readback_mode) {
224 case 0:
225 *reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
226 & WM8993_DCS_INTEG_CHAN_0_MASK;
227 *reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
228 & WM8993_DCS_INTEG_CHAN_1_MASK;
229 break;
230 case 2:
231 case 1:
232 reg = snd_soc_read(codec, dcs_reg);
233 *reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
234 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
235 *reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
236 break;
237 default:
238 WARN(1, "Unknown DCS readback method\n");
239 return;
240 }
241}
242
Mark Browna2342ae2009-07-29 21:21:49 +0100243/*
Mark Brown3ed70742010-01-20 17:39:45 +0000244 * Startup calibration of the DC servo
245 */
Mark Browna7892c32012-07-23 19:50:45 +0100246static void enable_dc_servo(struct snd_soc_codec *codec)
Mark Brown3ed70742010-01-20 17:39:45 +0000247{
Mark Brownb2c812e2010-04-14 15:35:19 +0900248 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Brown94aa7332012-05-01 18:45:09 +0100249 struct wm_hubs_dcs_cache *cache;
Mark Brown20a4e7f2011-01-21 12:47:33 +0000250 s8 offset;
Mark Brownfae4efa2012-07-23 19:49:06 +0100251 u16 reg_l, reg_r, dcs_cfg, dcs_reg;
Mark Brown79ef0ab2011-08-01 13:02:17 +0900252
253 switch (hubs->dcs_readback_mode) {
254 case 2:
255 dcs_reg = WM8994_DC_SERVO_4E;
256 break;
257 default:
258 dcs_reg = WM8993_DC_SERVO_3;
259 break;
260 }
Mark Brown3ed70742010-01-20 17:39:45 +0000261
Mark Brownfec6dd82010-10-27 13:48:36 -0700262 /* If we're using a digital only path and have a previously
263 * callibrated DC servo offset stored then use that. */
Mark Brown94aa7332012-05-01 18:45:09 +0100264 if (wm_hubs_dac_hp_direct(codec) &&
265 wm_hubs_dcs_cache_get(codec, &cache)) {
266 dev_dbg(codec->dev, "Using cached DCS offset %x for %d,%d\n",
267 cache->dcs_cfg, cache->left, cache->right);
268 snd_soc_write(codec, dcs_reg, cache->dcs_cfg);
Mark Brownfec6dd82010-10-27 13:48:36 -0700269 wait_for_dc_servo(codec,
270 WM8993_DCS_TRIG_DAC_WR_0 |
271 WM8993_DCS_TRIG_DAC_WR_1);
272 return;
273 }
274
Mark Brownf9acf9f2011-06-07 23:23:52 +0100275 if (hubs->series_startup) {
Mark Brown11cef5f2010-11-26 17:23:44 +0000276 /* Set for 32 series updates */
277 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
278 WM8993_DCS_SERIES_NO_01_MASK,
279 32 << WM8993_DCS_SERIES_NO_01_SHIFT);
280 wait_for_dc_servo(codec,
281 WM8993_DCS_TRIG_SERIES_0 |
282 WM8993_DCS_TRIG_SERIES_1);
283 } else {
284 wait_for_dc_servo(codec,
285 WM8993_DCS_TRIG_STARTUP_0 |
286 WM8993_DCS_TRIG_STARTUP_1);
287 }
Mark Brown3ed70742010-01-20 17:39:45 +0000288
Mark Brownfae4efa2012-07-23 19:49:06 +0100289 wm_hubs_read_dc_servo(codec, &reg_l, &reg_r);
Mark Brownfec6dd82010-10-27 13:48:36 -0700290
291 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
292
Mark Brown3ed70742010-01-20 17:39:45 +0000293 /* Apply correction to DC servo result */
Mark Brown4537c4e2011-08-01 13:10:16 +0900294 if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
295 dev_dbg(codec->dev,
296 "Applying %d/%d code DC servo correction\n",
297 hubs->dcs_codes_l, hubs->dcs_codes_r);
Mark Brown3ed70742010-01-20 17:39:45 +0000298
Mark Brownd5b040c2011-06-07 23:28:45 +0100299 /* HPOUT1R */
Mark Brown363947d2012-08-20 19:54:24 +0100300 offset = (s8)reg_r;
Mark Brown4537c4e2011-08-01 13:10:16 +0900301 offset += hubs->dcs_codes_r;
Mark Brown20a4e7f2011-01-21 12:47:33 +0000302 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
Mark Brown3ed70742010-01-20 17:39:45 +0000303
Mark Brownd5b040c2011-06-07 23:28:45 +0100304 /* HPOUT1L */
Mark Brown363947d2012-08-20 19:54:24 +0100305 offset = (s8)reg_l;
Mark Brown4537c4e2011-08-01 13:10:16 +0900306 offset += hubs->dcs_codes_l;
Mark Brown20a4e7f2011-01-21 12:47:33 +0000307 dcs_cfg |= (u8)offset;
Mark Brown3ed70742010-01-20 17:39:45 +0000308
Mark Brown3254d282010-05-10 14:56:03 +0100309 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
310
Mark Brown3ed70742010-01-20 17:39:45 +0000311 /* Do it */
Mark Brown79ef0ab2011-08-01 13:02:17 +0900312 snd_soc_write(codec, dcs_reg, dcs_cfg);
Mark Brown4dcc93d2010-03-29 17:18:41 +0100313 wait_for_dc_servo(codec,
314 WM8993_DCS_TRIG_DAC_WR_0 |
315 WM8993_DCS_TRIG_DAC_WR_1);
Mark Brownfec6dd82010-10-27 13:48:36 -0700316 } else {
Mark Brownd5b040c2011-06-07 23:28:45 +0100317 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
318 dcs_cfg |= reg_l;
Mark Brown3ed70742010-01-20 17:39:45 +0000319 }
Mark Brownfec6dd82010-10-27 13:48:36 -0700320
321 /* Save the callibrated offset if we're in class W mode and
322 * therefore don't have any analogue signal mixed in. */
Mark Brown94aa7332012-05-01 18:45:09 +0100323 if (wm_hubs_dac_hp_direct(codec))
324 wm_hubs_dcs_cache_set(codec, dcs_cfg);
Mark Brown3ed70742010-01-20 17:39:45 +0000325}
326
327/*
Mark Browna2342ae2009-07-29 21:21:49 +0100328 * Update the DC servo calibration on gain changes
329 */
330static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
Mark Brown3ed70742010-01-20 17:39:45 +0000331 struct snd_ctl_elem_value *ucontrol)
Mark Browna2342ae2009-07-29 21:21:49 +0100332{
333 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900334 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Browna2342ae2009-07-29 21:21:49 +0100335 int ret;
336
Peter Ujfalusic4671a92011-10-06 09:59:12 +0300337 ret = snd_soc_put_volsw(kcontrol, ucontrol);
Mark Browna2342ae2009-07-29 21:21:49 +0100338
Mark Brownae9d8602010-03-29 16:34:42 +0100339 /* If we're applying an offset correction then updating the
340 * callibration would be likely to introduce further offsets. */
Mark Brown4537c4e2011-08-01 13:10:16 +0900341 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
Mark Brownae9d8602010-03-29 16:34:42 +0100342 return ret;
343
Mark Browna2342ae2009-07-29 21:21:49 +0100344 /* Only need to do this if the outputs are active */
345 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
346 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
347 snd_soc_update_bits(codec,
348 WM8993_DC_SERVO_0,
349 WM8993_DCS_TRIG_SINGLE_0 |
350 WM8993_DCS_TRIG_SINGLE_1,
351 WM8993_DCS_TRIG_SINGLE_0 |
352 WM8993_DCS_TRIG_SINGLE_1);
353
354 return ret;
355}
356
357static const struct snd_kcontrol_new analogue_snd_controls[] = {
358SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
359 inpga_tlv),
360SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800361SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100362
363SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
364 inpga_tlv),
365SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800366SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100367
368
369SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
370 inpga_tlv),
371SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800372SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100373
374SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
375 inpga_tlv),
376SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
Mark Brownea02c632011-05-27 21:56:16 +0800377SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100378
379SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
380 inmix_sw_tlv),
381SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
382 inmix_sw_tlv),
383SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
384 inmix_tlv),
385SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
386SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
387 inmix_tlv),
388
389SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
390 inmix_sw_tlv),
391SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
392 inmix_sw_tlv),
393SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
394 inmix_tlv),
395SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
396SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
397 inmix_tlv),
398
399SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
400 outmix_tlv),
401SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
402 outmix_tlv),
403SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
404 outmix_tlv),
405SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
406 outmix_tlv),
407SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
408 outmix_tlv),
409SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
410 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
411SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
412 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
413SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
414 outmix_tlv),
415
416SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
417 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
418SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
419 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
420SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
421 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
422SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
423 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
424SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
425 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
426SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
427 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
428SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
429 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
430SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
431 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
432
433SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
434 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
435SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
436 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
437SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
438 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
439
440SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
441SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
442
443SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
444 5, 1, 1, wm_hubs_spkmix_tlv),
445SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
446 4, 1, 1, wm_hubs_spkmix_tlv),
447SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
448 3, 1, 1, wm_hubs_spkmix_tlv),
449
450SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
451 5, 1, 1, wm_hubs_spkmix_tlv),
452SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
453 4, 1, 1, wm_hubs_spkmix_tlv),
454SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
455 3, 1, 1, wm_hubs_spkmix_tlv),
456
457SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
458 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
459 0, 3, 1, spkmixout_tlv),
460SOC_DOUBLE_R_TLV("Speaker Volume",
461 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
462 0, 63, 0, outpga_tlv),
463SOC_DOUBLE_R("Speaker Switch",
464 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
465 6, 1, 0),
466SOC_DOUBLE_R("Speaker ZC Switch",
467 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
468 7, 1, 0),
Uk Kimed8cc472010-12-05 17:26:07 +0900469SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
Mark Browna2342ae2009-07-29 21:21:49 +0100470 spkboost_tlv),
471SOC_ENUM("Speaker Reference", speaker_ref),
472SOC_ENUM("Speaker Mode", speaker_mode),
473
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +0300474SOC_DOUBLE_R_EXT_TLV("Headphone Volume",
475 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME,
Peter Ujfalusic4671a92011-10-06 09:59:12 +0300476 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +0300477 outpga_tlv),
478
Mark Browna2342ae2009-07-29 21:21:49 +0100479SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
480 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
481SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
482 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
483
484SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
485SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
486SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
487 line_tlv),
488
489SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
490SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
491SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
492 line_tlv),
493};
494
Mark Brown3ed70742010-01-20 17:39:45 +0000495static int hp_supply_event(struct snd_soc_dapm_widget *w,
496 struct snd_kcontrol *kcontrol, int event)
497{
498 struct snd_soc_codec *codec = w->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900499 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Brown3ed70742010-01-20 17:39:45 +0000500
501 switch (event) {
502 case SND_SOC_DAPM_PRE_PMU:
503 switch (hubs->hp_startup_mode) {
504 case 0:
505 break;
506 case 1:
507 /* Enable the headphone amp */
508 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
509 WM8993_HPOUT1L_ENA |
510 WM8993_HPOUT1R_ENA,
511 WM8993_HPOUT1L_ENA |
512 WM8993_HPOUT1R_ENA);
513
514 /* Enable the second stage */
515 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
516 WM8993_HPOUT1L_DLY |
517 WM8993_HPOUT1R_DLY,
518 WM8993_HPOUT1L_DLY |
519 WM8993_HPOUT1R_DLY);
520 break;
521 default:
522 dev_err(codec->dev, "Unknown HP startup mode %d\n",
523 hubs->hp_startup_mode);
524 break;
525 }
526
527 case SND_SOC_DAPM_PRE_PMD:
528 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
529 WM8993_CP_ENA, 0);
530 break;
531 }
532
533 return 0;
534}
535
Mark Browna2342ae2009-07-29 21:21:49 +0100536static int hp_event(struct snd_soc_dapm_widget *w,
537 struct snd_kcontrol *kcontrol, int event)
538{
539 struct snd_soc_codec *codec = w->codec;
540 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
541
542 switch (event) {
543 case SND_SOC_DAPM_POST_PMU:
544 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
545 WM8993_CP_ENA, WM8993_CP_ENA);
546
547 msleep(5);
548
549 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
550 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
551 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
552
553 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
554 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
555
Mark Brown3ed70742010-01-20 17:39:45 +0000556 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
Mark Brownf9925d42011-07-28 12:44:44 +0100557 WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
Mark Brown3ed70742010-01-20 17:39:45 +0000558
Mark Browna7892c32012-07-23 19:50:45 +0100559 enable_dc_servo(codec);
Mark Browna2342ae2009-07-29 21:21:49 +0100560
561 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
562 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
563 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
564 break;
565
566 case SND_SOC_DAPM_PRE_PMD:
Mark Brown3ed70742010-01-20 17:39:45 +0000567 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
Mark Brown6adb26b2010-05-10 16:13:11 +0100568 WM8993_HPOUT1L_OUTP |
569 WM8993_HPOUT1R_OUTP |
Mark Brown3ed70742010-01-20 17:39:45 +0000570 WM8993_HPOUT1L_RMV_SHORT |
571 WM8993_HPOUT1R_RMV_SHORT, 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100572
Mark Brown3ed70742010-01-20 17:39:45 +0000573 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
Mark Brown6adb26b2010-05-10 16:13:11 +0100574 WM8993_HPOUT1L_DLY |
575 WM8993_HPOUT1R_DLY, 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100576
Mark Brown395e4b72010-05-10 21:06:14 +0100577 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
578
Mark Browna2342ae2009-07-29 21:21:49 +0100579 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
580 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
581 0);
Mark Browna2342ae2009-07-29 21:21:49 +0100582 break;
583 }
584
585 return 0;
586}
587
588static int earpiece_event(struct snd_soc_dapm_widget *w,
589 struct snd_kcontrol *control, int event)
590{
591 struct snd_soc_codec *codec = w->codec;
592 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
593
594 switch (event) {
595 case SND_SOC_DAPM_PRE_PMU:
596 reg |= WM8993_HPOUT2_IN_ENA;
597 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
598 udelay(50);
599 break;
600
601 case SND_SOC_DAPM_POST_PMD:
602 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
603 break;
604
605 default:
606 BUG();
607 break;
608 }
609
610 return 0;
611}
612
Mark Brown5f2f38902012-02-08 18:51:42 +0000613static int lineout_event(struct snd_soc_dapm_widget *w,
614 struct snd_kcontrol *control, int event)
615{
616 struct snd_soc_codec *codec = w->codec;
617 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
618 bool *flag;
619
620 switch (w->shift) {
621 case WM8993_LINEOUT1N_ENA_SHIFT:
622 flag = &hubs->lineout1n_ena;
623 break;
624 case WM8993_LINEOUT1P_ENA_SHIFT:
625 flag = &hubs->lineout1p_ena;
626 break;
627 case WM8993_LINEOUT2N_ENA_SHIFT:
628 flag = &hubs->lineout2n_ena;
629 break;
630 case WM8993_LINEOUT2P_ENA_SHIFT:
631 flag = &hubs->lineout2p_ena;
632 break;
633 default:
634 WARN(1, "Unknown line output");
635 return -EINVAL;
636 }
637
638 *flag = SND_SOC_DAPM_EVENT_ON(event);
639
640 return 0;
641}
642
Mark Brownc3403042012-04-26 21:29:29 +0100643void wm_hubs_update_class_w(struct snd_soc_codec *codec)
644{
645 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
646 int enable = WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ;
647
648 if (!wm_hubs_dac_hp_direct(codec))
649 enable = false;
650
651 if (hubs->check_class_w_digital && !hubs->check_class_w_digital(codec))
652 enable = false;
653
654 dev_vdbg(codec->dev, "Class W %s\n", enable ? "enabled" : "disabled");
655
656 snd_soc_update_bits(codec, WM8993_CLASS_W_0,
657 WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ, enable);
658}
659EXPORT_SYMBOL_GPL(wm_hubs_update_class_w);
660
Mark Brown04de57c2012-04-26 22:08:50 +0100661#define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \
662{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
663 .info = snd_soc_info_volsw, \
664 .get = snd_soc_dapm_get_volsw, .put = class_w_put_volsw, \
665 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
666
667static int class_w_put_volsw(struct snd_kcontrol *kcontrol,
668 struct snd_ctl_elem_value *ucontrol)
669{
670 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
671 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
672 struct snd_soc_codec *codec = widget->codec;
673 int ret;
674
675 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
676
677 wm_hubs_update_class_w(codec);
678
679 return ret;
680}
681
Mark Brownc3403042012-04-26 21:29:29 +0100682#define WM_HUBS_ENUM_W(xname, xenum) \
683{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
684 .info = snd_soc_info_enum_double, \
685 .get = snd_soc_dapm_get_enum_double, \
Mark Brown04de57c2012-04-26 22:08:50 +0100686 .put = class_w_put_double, \
Mark Brownc3403042012-04-26 21:29:29 +0100687 .private_value = (unsigned long)&xenum }
688
Mark Brown04de57c2012-04-26 22:08:50 +0100689static int class_w_put_double(struct snd_kcontrol *kcontrol,
690 struct snd_ctl_elem_value *ucontrol)
Mark Brownc3403042012-04-26 21:29:29 +0100691{
692 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
693 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
694 struct snd_soc_codec *codec = widget->codec;
695 int ret;
696
697 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
698
699 wm_hubs_update_class_w(codec);
700
701 return ret;
702}
703
704static const char *hp_mux_text[] = {
705 "Mixer",
706 "DAC",
707};
708
709static const struct soc_enum hpl_enum =
710 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
711
712const struct snd_kcontrol_new wm_hubs_hpl_mux =
713 WM_HUBS_ENUM_W("Left Headphone Mux", hpl_enum);
714EXPORT_SYMBOL_GPL(wm_hubs_hpl_mux);
715
716static const struct soc_enum hpr_enum =
717 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
718
719const struct snd_kcontrol_new wm_hubs_hpr_mux =
720 WM_HUBS_ENUM_W("Right Headphone Mux", hpr_enum);
721EXPORT_SYMBOL_GPL(wm_hubs_hpr_mux);
722
Mark Browna2342ae2009-07-29 21:21:49 +0100723static const struct snd_kcontrol_new in1l_pga[] = {
724SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
725SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
726};
727
728static const struct snd_kcontrol_new in1r_pga[] = {
729SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
730SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
731};
732
733static const struct snd_kcontrol_new in2l_pga[] = {
734SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
735SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
736};
737
738static const struct snd_kcontrol_new in2r_pga[] = {
739SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
740SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
741};
742
743static const struct snd_kcontrol_new mixinl[] = {
744SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
745SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
746};
747
748static const struct snd_kcontrol_new mixinr[] = {
749SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
750SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
751};
752
753static const struct snd_kcontrol_new left_output_mixer[] = {
Mark Brown04de57c2012-04-26 22:08:50 +0100754WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
755WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
756WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
757WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
758WM_HUBS_SINGLE_W("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
759WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
760WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
761WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100762};
763
764static const struct snd_kcontrol_new right_output_mixer[] = {
Mark Brown04de57c2012-04-26 22:08:50 +0100765WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
766WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
767WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
768WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
769WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
770WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
771WM_HUBS_SINGLE_W("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
772WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100773};
774
775static const struct snd_kcontrol_new earpiece_mixer[] = {
776SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
777SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
778SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
779};
780
781static const struct snd_kcontrol_new left_speaker_boost[] = {
782SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
783SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
784SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
785};
786
787static const struct snd_kcontrol_new right_speaker_boost[] = {
788SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
789SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
790SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
791};
792
793static const struct snd_kcontrol_new line1_mix[] = {
794SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
795SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
796SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
797};
798
799static const struct snd_kcontrol_new line1n_mix[] = {
800SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
801SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
802};
803
804static const struct snd_kcontrol_new line1p_mix[] = {
805SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
806};
807
808static const struct snd_kcontrol_new line2_mix[] = {
Mark Brown43b6cec2012-02-01 23:46:58 +0000809SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0),
810SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100811SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
812};
813
814static const struct snd_kcontrol_new line2n_mix[] = {
UK KIM114395c2012-01-28 01:52:22 +0900815SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
816SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100817};
818
819static const struct snd_kcontrol_new line2p_mix[] = {
820SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
821};
822
823static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
824SND_SOC_DAPM_INPUT("IN1LN"),
825SND_SOC_DAPM_INPUT("IN1LP"),
826SND_SOC_DAPM_INPUT("IN2LN"),
Joonyoung Shim34825942009-12-04 15:12:10 +0900827SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
Mark Browna2342ae2009-07-29 21:21:49 +0100828SND_SOC_DAPM_INPUT("IN1RN"),
829SND_SOC_DAPM_INPUT("IN1RP"),
830SND_SOC_DAPM_INPUT("IN2RN"),
Joonyoung Shim34825942009-12-04 15:12:10 +0900831SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
Mark Browna2342ae2009-07-29 21:21:49 +0100832
Mark Brown91e20852011-12-02 16:01:41 +0000833SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
834SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100835
836SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
837 in1l_pga, ARRAY_SIZE(in1l_pga)),
838SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
839 in1r_pga, ARRAY_SIZE(in1r_pga)),
840
841SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
842 in2l_pga, ARRAY_SIZE(in2l_pga)),
843SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
844 in2r_pga, ARRAY_SIZE(in2r_pga)),
845
Mark Browna2342ae2009-07-29 21:21:49 +0100846SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
847 mixinl, ARRAY_SIZE(mixinl)),
848SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
849 mixinr, ARRAY_SIZE(mixinr)),
850
Mark Browna2342ae2009-07-29 21:21:49 +0100851SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
852 left_output_mixer, ARRAY_SIZE(left_output_mixer)),
853SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
854 right_output_mixer, ARRAY_SIZE(right_output_mixer)),
855
856SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
857SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
858
Mark Brown3ed70742010-01-20 17:39:45 +0000859SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
860 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Brown26422622012-02-21 09:36:49 +0000861SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
862 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Browna2342ae2009-07-29 21:21:49 +0100863
864SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
865 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
866SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
867 NULL, 0, earpiece_event,
868 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
869
870SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
871 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
872SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
873 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
874
Mark Brown03431972011-11-04 17:11:54 +0000875SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0),
Mark Browndc9c7452012-02-07 14:24:57 +0000876SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
877 NULL, 0),
878SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
879 NULL, 0),
Mark Browna2342ae2009-07-29 21:21:49 +0100880
881SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
882 line1_mix, ARRAY_SIZE(line1_mix)),
883SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
884 line2_mix, ARRAY_SIZE(line2_mix)),
885
886SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
887 line1n_mix, ARRAY_SIZE(line1n_mix)),
888SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
889 line1p_mix, ARRAY_SIZE(line1p_mix)),
890SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
891 line2n_mix, ARRAY_SIZE(line2n_mix)),
892SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
893 line2p_mix, ARRAY_SIZE(line2p_mix)),
894
Mark Brown5f2f38902012-02-08 18:51:42 +0000895SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
896 NULL, 0, lineout_event,
897 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
898SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
899 NULL, 0, lineout_event,
900 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
901SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
902 NULL, 0, lineout_event,
903 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
904SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
905 NULL, 0, lineout_event,
906 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
Mark Browna2342ae2009-07-29 21:21:49 +0100907
908SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
909SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
910SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
911SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
912SND_SOC_DAPM_OUTPUT("HPOUT1L"),
913SND_SOC_DAPM_OUTPUT("HPOUT1R"),
914SND_SOC_DAPM_OUTPUT("HPOUT2P"),
915SND_SOC_DAPM_OUTPUT("HPOUT2N"),
916SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
917SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
918SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
919SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
920};
921
922static const struct snd_soc_dapm_route analogue_routes[] = {
Mark Brown4baafdd2011-02-18 15:05:53 -0800923 { "MICBIAS1", NULL, "CLK_SYS" },
924 { "MICBIAS2", NULL, "CLK_SYS" },
925
Mark Browna2342ae2009-07-29 21:21:49 +0100926 { "IN1L PGA", "IN1LP Switch", "IN1LP" },
927 { "IN1L PGA", "IN1LN Switch", "IN1LN" },
928
Mark Brown4e04ada2011-07-15 15:12:31 +0900929 { "IN1L PGA", NULL, "VMID" },
930 { "IN1R PGA", NULL, "VMID" },
931 { "IN2L PGA", NULL, "VMID" },
932 { "IN2R PGA", NULL, "VMID" },
933
Mark Browna2342ae2009-07-29 21:21:49 +0100934 { "IN1R PGA", "IN1RP Switch", "IN1RP" },
935 { "IN1R PGA", "IN1RN Switch", "IN1RN" },
936
Joonyoung Shim34825942009-12-04 15:12:10 +0900937 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
Mark Browna2342ae2009-07-29 21:21:49 +0100938 { "IN2L PGA", "IN2LN Switch", "IN2LN" },
939
Joonyoung Shim34825942009-12-04 15:12:10 +0900940 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100941 { "IN2R PGA", "IN2RN Switch", "IN2RN" },
942
Joonyoung Shim34825942009-12-04 15:12:10 +0900943 { "Direct Voice", NULL, "IN2LP:VXRN" },
944 { "Direct Voice", NULL, "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100945
946 { "MIXINL", "IN1L Switch", "IN1L PGA" },
947 { "MIXINL", "IN2L Switch", "IN2L PGA" },
948 { "MIXINL", NULL, "Direct Voice" },
949 { "MIXINL", NULL, "IN1LP" },
950 { "MIXINL", NULL, "Left Output Mixer" },
Mark Brown4e04ada2011-07-15 15:12:31 +0900951 { "MIXINL", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100952
953 { "MIXINR", "IN1R Switch", "IN1R PGA" },
954 { "MIXINR", "IN2R Switch", "IN2R PGA" },
955 { "MIXINR", NULL, "Direct Voice" },
956 { "MIXINR", NULL, "IN1RP" },
957 { "MIXINR", NULL, "Right Output Mixer" },
Mark Brown4e04ada2011-07-15 15:12:31 +0900958 { "MIXINR", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100959
960 { "ADCL", NULL, "MIXINL" },
961 { "ADCR", NULL, "MIXINR" },
962
963 { "Left Output Mixer", "Left Input Switch", "MIXINL" },
964 { "Left Output Mixer", "Right Input Switch", "MIXINR" },
965 { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
966 { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
Joonyoung Shim34825942009-12-04 15:12:10 +0900967 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
Mark Browna2342ae2009-07-29 21:21:49 +0100968 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
969 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
970
971 { "Right Output Mixer", "Left Input Switch", "MIXINL" },
972 { "Right Output Mixer", "Right Input Switch", "MIXINR" },
973 { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
974 { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
Joonyoung Shim34825942009-12-04 15:12:10 +0900975 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
Mark Browna2342ae2009-07-29 21:21:49 +0100976 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
977 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
978
979 { "Left Output PGA", NULL, "Left Output Mixer" },
980 { "Left Output PGA", NULL, "TOCLK" },
981
982 { "Right Output PGA", NULL, "Right Output Mixer" },
983 { "Right Output PGA", NULL, "TOCLK" },
984
985 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
986 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
987 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
988
Mark Brown4e04ada2011-07-15 15:12:31 +0900989 { "Earpiece Driver", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +0100990 { "Earpiece Driver", NULL, "Earpiece Mixer" },
991 { "HPOUT2N", NULL, "Earpiece Driver" },
992 { "HPOUT2P", NULL, "Earpiece Driver" },
993
994 { "SPKL", "Input Switch", "MIXINL" },
995 { "SPKL", "IN1LP Switch", "IN1LP" },
Mark Brown39cca162011-04-08 16:32:16 +0900996 { "SPKL", "Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +0100997 { "SPKL", NULL, "TOCLK" },
998
999 { "SPKR", "Input Switch", "MIXINR" },
1000 { "SPKR", "IN1RP Switch", "IN1RP" },
Mark Brown39cca162011-04-08 16:32:16 +09001001 { "SPKR", "Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001002 { "SPKR", NULL, "TOCLK" },
1003
1004 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
1005 { "SPKL Boost", "SPKL Switch", "SPKL" },
1006 { "SPKL Boost", "SPKR Switch", "SPKR" },
1007
1008 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
1009 { "SPKR Boost", "SPKR Switch", "SPKR" },
1010 { "SPKR Boost", "SPKL Switch", "SPKL" },
1011
Mark Brown4e04ada2011-07-15 15:12:31 +09001012 { "SPKL Driver", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +01001013 { "SPKL Driver", NULL, "SPKL Boost" },
1014 { "SPKL Driver", NULL, "CLK_SYS" },
Mark Brown03431972011-11-04 17:11:54 +00001015 { "SPKL Driver", NULL, "TSHUT" },
Mark Browna2342ae2009-07-29 21:21:49 +01001016
Mark Brown4e04ada2011-07-15 15:12:31 +09001017 { "SPKR Driver", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +01001018 { "SPKR Driver", NULL, "SPKR Boost" },
1019 { "SPKR Driver", NULL, "CLK_SYS" },
Mark Brown03431972011-11-04 17:11:54 +00001020 { "SPKR Driver", NULL, "TSHUT" },
Mark Browna2342ae2009-07-29 21:21:49 +01001021
1022 { "SPKOUTLP", NULL, "SPKL Driver" },
1023 { "SPKOUTLN", NULL, "SPKL Driver" },
1024 { "SPKOUTRP", NULL, "SPKR Driver" },
1025 { "SPKOUTRN", NULL, "SPKR Driver" },
1026
Mark Brown39cca162011-04-08 16:32:16 +09001027 { "Left Headphone Mux", "Mixer", "Left Output PGA" },
1028 { "Right Headphone Mux", "Mixer", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001029
1030 { "Headphone PGA", NULL, "Left Headphone Mux" },
1031 { "Headphone PGA", NULL, "Right Headphone Mux" },
Mark Brown4e04ada2011-07-15 15:12:31 +09001032 { "Headphone PGA", NULL, "VMID" },
Mark Browna2342ae2009-07-29 21:21:49 +01001033 { "Headphone PGA", NULL, "CLK_SYS" },
Mark Brown3ed70742010-01-20 17:39:45 +00001034 { "Headphone PGA", NULL, "Headphone Supply" },
Mark Browna2342ae2009-07-29 21:21:49 +01001035
1036 { "HPOUT1L", NULL, "Headphone PGA" },
1037 { "HPOUT1R", NULL, "Headphone PGA" },
1038
Mark Brown4e04ada2011-07-15 15:12:31 +09001039 { "LINEOUT1N Driver", NULL, "VMID" },
1040 { "LINEOUT1P Driver", NULL, "VMID" },
1041 { "LINEOUT2N Driver", NULL, "VMID" },
1042 { "LINEOUT2P Driver", NULL, "VMID" },
1043
Mark Browna2342ae2009-07-29 21:21:49 +01001044 { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
1045 { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
1046 { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
1047 { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
1048};
1049
1050static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
1051 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
1052 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
Mark Brownd0b48af2011-05-14 17:21:28 -07001053 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001054
1055 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
1056 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
1057};
1058
1059static const struct snd_soc_dapm_route lineout1_se_routes[] = {
Mark Brownd0b48af2011-05-14 17:21:28 -07001060 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
1061 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001062
Mark Brownd0b48af2011-05-14 17:21:28 -07001063 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001064
1065 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
1066 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
1067};
1068
1069static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
Mark Brownee767442012-01-31 11:55:32 +00001070 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" },
1071 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" },
Mark Brownd0b48af2011-05-14 17:21:28 -07001072 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001073
1074 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
1075 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
1076};
1077
1078static const struct snd_soc_dapm_route lineout2_se_routes[] = {
Mark Brownd0b48af2011-05-14 17:21:28 -07001079 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
1080 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001081
Mark Brownd0b48af2011-05-14 17:21:28 -07001082 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
Mark Browna2342ae2009-07-29 21:21:49 +01001083
1084 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
1085 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
1086};
1087
1088int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
1089{
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001090 struct snd_soc_dapm_context *dapm = &codec->dapm;
1091
Mark Browna2342ae2009-07-29 21:21:49 +01001092 /* Latch volume update bits & default ZC on */
1093 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
1094 WM8993_IN1_VU, WM8993_IN1_VU);
1095 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
1096 WM8993_IN1_VU, WM8993_IN1_VU);
1097 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
1098 WM8993_IN2_VU, WM8993_IN2_VU);
1099 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
1100 WM8993_IN2_VU, WM8993_IN2_VU);
1101
Mark Brownfb5af532011-05-15 12:18:38 -07001102 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
1103 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
Mark Browna2342ae2009-07-29 21:21:49 +01001104 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
1105 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
1106
1107 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
Mark Brownfb5af532011-05-15 12:18:38 -07001108 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
1109 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
Mark Browna2342ae2009-07-29 21:21:49 +01001110 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
1111 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
1112 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
1113
1114 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
Mark Brownfb5af532011-05-15 12:18:38 -07001115 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
1116 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
Mark Browna2342ae2009-07-29 21:21:49 +01001117 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
1118 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
1119 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
1120
Liam Girdwood022658b2012-02-03 17:43:09 +00001121 snd_soc_add_codec_controls(codec, analogue_snd_controls,
Mark Browna2342ae2009-07-29 21:21:49 +01001122 ARRAY_SIZE(analogue_snd_controls));
1123
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001124 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
Mark Browna2342ae2009-07-29 21:21:49 +01001125 ARRAY_SIZE(analogue_dapm_widgets));
1126 return 0;
1127}
1128EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
1129
1130int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
1131 int lineout1_diff, int lineout2_diff)
1132{
Mark Brownd96ca3c2011-07-12 15:25:03 +09001133 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001134 struct snd_soc_dapm_context *dapm = &codec->dapm;
1135
Mark Brown8cb8e832012-07-25 18:10:03 +01001136 hubs->codec = codec;
1137
Mark Brown94aa7332012-05-01 18:45:09 +01001138 INIT_LIST_HEAD(&hubs->dcs_cache);
Mark Brownd96ca3c2011-07-12 15:25:03 +09001139 init_completion(&hubs->dcs_done);
1140
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001141 snd_soc_dapm_add_routes(dapm, analogue_routes,
Mark Browna2342ae2009-07-29 21:21:49 +01001142 ARRAY_SIZE(analogue_routes));
1143
1144 if (lineout1_diff)
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001145 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +01001146 lineout1_diff_routes,
1147 ARRAY_SIZE(lineout1_diff_routes));
1148 else
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001149 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +01001150 lineout1_se_routes,
1151 ARRAY_SIZE(lineout1_se_routes));
1152
1153 if (lineout2_diff)
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001154 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +01001155 lineout2_diff_routes,
1156 ARRAY_SIZE(lineout2_diff_routes));
1157 else
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001158 snd_soc_dapm_add_routes(dapm,
Mark Browna2342ae2009-07-29 21:21:49 +01001159 lineout2_se_routes,
1160 ARRAY_SIZE(lineout2_se_routes));
1161
1162 return 0;
1163}
1164EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
1165
Mark Brownaa983d92009-09-30 14:16:11 +01001166int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
1167 int lineout1_diff, int lineout2_diff,
1168 int lineout1fb, int lineout2fb,
1169 int jd_scthr, int jd_thr, int micbias1_lvl,
1170 int micbias2_lvl)
1171{
Mark Brown5f2f38902012-02-08 18:51:42 +00001172 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1173
1174 hubs->lineout1_se = !lineout1_diff;
1175 hubs->lineout2_se = !lineout2_diff;
1176
Mark Brownaa983d92009-09-30 14:16:11 +01001177 if (!lineout1_diff)
1178 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
1179 WM8993_LINEOUT1_MODE,
1180 WM8993_LINEOUT1_MODE);
1181 if (!lineout2_diff)
1182 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
1183 WM8993_LINEOUT2_MODE,
1184 WM8993_LINEOUT2_MODE);
1185
Mark Brown5472bbc2012-03-19 17:31:56 +00001186 if (!lineout1_diff && !lineout2_diff)
1187 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1188 WM8993_LINEOUT_VMID_BUF_ENA,
1189 WM8993_LINEOUT_VMID_BUF_ENA);
1190
Mark Brownaa983d92009-09-30 14:16:11 +01001191 if (lineout1fb)
1192 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1193 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
1194
1195 if (lineout2fb)
1196 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
1197 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
1198
1199 snd_soc_update_bits(codec, WM8993_MICBIAS,
1200 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
1201 WM8993_MICB1_LVL | WM8993_MICB2_LVL,
1202 jd_scthr << WM8993_JD_SCTHR_SHIFT |
1203 jd_thr << WM8993_JD_THR_SHIFT |
1204 micbias1_lvl |
1205 micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
1206
1207 return 0;
1208}
1209EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
1210
Mark Brown5f2f38902012-02-08 18:51:42 +00001211void wm_hubs_vmid_ena(struct snd_soc_codec *codec)
1212{
1213 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
1214 int val = 0;
1215
1216 if (hubs->lineout1_se)
1217 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
1218
1219 if (hubs->lineout2_se)
1220 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
1221
1222 /* Enable the line outputs while we power up */
1223 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val);
1224}
1225EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena);
1226
1227void wm_hubs_set_bias_level(struct snd_soc_codec *codec,
1228 enum snd_soc_bias_level level)
1229{
1230 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
Mark Brownde050ac2012-04-17 20:28:10 +01001231 int mask, val;
Mark Brown5f2f38902012-02-08 18:51:42 +00001232
1233 switch (level) {
Mark Brownd60d6c32012-02-10 18:09:42 +00001234 case SND_SOC_BIAS_STANDBY:
1235 /* Clamp the inputs to VMID while we ramp to charge caps */
1236 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1237 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP);
1238 break;
1239
Mark Brown5f2f38902012-02-08 18:51:42 +00001240 case SND_SOC_BIAS_ON:
1241 /* Turn off any unneded single ended outputs */
1242 val = 0;
Mark Brownde050ac2012-04-17 20:28:10 +01001243 mask = 0;
1244
1245 if (hubs->lineout1_se)
1246 mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA;
1247
1248 if (hubs->lineout2_se)
1249 mask |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA;
Mark Brown5f2f38902012-02-08 18:51:42 +00001250
1251 if (hubs->lineout1_se && hubs->lineout1n_ena)
1252 val |= WM8993_LINEOUT1N_ENA;
1253
1254 if (hubs->lineout1_se && hubs->lineout1p_ena)
1255 val |= WM8993_LINEOUT1P_ENA;
1256
1257 if (hubs->lineout2_se && hubs->lineout2n_ena)
1258 val |= WM8993_LINEOUT2N_ENA;
1259
1260 if (hubs->lineout2_se && hubs->lineout2p_ena)
1261 val |= WM8993_LINEOUT2P_ENA;
1262
1263 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3,
Mark Brownde050ac2012-04-17 20:28:10 +01001264 mask, val);
Mark Brown5f2f38902012-02-08 18:51:42 +00001265
Mark Brownd60d6c32012-02-10 18:09:42 +00001266 /* Remove the input clamps */
1267 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG,
1268 WM8993_INPUTS_CLAMP, 0);
Mark Brown5f2f38902012-02-08 18:51:42 +00001269 break;
1270
1271 default:
1272 break;
1273 }
1274}
1275EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level);
1276
Mark Browna2342ae2009-07-29 21:21:49 +01001277MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
1278MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1279MODULE_LICENSE("GPL");