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Linus Walleijaa958f52009-09-22 16:46:24 -07001/*
2 * Copyright (C) 2007-2009 ST-Ericsson AB
3 * License terms: GNU General Public License (GPL) version 2
4 * Real Time Clock interface for ST-Ericsson AB COH 901 331 RTC.
5 * Author: Linus Walleij <linus.walleij@stericsson.com>
6 * Based on rtc-pl031.c by Deepak Saxena <dsaxena@plexity.net>
7 * Copyright 2006 (c) MontaVista Software, Inc.
8 */
9#include <linux/init.h>
10#include <linux/module.h>
11#include <linux/rtc.h>
12#include <linux/clk.h>
13#include <linux/interrupt.h>
14#include <linux/pm.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090017#include <linux/slab.h>
Linus Walleijaa958f52009-09-22 16:46:24 -070018
19/*
20 * Registers in the COH 901 331
21 */
22/* Alarm value 32bit (R/W) */
23#define COH901331_ALARM 0x00U
24/* Used to set current time 32bit (R/W) */
25#define COH901331_SET_TIME 0x04U
26/* Indication if current time is valid 32bit (R/-) */
27#define COH901331_VALID 0x08U
28/* Read the current time 32bit (R/-) */
29#define COH901331_CUR_TIME 0x0cU
30/* Event register for the "alarm" interrupt */
31#define COH901331_IRQ_EVENT 0x10U
32/* Mask register for the "alarm" interrupt */
33#define COH901331_IRQ_MASK 0x14U
34/* Force register for the "alarm" interrupt */
35#define COH901331_IRQ_FORCE 0x18U
36
37/*
38 * Reference to RTC block clock
39 * Notice that the frequent clk_enable()/clk_disable() on this
40 * clock is mainly to be able to turn on/off other clocks in the
41 * hierarchy as needed, the RTC clock is always on anyway.
42 */
43struct coh901331_port {
44 struct rtc_device *rtc;
45 struct clk *clk;
Linus Walleijaa958f52009-09-22 16:46:24 -070046 void __iomem *virtbase;
47 int irq;
Jingoo Han62068e22013-04-29 16:21:00 -070048#ifdef CONFIG_PM_SLEEP
Linus Walleijaa958f52009-09-22 16:46:24 -070049 u32 irqmaskstore;
50#endif
51};
52
53static irqreturn_t coh901331_interrupt(int irq, void *data)
54{
55 struct coh901331_port *rtap = data;
56
57 clk_enable(rtap->clk);
58 /* Ack IRQ */
59 writel(1, rtap->virtbase + COH901331_IRQ_EVENT);
Linus Walleij378ce742009-11-14 01:03:24 +010060 /*
61 * Disable the interrupt. This is necessary because
62 * the RTC lives on a lower-clocked line and will
63 * not release the IRQ line until after a few (slower)
64 * clock cycles. The interrupt will be re-enabled when
65 * a new alarm is set anyway.
66 */
67 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
Linus Walleijaa958f52009-09-22 16:46:24 -070068 clk_disable(rtap->clk);
Linus Walleij378ce742009-11-14 01:03:24 +010069
Linus Walleijaa958f52009-09-22 16:46:24 -070070 /* Set alarm flag */
71 rtc_update_irq(rtap->rtc, 1, RTC_AF);
72
73 return IRQ_HANDLED;
74}
75
76static int coh901331_read_time(struct device *dev, struct rtc_time *tm)
77{
78 struct coh901331_port *rtap = dev_get_drvdata(dev);
79
80 clk_enable(rtap->clk);
81 /* Check if the time is valid */
82 if (readl(rtap->virtbase + COH901331_VALID)) {
83 rtc_time_to_tm(readl(rtap->virtbase + COH901331_CUR_TIME), tm);
84 clk_disable(rtap->clk);
85 return rtc_valid_tm(tm);
86 }
87 clk_disable(rtap->clk);
88 return -EINVAL;
89}
90
91static int coh901331_set_mmss(struct device *dev, unsigned long secs)
92{
93 struct coh901331_port *rtap = dev_get_drvdata(dev);
94
95 clk_enable(rtap->clk);
96 writel(secs, rtap->virtbase + COH901331_SET_TIME);
97 clk_disable(rtap->clk);
98
99 return 0;
100}
101
102static int coh901331_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
103{
104 struct coh901331_port *rtap = dev_get_drvdata(dev);
105
106 clk_enable(rtap->clk);
107 rtc_time_to_tm(readl(rtap->virtbase + COH901331_ALARM), &alarm->time);
108 alarm->pending = readl(rtap->virtbase + COH901331_IRQ_EVENT) & 1U;
109 alarm->enabled = readl(rtap->virtbase + COH901331_IRQ_MASK) & 1U;
110 clk_disable(rtap->clk);
111
112 return 0;
113}
114
115static int coh901331_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
116{
117 struct coh901331_port *rtap = dev_get_drvdata(dev);
118 unsigned long time;
119
120 rtc_tm_to_time(&alarm->time, &time);
121 clk_enable(rtap->clk);
122 writel(time, rtap->virtbase + COH901331_ALARM);
123 writel(alarm->enabled, rtap->virtbase + COH901331_IRQ_MASK);
124 clk_disable(rtap->clk);
125
126 return 0;
127}
128
129static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled)
130{
131 struct coh901331_port *rtap = dev_get_drvdata(dev);
132
133 clk_enable(rtap->clk);
134 if (enabled)
135 writel(1, rtap->virtbase + COH901331_IRQ_MASK);
136 else
137 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
138 clk_disable(rtap->clk);
Linus Walleij378ce742009-11-14 01:03:24 +0100139
140 return 0;
Linus Walleijaa958f52009-09-22 16:46:24 -0700141}
142
143static struct rtc_class_ops coh901331_ops = {
144 .read_time = coh901331_read_time,
145 .set_mmss = coh901331_set_mmss,
146 .read_alarm = coh901331_read_alarm,
147 .set_alarm = coh901331_set_alarm,
148 .alarm_irq_enable = coh901331_alarm_irq_enable,
149};
150
151static int __exit coh901331_remove(struct platform_device *pdev)
152{
Jingoo Han3a028932013-07-03 15:07:12 -0700153 struct coh901331_port *rtap = platform_get_drvdata(pdev);
Linus Walleijaa958f52009-09-22 16:46:24 -0700154
Jingoo Han7fcbf5f2013-07-03 15:06:16 -0700155 if (rtap)
Linus Walleij8384dfe2012-07-30 14:41:31 -0700156 clk_unprepare(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700157
158 return 0;
159}
160
161
162static int __init coh901331_probe(struct platform_device *pdev)
163{
164 int ret;
165 struct coh901331_port *rtap;
166 struct resource *res;
167
Linus Walleij36ac1d242012-07-30 14:41:32 -0700168 rtap = devm_kzalloc(&pdev->dev,
169 sizeof(struct coh901331_port), GFP_KERNEL);
Linus Walleijaa958f52009-09-22 16:46:24 -0700170 if (!rtap)
171 return -ENOMEM;
172
173 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Jingoo Handaaf90f2014-04-03 14:49:47 -0700174 rtap->virtbase = devm_ioremap_resource(&pdev->dev, res);
175 if (IS_ERR(rtap->virtbase))
176 return PTR_ERR(rtap->virtbase);
Linus Walleijaa958f52009-09-22 16:46:24 -0700177
178 rtap->irq = platform_get_irq(pdev, 0);
Linus Walleij36ac1d242012-07-30 14:41:32 -0700179 if (devm_request_irq(&pdev->dev, rtap->irq, coh901331_interrupt, 0,
180 "RTC COH 901 331 Alarm", rtap))
181 return -EIO;
Linus Walleijaa958f52009-09-22 16:46:24 -0700182
Jingoo Han3b759d72013-02-21 16:45:38 -0800183 rtap->clk = devm_clk_get(&pdev->dev, NULL);
Linus Walleijaa958f52009-09-22 16:46:24 -0700184 if (IS_ERR(rtap->clk)) {
185 ret = PTR_ERR(rtap->clk);
186 dev_err(&pdev->dev, "could not get clock\n");
Linus Walleij36ac1d242012-07-30 14:41:32 -0700187 return ret;
Linus Walleijaa958f52009-09-22 16:46:24 -0700188 }
189
190 /* We enable/disable the clock only to assure it works */
Linus Walleij8384dfe2012-07-30 14:41:31 -0700191 ret = clk_prepare_enable(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700192 if (ret) {
193 dev_err(&pdev->dev, "could not enable clock\n");
Jingoo Han3b759d72013-02-21 16:45:38 -0800194 return ret;
Linus Walleijaa958f52009-09-22 16:46:24 -0700195 }
196 clk_disable(rtap->clk);
197
Linus Walleij9cf3b5f2011-04-17 20:32:19 +0200198 platform_set_drvdata(pdev, rtap);
Jingoo Han94b60db2013-04-29 16:18:56 -0700199 rtap->rtc = devm_rtc_device_register(&pdev->dev, "coh901331",
200 &coh901331_ops, THIS_MODULE);
Linus Walleijaa958f52009-09-22 16:46:24 -0700201 if (IS_ERR(rtap->rtc)) {
202 ret = PTR_ERR(rtap->rtc);
203 goto out_no_rtc;
204 }
205
Linus Walleijaa958f52009-09-22 16:46:24 -0700206 return 0;
207
208 out_no_rtc:
Linus Walleij8384dfe2012-07-30 14:41:31 -0700209 clk_unprepare(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700210 return ret;
211}
212
Jingoo Han62068e22013-04-29 16:21:00 -0700213#ifdef CONFIG_PM_SLEEP
214static int coh901331_suspend(struct device *dev)
Linus Walleijaa958f52009-09-22 16:46:24 -0700215{
Jingoo Han62068e22013-04-29 16:21:00 -0700216 struct coh901331_port *rtap = dev_get_drvdata(dev);
Linus Walleijaa958f52009-09-22 16:46:24 -0700217
218 /*
219 * If this RTC alarm will be used for waking the system up,
220 * don't disable it of course. Else we just disable the alarm
221 * and await suspension.
222 */
Jingoo Han62068e22013-04-29 16:21:00 -0700223 if (device_may_wakeup(dev)) {
Linus Walleijaa958f52009-09-22 16:46:24 -0700224 enable_irq_wake(rtap->irq);
225 } else {
226 clk_enable(rtap->clk);
227 rtap->irqmaskstore = readl(rtap->virtbase + COH901331_IRQ_MASK);
228 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
229 clk_disable(rtap->clk);
230 }
Linus Walleij8384dfe2012-07-30 14:41:31 -0700231 clk_unprepare(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700232 return 0;
233}
234
Jingoo Han62068e22013-04-29 16:21:00 -0700235static int coh901331_resume(struct device *dev)
Linus Walleijaa958f52009-09-22 16:46:24 -0700236{
Jingoo Han62068e22013-04-29 16:21:00 -0700237 struct coh901331_port *rtap = dev_get_drvdata(dev);
Linus Walleijaa958f52009-09-22 16:46:24 -0700238
Linus Walleij8384dfe2012-07-30 14:41:31 -0700239 clk_prepare(rtap->clk);
Jingoo Han62068e22013-04-29 16:21:00 -0700240 if (device_may_wakeup(dev)) {
Linus Walleijaa958f52009-09-22 16:46:24 -0700241 disable_irq_wake(rtap->irq);
James Hogan5a98c042010-03-05 13:44:31 -0800242 } else {
Linus Walleijaa958f52009-09-22 16:46:24 -0700243 clk_enable(rtap->clk);
244 writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK);
245 clk_disable(rtap->clk);
James Hogan5a98c042010-03-05 13:44:31 -0800246 }
Linus Walleijaa958f52009-09-22 16:46:24 -0700247 return 0;
248}
Linus Walleijaa958f52009-09-22 16:46:24 -0700249#endif
250
Jingoo Han62068e22013-04-29 16:21:00 -0700251static SIMPLE_DEV_PM_OPS(coh901331_pm_ops, coh901331_suspend, coh901331_resume);
252
Linus Walleijaa958f52009-09-22 16:46:24 -0700253static void coh901331_shutdown(struct platform_device *pdev)
254{
Jingoo Han3a028932013-07-03 15:07:12 -0700255 struct coh901331_port *rtap = platform_get_drvdata(pdev);
Linus Walleijaa958f52009-09-22 16:46:24 -0700256
257 clk_enable(rtap->clk);
258 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
Julia Lawall828296d2012-10-04 17:14:07 -0700259 clk_disable_unprepare(rtap->clk);
Linus Walleijaa958f52009-09-22 16:46:24 -0700260}
261
Linus Walleija16b6c62013-04-19 13:03:13 +0200262static const struct of_device_id coh901331_dt_match[] = {
263 { .compatible = "stericsson,coh901331" },
264 {},
265};
266
Linus Walleijaa958f52009-09-22 16:46:24 -0700267static struct platform_driver coh901331_driver = {
268 .driver = {
269 .name = "rtc-coh901331",
270 .owner = THIS_MODULE,
Jingoo Han62068e22013-04-29 16:21:00 -0700271 .pm = &coh901331_pm_ops,
Linus Walleija16b6c62013-04-19 13:03:13 +0200272 .of_match_table = coh901331_dt_match,
Linus Walleijaa958f52009-09-22 16:46:24 -0700273 },
274 .remove = __exit_p(coh901331_remove),
Linus Walleijaa958f52009-09-22 16:46:24 -0700275 .shutdown = coh901331_shutdown,
276};
277
Jingoo Han4fdf7a92013-04-29 16:18:37 -0700278module_platform_driver_probe(coh901331_driver, coh901331_probe);
Linus Walleijaa958f52009-09-22 16:46:24 -0700279
280MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
281MODULE_DESCRIPTION("ST-Ericsson AB COH 901 331 RTC Driver");
282MODULE_LICENSE("GPL");