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gerrit-public.fairphone.software / kernel / msm-4.9 / 36dffd8f49bc1364998db81bee739ea4574d88f7 / . / arch / arm / boot / dts / spear600.dtsi
blob: 19f99dc4115e164c8903a3259ea873675be16ee2 [file] [log] [blame]
Stefan Roese9652e8b2012-03-16 14:03:23 +0100[diff] [blame]1/*
2 * Copyright 2012 Stefan Roese <sr@denx.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 compatible = "st,spear600";
16
17 cpus {
18 cpu@0 {
19 compatible = "arm,arm926ejs";
20 };
21 };
22
23 memory {
24 device_type = "memory";
25 reg = <0 0x40000000>;
26 };
27
28 ahb {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 compatible = "simple-bus";
32 ranges = <0xd0000000 0xd0000000 0x30000000>;
33
34 vic0: interrupt-controller@f1100000 {
35 compatible = "arm,pl190-vic";
36 interrupt-controller;
37 reg = <0xf1100000 0x1000>;
38 #interrupt-cells = <1>;
39 };
40
41 vic1: interrupt-controller@f1000000 {
42 compatible = "arm,pl190-vic";
43 interrupt-controller;
44 reg = <0xf1000000 0x1000>;
45 #interrupt-cells = <1>;
46 };
47
Shiraz Hashim8113ba92012-11-10 17:31:01 +0530[diff] [blame]48 clcd@fc200000 {
49 compatible = "arm,pl110", "arm,primecell";
50 reg = <0xfc200000 0x1000>;
51 interrupt-parent = <&vic1>;
52 interrupts = <12>;
53 status = "disabled";
54 };
55
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530[diff] [blame]56 dma@fc400000 {
57 compatible = "arm,pl080", "arm,primecell";
58 reg = <0xfc400000 0x1000>;
59 interrupt-parent = <&vic1>;
60 interrupts = <10>;
61 status = "disabled";
62 };
63
Stefan Roese9652e8b2012-03-16 14:03:23 +0100[diff] [blame]64 gmac: ethernet@e0800000 {
65 compatible = "st,spear600-gmac";
66 reg = <0xe0800000 0x8000>;
67 interrupt-parent = <&vic1>;
68 interrupts = <24 23>;
69 interrupt-names = "macirq", "eth_wake_irq";
Deepak Sikri4c7a0782012-08-09 13:18:40 +0530[diff] [blame]70 phy-mode = "gmii";
Stefan Roese9652e8b2012-03-16 14:03:23 +0100[diff] [blame]71 status = "disabled";
72 };
73
74 fsmc: flash@d1800000 {
75 compatible = "st,spear600-fsmc-nand";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 reg = <0xd1800000 0x1000 /* FSMC Register */
Jean-Christophe PLAGNIOL-VILLARD6d7b42a2012-10-04 15:14:16 +0200[diff] [blame]79 0xd2000000 0x0010 /* NAND Base DATA */
80 0xd2020000 0x0010 /* NAND Base ADDR */
81 0xd2010000 0x0010>; /* NAND Base CMD */
82 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
Stefan Roese9652e8b2012-03-16 14:03:23 +0100[diff] [blame]83 status = "disabled";
84 };
85
86 smi: flash@fc000000 {
87 compatible = "st,spear600-smi";
88 #address-cells = <1>;
89 #size-cells = <1>;
90 reg = <0xfc000000 0x1000>;
91 interrupt-parent = <&vic1>;
92 interrupts = <12>;
93 status = "disabled";
94 };
95
96 ehci@e1800000 {
97 compatible = "st,spear600-ehci", "usb-ehci";
98 reg = <0xe1800000 0x1000>;
99 interrupt-parent = <&vic1>;
100 interrupts = <27>;
101 status = "disabled";
102 };
103
104 ehci@e2000000 {
105 compatible = "st,spear600-ehci", "usb-ehci";
106 reg = <0xe2000000 0x1000>;
107 interrupt-parent = <&vic1>;
108 interrupts = <29>;
109 status = "disabled";
110 };
111
112 ohci@e1900000 {
113 compatible = "st,spear600-ohci", "usb-ohci";
114 reg = <0xe1900000 0x1000>;
115 interrupt-parent = <&vic1>;
116 interrupts = <26>;
117 status = "disabled";
118 };
119
120 ohci@e2100000 {
121 compatible = "st,spear600-ohci", "usb-ohci";
122 reg = <0xe2100000 0x1000>;
123 interrupt-parent = <&vic1>;
124 interrupts = <28>;
125 status = "disabled";
126 };
127
128 apb {
129 #address-cells = <1>;
130 #size-cells = <1>;
131 compatible = "simple-bus";
132 ranges = <0xd0000000 0xd0000000 0x30000000>;
133
134 serial@d0000000 {
135 compatible = "arm,pl011", "arm,primecell";
136 reg = <0xd0000000 0x1000>;
137 interrupt-parent = <&vic0>;
138 interrupts = <24>;
139 status = "disabled";
140 };
141
142 serial@d0080000 {
143 compatible = "arm,pl011", "arm,primecell";
144 reg = <0xd0080000 0x1000>;
145 interrupt-parent = <&vic0>;
146 interrupts = <25>;
147 status = "disabled";
148 };
149
150 /* local/cpu GPIO */
151 gpio0: gpio@f0100000 {
152 #gpio-cells = <2>;
153 compatible = "arm,pl061", "arm,primecell";
154 gpio-controller;
155 reg = <0xf0100000 0x1000>;
156 interrupt-parent = <&vic0>;
157 interrupts = <18>;
158 };
159
160 /* basic GPIO */
161 gpio1: gpio@fc980000 {
162 #gpio-cells = <2>;
163 compatible = "arm,pl061", "arm,primecell";
164 gpio-controller;
165 reg = <0xfc980000 0x1000>;
166 interrupt-parent = <&vic1>;
167 interrupts = <19>;
168 };
169
170 /* appl GPIO */
171 gpio2: gpio@d8100000 {
172 #gpio-cells = <2>;
173 compatible = "arm,pl061", "arm,primecell";
174 gpio-controller;
175 reg = <0xd8100000 0x1000>;
176 interrupt-parent = <&vic1>;
177 interrupts = <4>;
178 };
179
180 i2c@d0200000 {
181 #address-cells = <1>;
182 #size-cells = <0>;
183 compatible = "snps,designware-i2c";
184 reg = <0xd0200000 0x1000>;
185 interrupt-parent = <&vic0>;
186 interrupts = <28>;
187 status = "disabled";
188 };
Viresh Kumar30551c02012-04-21 13:15:37 +0530[diff] [blame]189
Shiraz Hashim8113ba92012-11-10 17:31:01 +0530[diff] [blame]190 rtc@fc900000 {
191 compatible = "st,spear600-rtc";
192 reg = <0xfc900000 0x1000>;
193 interrupts = <10>;
194 status = "disabled";
195 };
196
Viresh Kumar30551c02012-04-21 13:15:37 +0530[diff] [blame]197 timer@f0000000 {
198 compatible = "st,spear-timer";
199 reg = <0xf0000000 0x400>;
Stefan Roese69c7e372012-05-11 10:41:01 +0200[diff] [blame]200 interrupt-parent = <&vic0>;
Viresh Kumar30551c02012-04-21 13:15:37 +0530[diff] [blame]201 interrupts = <16>;
202 };
Stefan Roese9652e8b2012-03-16 14:03:23 +0100[diff] [blame]203 };
204 };
205};