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R Sricharan6b5de092012-05-10 19:46:00 +05301/*
Sricharan Rfa63d032013-06-07 18:52:47 +05302 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
R Sricharan6b5de092012-05-10 19:46:00 +05303 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
Florian Vaussard98ef79572013-05-31 14:32:55 +020010#include "omap5.dtsi"
J Keerthye00c27e2013-06-13 10:00:11 +053011#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
R Sricharan6b5de092012-05-10 19:46:00 +053013
14/ {
Sricharan Rfa63d032013-06-07 18:52:47 +053015 model = "TI OMAP5 uEVM board";
16 compatible = "ti,omap5-uevm", "ti,omap5";
R Sricharan6b5de092012-05-10 19:46:00 +053017
18 memory {
19 device_type = "memory";
Santosh Shilimkar03178c62013-01-18 11:43:16 +053020 reg = <0x80000000 0x7F000000>; /* 2032 MB */
R Sricharan6b5de092012-05-10 19:46:00 +053021 };
Balaji T K5dd18b02012-08-07 12:48:21 +053022
23 vmmcsd_fixed: fixedregulator-mmcsd {
24 compatible = "regulator-fixed";
25 regulator-name = "vmmcsd_fixed";
26 regulator-min-microvolt = <3000000>;
27 regulator-max-microvolt = <3000000>;
28 };
Sourav Poddar5449fbc2012-07-25 11:03:27 +053029
Roger Quadrosed7f8e82013-06-07 18:52:48 +053030 /* HS USB Port 2 RESET */
31 hsusb2_reset: hsusb2_reset_reg {
32 compatible = "regulator-fixed";
33 regulator-name = "hsusb2_reset";
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36 gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
37 startup-delay-us = <70000>;
38 enable-active-high;
39 };
40
41 /* HS USB Host PHY on PORT 2 */
42 hsusb2_phy: hsusb2_phy {
43 compatible = "usb-nop-xceiv";
44 reset-supply = <&hsusb2_reset>;
Roger Quadros153030c2013-06-18 19:04:46 +030045 /**
46 * FIXME
47 * Put the right clock phandle here when available
48 * clocks = <&auxclk1>;
49 * clock-names = "main_clk";
50 */
51 clock-frequency = <19200000>;
Roger Quadrosed7f8e82013-06-07 18:52:48 +053052 };
53
54 /* HS USB Port 3 RESET */
55 hsusb3_reset: hsusb3_reset_reg {
56 compatible = "regulator-fixed";
57 regulator-name = "hsusb3_reset";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
61 startup-delay-us = <70000>;
62 enable-active-high;
63 };
64
65 /* HS USB Host PHY on PORT 3 */
66 hsusb3_phy: hsusb3_phy {
67 compatible = "usb-nop-xceiv";
68 reset-supply = <&hsusb3_reset>;
69 };
70
Dan Murphy66155302013-06-07 18:52:49 +053071 leds {
72 compatible = "gpio-leds";
73 led@1 {
74 label = "omap5:blue:usr1";
75 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
76 linux,default-trigger = "heartbeat";
77 default-state = "off";
78 };
79 };
Balaji T K5dd18b02012-08-07 12:48:21 +053080};
81
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030082&omap5_pmx_core {
83 pinctrl-names = "default";
84 pinctrl-0 = <
85 &twl6040_pins
86 &mcpdm_pins
87 &dmic_pins
88 &mcbsp1_pins
89 &mcbsp2_pins
Roger Quadrosed7f8e82013-06-07 18:52:48 +053090 &usbhost_pins
Dan Murphy66155302013-06-07 18:52:49 +053091 &led_gpio_pins
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030092 >;
93
94 twl6040_pins: pinmux_twl6040_pins {
95 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020096 0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030097 >;
98 };
99
100 mcpdm_pins: pinmux_mcpdm_pins {
101 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200102 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
103 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
104 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
105 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
106 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300107 >;
108 };
109
110 dmic_pins: pinmux_dmic_pins {
111 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200112 0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */
113 0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */
114 0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */
115 0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300116 >;
117 };
118
119 mcbsp1_pins: pinmux_mcbsp1_pins {
120 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200121 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
122 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
123 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
124 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300125 >;
126 };
127
128 mcbsp2_pins: pinmux_mcbsp2_pins {
129 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200130 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
131 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
132 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
133 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300134 >;
135 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530136
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200137 i2c1_pins: pinmux_i2c1_pins {
138 pinctrl-single,pins = <
139 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
140 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
141 >;
142 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530143
Sourav Poddar9be495c2013-02-13 14:58:22 +0530144 i2c5_pins: pinmux_i2c5_pins {
145 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200146 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
147 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
Sourav Poddar9be495c2013-02-13 14:58:22 +0530148 >;
149 };
Sourav Poddar392adaf2013-02-13 14:58:44 +0530150
151 mcspi2_pins: pinmux_mcspi2_pins {
152 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200153 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
154 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
155 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
156 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530157 >;
158 };
159
160 mcspi3_pins: pinmux_mcspi3_pins {
161 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200162 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
163 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
164 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
165 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530166 >;
167 };
168
169 mcspi4_pins: pinmux_mcspi4_pins {
170 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200171 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
172 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
173 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
174 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530175 >;
176 };
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530177
178 usbhost_pins: pinmux_usbhost_pins {
179 pinctrl-single,pins = <
180 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
181 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
182
183 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
184 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
185
186 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
187 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
188 >;
189 };
Dan Murphy66155302013-06-07 18:52:49 +0530190
191 led_gpio_pins: pinmux_led_gpio_pins {
192 pinctrl-single,pins = <
193 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
194 >;
195 };
Sourav Poddared22fee2013-06-07 18:52:50 +0530196
197 uart1_pins: pinmux_uart1_pins {
198 pinctrl-single,pins = <
199 0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
200 0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
201 0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
202 0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
203 >;
204 };
205
206 uart3_pins: pinmux_uart3_pins {
207 pinctrl-single,pins = <
208 0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
209 0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
210 >;
211 };
212
213 uart5_pins: pinmux_uart5_pins {
214 pinctrl-single,pins = <
215 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
216 0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
217 0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
218 0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
219 >;
220 };
221
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530222};
223
224&omap5_pmx_wkup {
225 pinctrl-names = "default";
226 pinctrl-0 = <
227 &usbhost_wkup_pins
228 >;
229
230 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
231 pinctrl-single,pins = <
232 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
233 >;
234 };
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300235};
236
Balaji T K5dd18b02012-08-07 12:48:21 +0530237&mmc1 {
238 vmmc-supply = <&vmmcsd_fixed>;
239 bus-width = <4>;
240};
241
242&mmc2 {
243 vmmc-supply = <&vmmcsd_fixed>;
244 bus-width = <8>;
245 ti,non-removable;
246};
247
248&mmc3 {
249 bus-width = <4>;
250 ti,non-removable;
251};
252
253&mmc4 {
254 status = "disabled";
255};
256
257&mmc5 {
258 status = "disabled";
R Sricharan6b5de092012-05-10 19:46:00 +0530259};
Sourav Poddar08f3e212012-07-25 11:02:43 +0530260
Sourav Poddar9be495c2013-02-13 14:58:22 +0530261&i2c1 {
262 pinctrl-names = "default";
263 pinctrl-0 = <&i2c1_pins>;
264
265 clock-frequency = <400000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530266
267 palmas: palmas@48 {
268 compatible = "ti,palmas";
269 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
270 interrupt-parent = <&gic>;
271 reg = <0x48>;
272 interrupt-controller;
273 #interrupt-cells = <2>;
274
275 palmas_pmic {
276 compatible = "ti,palmas-pmic";
277 interrupt-parent = <&palmas>;
278 interrupts = <14 IRQ_TYPE_NONE>;
279 interrupt-name = "short-irq";
280
281 ti,ldo6-vibrator;
282
283 regulators {
284 smps123_reg: smps123 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500285 /* VDD_OPP_MPU */
J Keerthye00c27e2013-06-13 10:00:11 +0530286 regulator-name = "smps123";
287 regulator-min-microvolt = < 600000>;
288 regulator-max-microvolt = <1500000>;
289 regulator-always-on;
290 regulator-boot-on;
291 };
292
293 smps45_reg: smps45 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500294 /* VDD_OPP_MM */
J Keerthye00c27e2013-06-13 10:00:11 +0530295 regulator-name = "smps45";
296 regulator-min-microvolt = < 600000>;
297 regulator-max-microvolt = <1310000>;
298 regulator-always-on;
299 regulator-boot-on;
300 };
301
302 smps6_reg: smps6 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500303 /* VDD_DDR3 - over VDD_SMPS6 */
J Keerthye00c27e2013-06-13 10:00:11 +0530304 regulator-name = "smps6";
305 regulator-min-microvolt = <1200000>;
306 regulator-max-microvolt = <1200000>;
307 regulator-always-on;
308 regulator-boot-on;
309 };
310
311 smps7_reg: smps7 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500312 /* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
J Keerthye00c27e2013-06-13 10:00:11 +0530313 regulator-name = "smps7";
314 regulator-min-microvolt = <1800000>;
315 regulator-max-microvolt = <1800000>;
316 regulator-always-on;
317 regulator-boot-on;
318 };
319
320 smps8_reg: smps8 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500321 /* VDD_OPP_CORE */
J Keerthye00c27e2013-06-13 10:00:11 +0530322 regulator-name = "smps8";
323 regulator-min-microvolt = < 600000>;
324 regulator-max-microvolt = <1310000>;
325 regulator-always-on;
326 regulator-boot-on;
327 };
328
329 smps9_reg: smps9 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500330 /* VDDA_2v1_AUD over VDD_2v1 */
J Keerthye00c27e2013-06-13 10:00:11 +0530331 regulator-name = "smps9";
332 regulator-min-microvolt = <2100000>;
333 regulator-max-microvolt = <2100000>;
334 regulator-always-on;
335 regulator-boot-on;
336 ti,smps-range = <0x80>;
337 };
338
339 smps10_reg: smps10 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500340 /* VBUS_5V_OTG */
J Keerthye00c27e2013-06-13 10:00:11 +0530341 regulator-name = "smps10";
342 regulator-min-microvolt = <5000000>;
343 regulator-max-microvolt = <5000000>;
344 regulator-always-on;
345 regulator-boot-on;
346 };
347
348 ldo1_reg: ldo1 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500349 /* VDDAPHY_CAM: vdda_csiport */
J Keerthye00c27e2013-06-13 10:00:11 +0530350 regulator-name = "ldo1";
351 regulator-min-microvolt = <2800000>;
352 regulator-max-microvolt = <2800000>;
353 regulator-always-on;
354 regulator-boot-on;
355 };
356
357 ldo2_reg: ldo2 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500358 /* VCC_2V8_DISP: Does not go anywhere */
J Keerthye00c27e2013-06-13 10:00:11 +0530359 regulator-name = "ldo2";
360 regulator-min-microvolt = <2900000>;
361 regulator-max-microvolt = <2900000>;
362 regulator-always-on;
363 regulator-boot-on;
364 };
365
366 ldo3_reg: ldo3 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500367 /* VDDAPHY_MDM: vdda_lli */
J Keerthye00c27e2013-06-13 10:00:11 +0530368 regulator-name = "ldo3";
369 regulator-min-microvolt = <3000000>;
370 regulator-max-microvolt = <3000000>;
371 regulator-always-on;
372 regulator-boot-on;
373 };
374
375 ldo4_reg: ldo4 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500376 /* VDDAPHY_DISP: vdda_dsiport/hdmi */
J Keerthye00c27e2013-06-13 10:00:11 +0530377 regulator-name = "ldo4";
378 regulator-min-microvolt = <2200000>;
379 regulator-max-microvolt = <2200000>;
380 regulator-always-on;
381 regulator-boot-on;
382 };
383
384 ldo5_reg: ldo5 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500385 /* VDDA_1V8_PHY: usb/sata/hdmi.. */
J Keerthye00c27e2013-06-13 10:00:11 +0530386 regulator-name = "ldo5";
387 regulator-min-microvolt = <1800000>;
388 regulator-max-microvolt = <1800000>;
389 regulator-always-on;
390 regulator-boot-on;
391 };
392
393 ldo6_reg: ldo6 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500394 /* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
J Keerthye00c27e2013-06-13 10:00:11 +0530395 regulator-name = "ldo6";
396 regulator-min-microvolt = <1500000>;
397 regulator-max-microvolt = <1500000>;
398 regulator-always-on;
399 regulator-boot-on;
400 };
401
402 ldo7_reg: ldo7 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500403 /* VDD_VPP: vpp1 */
J Keerthye00c27e2013-06-13 10:00:11 +0530404 regulator-name = "ldo7";
405 regulator-min-microvolt = <1500000>;
406 regulator-max-microvolt = <1500000>;
407 regulator-always-on;
408 regulator-boot-on;
409 };
410
411 ldo8_reg: ldo8 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500412 /* VDD_3v0: Does not go anywhere */
J Keerthye00c27e2013-06-13 10:00:11 +0530413 regulator-name = "ldo8";
414 regulator-min-microvolt = <1500000>;
415 regulator-max-microvolt = <1500000>;
416 regulator-always-on;
417 regulator-boot-on;
418 };
419
420 ldo9_reg: ldo9 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500421 /* VCC_DV_SDIO: vdds_sdcard */
J Keerthye00c27e2013-06-13 10:00:11 +0530422 regulator-name = "ldo9";
423 regulator-min-microvolt = <1800000>;
424 regulator-max-microvolt = <3300000>;
425 regulator-always-on;
426 regulator-boot-on;
427 };
428
429 ldoln_reg: ldoln {
Nishanth Menon3709d322013-07-29 12:03:01 -0500430 /* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
J Keerthye00c27e2013-06-13 10:00:11 +0530431 regulator-name = "ldoln";
432 regulator-min-microvolt = <1800000>;
433 regulator-max-microvolt = <1800000>;
434 regulator-always-on;
435 regulator-boot-on;
436 };
437
438 ldousb_reg: ldousb {
Nishanth Menon3709d322013-07-29 12:03:01 -0500439 /* VDDA_3V_USB: VDDA_USBHS33 */
J Keerthye00c27e2013-06-13 10:00:11 +0530440 regulator-name = "ldousb";
441 regulator-min-microvolt = <3250000>;
442 regulator-max-microvolt = <3250000>;
443 regulator-always-on;
444 regulator-boot-on;
445 };
446 };
447 };
448 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530449};
450
Sourav Poddar9be495c2013-02-13 14:58:22 +0530451&i2c5 {
452 pinctrl-names = "default";
453 pinctrl-0 = <&i2c5_pins>;
454
455 clock-frequency = <400000>;
456};
457
Peter Ujfalusi42601d52012-10-04 14:57:24 +0300458&mcbsp3 {
459 status = "disabled";
460};
Lokesh Vutla4d2750f2012-11-05 18:22:52 +0530461
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530462&usbhshost {
463 port2-mode = "ehci-hsic";
464 port3-mode = "ehci-hsic";
465};
466
467&usbhsehci {
468 phys = <0 &hsusb2_phy &hsusb3_phy>;
469};
470
Sourav Poddar392adaf2013-02-13 14:58:44 +0530471&mcspi1 {
472
473};
474
475&mcspi2 {
476 pinctrl-names = "default";
477 pinctrl-0 = <&mcspi2_pins>;
478};
479
480&mcspi3 {
481 pinctrl-names = "default";
482 pinctrl-0 = <&mcspi3_pins>;
483};
484
485&mcspi4 {
486 pinctrl-names = "default";
487 pinctrl-0 = <&mcspi4_pins>;
488};
Sourav Poddared22fee2013-06-07 18:52:50 +0530489
490&uart1 {
491 pinctrl-names = "default";
492 pinctrl-0 = <&uart1_pins>;
493};
494
495&uart3 {
496 pinctrl-names = "default";
497 pinctrl-0 = <&uart3_pins>;
498};
499
500&uart5 {
501 pinctrl-names = "default";
502 pinctrl-0 = <&uart5_pins>;
503};