David Daney | 512254b | 2009-09-16 14:54:18 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 2004-2009 Cavium Networks |
| 7 | * Copyright (C) 2008 Wind River Systems |
| 8 | */ |
| 9 | |
| 10 | #include <linux/init.h> |
| 11 | #include <linux/irq.h> |
David Daney | d957705 | 2010-01-07 11:54:21 -0800 | [diff] [blame] | 12 | #include <linux/i2c.h> |
David Daney | 512254b | 2009-09-16 14:54:18 -0700 | [diff] [blame] | 13 | #include <linux/module.h> |
| 14 | #include <linux/platform_device.h> |
| 15 | |
| 16 | #include <asm/octeon/octeon.h> |
| 17 | #include <asm/octeon/cvmx-rnm-defs.h> |
| 18 | |
| 19 | static struct octeon_cf_data octeon_cf_data; |
| 20 | |
| 21 | static int __init octeon_cf_device_init(void) |
| 22 | { |
| 23 | union cvmx_mio_boot_reg_cfgx mio_boot_reg_cfg; |
| 24 | unsigned long base_ptr, region_base, region_size; |
| 25 | struct platform_device *pd; |
| 26 | struct resource cf_resources[3]; |
| 27 | unsigned int num_resources; |
| 28 | int i; |
| 29 | int ret = 0; |
| 30 | |
| 31 | /* Setup octeon-cf platform device if present. */ |
| 32 | base_ptr = 0; |
| 33 | if (octeon_bootinfo->major_version == 1 |
| 34 | && octeon_bootinfo->minor_version >= 1) { |
| 35 | if (octeon_bootinfo->compact_flash_common_base_addr) |
| 36 | base_ptr = |
| 37 | octeon_bootinfo->compact_flash_common_base_addr; |
| 38 | } else { |
| 39 | base_ptr = 0x1d000800; |
| 40 | } |
| 41 | |
| 42 | if (!base_ptr) |
| 43 | return ret; |
| 44 | |
| 45 | /* Find CS0 region. */ |
| 46 | for (i = 0; i < 8; i++) { |
| 47 | mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i)); |
| 48 | region_base = mio_boot_reg_cfg.s.base << 16; |
| 49 | region_size = (mio_boot_reg_cfg.s.size + 1) << 16; |
| 50 | if (mio_boot_reg_cfg.s.en && base_ptr >= region_base |
| 51 | && base_ptr < region_base + region_size) |
| 52 | break; |
| 53 | } |
| 54 | if (i >= 7) { |
| 55 | /* i and i + 1 are CS0 and CS1, both must be less than 8. */ |
| 56 | goto out; |
| 57 | } |
| 58 | octeon_cf_data.base_region = i; |
| 59 | octeon_cf_data.is16bit = mio_boot_reg_cfg.s.width; |
| 60 | octeon_cf_data.base_region_bias = base_ptr - region_base; |
| 61 | memset(cf_resources, 0, sizeof(cf_resources)); |
| 62 | num_resources = 0; |
| 63 | cf_resources[num_resources].flags = IORESOURCE_MEM; |
| 64 | cf_resources[num_resources].start = region_base; |
| 65 | cf_resources[num_resources].end = region_base + region_size - 1; |
| 66 | num_resources++; |
| 67 | |
| 68 | |
| 69 | if (!(base_ptr & 0xfffful)) { |
| 70 | /* |
| 71 | * Boot loader signals availability of DMA (true_ide |
| 72 | * mode) by setting low order bits of base_ptr to |
| 73 | * zero. |
| 74 | */ |
| 75 | |
| 76 | /* Asume that CS1 immediately follows. */ |
| 77 | mio_boot_reg_cfg.u64 = |
| 78 | cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(i + 1)); |
| 79 | region_base = mio_boot_reg_cfg.s.base << 16; |
| 80 | region_size = (mio_boot_reg_cfg.s.size + 1) << 16; |
| 81 | if (!mio_boot_reg_cfg.s.en) |
| 82 | goto out; |
| 83 | |
| 84 | cf_resources[num_resources].flags = IORESOURCE_MEM; |
| 85 | cf_resources[num_resources].start = region_base; |
| 86 | cf_resources[num_resources].end = region_base + region_size - 1; |
| 87 | num_resources++; |
| 88 | |
| 89 | octeon_cf_data.dma_engine = 0; |
| 90 | cf_resources[num_resources].flags = IORESOURCE_IRQ; |
| 91 | cf_resources[num_resources].start = OCTEON_IRQ_BOOTDMA; |
| 92 | cf_resources[num_resources].end = OCTEON_IRQ_BOOTDMA; |
| 93 | num_resources++; |
| 94 | } else { |
| 95 | octeon_cf_data.dma_engine = -1; |
| 96 | } |
| 97 | |
| 98 | pd = platform_device_alloc("pata_octeon_cf", -1); |
| 99 | if (!pd) { |
| 100 | ret = -ENOMEM; |
| 101 | goto out; |
| 102 | } |
| 103 | pd->dev.platform_data = &octeon_cf_data; |
| 104 | |
| 105 | ret = platform_device_add_resources(pd, cf_resources, num_resources); |
| 106 | if (ret) |
| 107 | goto fail; |
| 108 | |
| 109 | ret = platform_device_add(pd); |
| 110 | if (ret) |
| 111 | goto fail; |
| 112 | |
| 113 | return ret; |
| 114 | fail: |
| 115 | platform_device_put(pd); |
| 116 | out: |
| 117 | return ret; |
| 118 | } |
| 119 | device_initcall(octeon_cf_device_init); |
| 120 | |
| 121 | /* Octeon Random Number Generator. */ |
| 122 | static int __init octeon_rng_device_init(void) |
| 123 | { |
| 124 | struct platform_device *pd; |
| 125 | int ret = 0; |
| 126 | |
| 127 | struct resource rng_resources[] = { |
| 128 | { |
| 129 | .flags = IORESOURCE_MEM, |
| 130 | .start = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS), |
| 131 | .end = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS) + 0xf |
| 132 | }, { |
| 133 | .flags = IORESOURCE_MEM, |
| 134 | .start = cvmx_build_io_address(8, 0), |
| 135 | .end = cvmx_build_io_address(8, 0) + 0x7 |
| 136 | } |
| 137 | }; |
| 138 | |
| 139 | pd = platform_device_alloc("octeon_rng", -1); |
| 140 | if (!pd) { |
| 141 | ret = -ENOMEM; |
| 142 | goto out; |
| 143 | } |
| 144 | |
| 145 | ret = platform_device_add_resources(pd, rng_resources, |
| 146 | ARRAY_SIZE(rng_resources)); |
| 147 | if (ret) |
| 148 | goto fail; |
| 149 | |
| 150 | ret = platform_device_add(pd); |
| 151 | if (ret) |
| 152 | goto fail; |
| 153 | |
| 154 | return ret; |
| 155 | fail: |
| 156 | platform_device_put(pd); |
| 157 | |
| 158 | out: |
| 159 | return ret; |
| 160 | } |
| 161 | device_initcall(octeon_rng_device_init); |
| 162 | |
David Daney | d957705 | 2010-01-07 11:54:21 -0800 | [diff] [blame] | 163 | static struct i2c_board_info __initdata octeon_i2c_devices[] = { |
| 164 | { |
| 165 | I2C_BOARD_INFO("ds1337", 0x68), |
| 166 | }, |
| 167 | }; |
| 168 | |
| 169 | static int __init octeon_i2c_devices_init(void) |
| 170 | { |
| 171 | return i2c_register_board_info(0, octeon_i2c_devices, |
| 172 | ARRAY_SIZE(octeon_i2c_devices)); |
| 173 | } |
| 174 | arch_initcall(octeon_i2c_devices_init); |
David Daney | f41c3c1 | 2010-01-07 13:23:41 -0800 | [diff] [blame] | 175 | |
| 176 | #define OCTEON_I2C_IO_BASE 0x1180000001000ull |
| 177 | #define OCTEON_I2C_IO_UNIT_OFFSET 0x200 |
| 178 | |
| 179 | static struct octeon_i2c_data octeon_i2c_data[2]; |
| 180 | |
| 181 | static int __init octeon_i2c_device_init(void) |
| 182 | { |
| 183 | struct platform_device *pd; |
| 184 | int ret = 0; |
| 185 | int port, num_ports; |
| 186 | |
| 187 | struct resource i2c_resources[] = { |
| 188 | { |
| 189 | .flags = IORESOURCE_MEM, |
| 190 | }, { |
| 191 | .flags = IORESOURCE_IRQ, |
| 192 | } |
| 193 | }; |
| 194 | |
| 195 | if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) |
| 196 | num_ports = 2; |
| 197 | else |
| 198 | num_ports = 1; |
| 199 | |
| 200 | for (port = 0; port < num_ports; port++) { |
| 201 | octeon_i2c_data[port].sys_freq = octeon_get_clock_rate(); |
| 202 | /*FIXME: should be examined. At the moment is set for 100Khz */ |
| 203 | octeon_i2c_data[port].i2c_freq = 100000; |
| 204 | |
| 205 | pd = platform_device_alloc("i2c-octeon", port); |
| 206 | if (!pd) { |
| 207 | ret = -ENOMEM; |
| 208 | goto out; |
| 209 | } |
| 210 | |
| 211 | pd->dev.platform_data = octeon_i2c_data + port; |
| 212 | |
| 213 | i2c_resources[0].start = |
| 214 | OCTEON_I2C_IO_BASE + (port * OCTEON_I2C_IO_UNIT_OFFSET); |
| 215 | i2c_resources[0].end = i2c_resources[0].start + 0x1f; |
| 216 | switch (port) { |
| 217 | case 0: |
| 218 | i2c_resources[1].start = OCTEON_IRQ_TWSI; |
| 219 | i2c_resources[1].end = OCTEON_IRQ_TWSI; |
| 220 | break; |
| 221 | case 1: |
| 222 | i2c_resources[1].start = OCTEON_IRQ_TWSI2; |
| 223 | i2c_resources[1].end = OCTEON_IRQ_TWSI2; |
| 224 | break; |
| 225 | default: |
| 226 | BUG(); |
| 227 | } |
| 228 | |
| 229 | ret = platform_device_add_resources(pd, |
| 230 | i2c_resources, |
| 231 | ARRAY_SIZE(i2c_resources)); |
| 232 | if (ret) |
| 233 | goto fail; |
| 234 | |
| 235 | ret = platform_device_add(pd); |
| 236 | if (ret) |
| 237 | goto fail; |
| 238 | } |
| 239 | return ret; |
| 240 | fail: |
| 241 | platform_device_put(pd); |
| 242 | out: |
| 243 | return ret; |
| 244 | } |
| 245 | device_initcall(octeon_i2c_device_init); |
| 246 | |
David Daney | 0f7e64a | 2009-10-14 12:04:37 -0700 | [diff] [blame] | 247 | /* Octeon SMI/MDIO interface. */ |
| 248 | static int __init octeon_mdiobus_device_init(void) |
| 249 | { |
| 250 | struct platform_device *pd; |
| 251 | int ret = 0; |
| 252 | |
| 253 | if (octeon_is_simulation()) |
| 254 | return 0; /* No mdio in the simulator. */ |
| 255 | |
| 256 | /* The bus number is the platform_device id. */ |
| 257 | pd = platform_device_alloc("mdio-octeon", 0); |
| 258 | if (!pd) { |
| 259 | ret = -ENOMEM; |
| 260 | goto out; |
| 261 | } |
| 262 | |
| 263 | ret = platform_device_add(pd); |
| 264 | if (ret) |
| 265 | goto fail; |
| 266 | |
| 267 | return ret; |
| 268 | fail: |
| 269 | platform_device_put(pd); |
| 270 | |
| 271 | out: |
| 272 | return ret; |
| 273 | |
| 274 | } |
| 275 | device_initcall(octeon_mdiobus_device_init); |
| 276 | |
David Daney | 24479d9 | 2009-10-14 12:04:39 -0700 | [diff] [blame] | 277 | /* Octeon mgmt port Ethernet interface. */ |
| 278 | static int __init octeon_mgmt_device_init(void) |
| 279 | { |
| 280 | struct platform_device *pd; |
| 281 | int ret = 0; |
| 282 | int port, num_ports; |
| 283 | |
| 284 | struct resource mgmt_port_resource = { |
| 285 | .flags = IORESOURCE_IRQ, |
| 286 | .start = -1, |
| 287 | .end = -1 |
| 288 | }; |
| 289 | |
| 290 | if (!OCTEON_IS_MODEL(OCTEON_CN56XX) && !OCTEON_IS_MODEL(OCTEON_CN52XX)) |
| 291 | return 0; |
| 292 | |
| 293 | if (OCTEON_IS_MODEL(OCTEON_CN56XX)) |
| 294 | num_ports = 1; |
| 295 | else |
| 296 | num_ports = 2; |
| 297 | |
| 298 | for (port = 0; port < num_ports; port++) { |
| 299 | pd = platform_device_alloc("octeon_mgmt", port); |
| 300 | if (!pd) { |
| 301 | ret = -ENOMEM; |
| 302 | goto out; |
| 303 | } |
| 304 | switch (port) { |
| 305 | case 0: |
| 306 | mgmt_port_resource.start = OCTEON_IRQ_MII0; |
| 307 | break; |
| 308 | case 1: |
| 309 | mgmt_port_resource.start = OCTEON_IRQ_MII1; |
| 310 | break; |
| 311 | default: |
| 312 | BUG(); |
| 313 | } |
| 314 | mgmt_port_resource.end = mgmt_port_resource.start; |
| 315 | |
| 316 | ret = platform_device_add_resources(pd, &mgmt_port_resource, 1); |
| 317 | |
| 318 | if (ret) |
| 319 | goto fail; |
| 320 | |
| 321 | ret = platform_device_add(pd); |
| 322 | if (ret) |
| 323 | goto fail; |
| 324 | } |
| 325 | return ret; |
| 326 | fail: |
| 327 | platform_device_put(pd); |
| 328 | |
| 329 | out: |
| 330 | return ret; |
| 331 | |
| 332 | } |
| 333 | device_initcall(octeon_mgmt_device_init); |
| 334 | |
David Daney | 512254b | 2009-09-16 14:54:18 -0700 | [diff] [blame] | 335 | MODULE_AUTHOR("David Daney <ddaney@caviumnetworks.com>"); |
| 336 | MODULE_LICENSE("GPL"); |
| 337 | MODULE_DESCRIPTION("Platform driver for Octeon SOC"); |