Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 12 | #include <linux/debugfs.h> |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 13 | #include <uapi/drm/sde_drm.h> |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 14 | #include "sde_kms.h" |
Clarence Ip | c475b08 | 2016-06-26 09:27:23 -0400 | [diff] [blame] | 15 | #include "sde_formats.h" |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 16 | #include "sde_hw_sspp.h" |
| 17 | |
| 18 | #define DECIMATED_DIMENSION(dim, deci) (((dim) + ((1 << (deci)) - 1)) >> (deci)) |
| 19 | #define PHASE_STEP_SHIFT 21 |
| 20 | #define PHASE_STEP_UNIT_SCALE ((int) (1 << PHASE_STEP_SHIFT)) |
| 21 | #define PHASE_RESIDUAL 15 |
| 22 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 23 | #define SHARP_STRENGTH_DEFAULT 32 |
| 24 | #define SHARP_EDGE_THR_DEFAULT 112 |
| 25 | #define SHARP_SMOOTH_THR_DEFAULT 8 |
| 26 | #define SHARP_NOISE_THR_DEFAULT 2 |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 27 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 28 | #define SDE_NAME_SIZE 12 |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 29 | |
| 30 | struct sde_plane { |
| 31 | struct drm_plane base; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 32 | |
| 33 | int mmu_id; |
| 34 | |
| 35 | enum sde_sspp pipe; |
| 36 | uint32_t features; /* capabilities from catalog */ |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 37 | uint32_t nformats; |
| 38 | uint32_t formats[32]; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 39 | |
| 40 | struct sde_hw_pipe *pipe_hw; |
| 41 | struct sde_hw_pipe_cfg pipe_cfg; |
| 42 | struct sde_hw_pixel_ext pixel_ext; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 43 | struct sde_hw_sharp_cfg sharp_cfg; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 44 | struct sde_hw_scaler3_cfg scaler3_cfg; |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 45 | |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 46 | struct sde_csc_cfg csc_cfg; |
| 47 | struct sde_csc_cfg *csc_ptr; |
| 48 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 49 | const struct sde_sspp_sub_blks *pipe_sblk; |
| 50 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 51 | char pipe_name[SDE_NAME_SIZE]; |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 52 | |
| 53 | /* debugfs related stuff */ |
| 54 | struct dentry *debugfs_root; |
| 55 | struct sde_debugfs_regset32 debugfs_src; |
| 56 | struct sde_debugfs_regset32 debugfs_scaler; |
| 57 | struct sde_debugfs_regset32 debugfs_csc; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 58 | }; |
| 59 | #define to_sde_plane(x) container_of(x, struct sde_plane, base) |
| 60 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 61 | static bool sde_plane_enabled(struct drm_plane_state *state) |
| 62 | { |
| 63 | return state->fb && state->crtc; |
| 64 | } |
| 65 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 66 | static void _sde_plane_set_scanout(struct drm_plane *plane, |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 67 | struct sde_plane_state *pstate, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 68 | struct sde_hw_pipe_cfg *pipe_cfg, struct drm_framebuffer *fb) |
| 69 | { |
| 70 | struct sde_plane *psde = to_sde_plane(plane); |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 71 | unsigned int shift; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 72 | int i; |
| 73 | |
| 74 | if (pipe_cfg && fb && psde->pipe_hw->ops.setup_sourceaddress) { |
| 75 | /* stride */ |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 76 | if (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) & |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 77 | BIT(SDE_DRM_DEINTERLACE)) |
| 78 | shift = 1; |
| 79 | else |
| 80 | shift = 0; |
| 81 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 82 | i = min_t(int, ARRAY_SIZE(fb->pitches), SDE_MAX_PLANES); |
| 83 | while (i) { |
| 84 | --i; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 85 | pipe_cfg->src.ystride[i] = fb->pitches[i] << shift; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 86 | } |
| 87 | |
| 88 | /* address */ |
| 89 | for (i = 0; i < ARRAY_SIZE(pipe_cfg->addr.plane); ++i) |
| 90 | pipe_cfg->addr.plane[i] = msm_framebuffer_iova(fb, |
| 91 | psde->mmu_id, i); |
| 92 | |
| 93 | /* hw driver */ |
| 94 | psde->pipe_hw->ops.setup_sourceaddress(psde->pipe_hw, pipe_cfg); |
| 95 | } |
| 96 | } |
| 97 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 98 | static void _sde_plane_setup_scaler3(struct drm_plane *plane, |
| 99 | uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, |
| 100 | struct sde_hw_scaler3_cfg *scale_cfg, |
| 101 | struct sde_mdp_format_params *fmt, |
| 102 | uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v) |
| 103 | { |
| 104 | } |
| 105 | |
| 106 | static void _sde_plane_setup_scaler2(struct drm_plane *plane, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 107 | uint32_t src, uint32_t dst, uint32_t *phase_steps, |
| 108 | enum sde_hw_filter *filter, struct sde_mdp_format_params *fmt, |
| 109 | uint32_t chroma_subsampling) |
| 110 | { |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 111 | /* calculate phase steps, leave init phase as zero */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 112 | phase_steps[SDE_SSPP_COMP_0] = |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 113 | mult_frac(1 << PHASE_STEP_SHIFT, src, dst); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 114 | phase_steps[SDE_SSPP_COMP_1_2] = |
| 115 | phase_steps[SDE_SSPP_COMP_0] / chroma_subsampling; |
| 116 | phase_steps[SDE_SSPP_COMP_2] = phase_steps[SDE_SSPP_COMP_1_2]; |
| 117 | phase_steps[SDE_SSPP_COMP_3] = phase_steps[SDE_SSPP_COMP_0]; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 118 | |
| 119 | /* calculate scaler config, if necessary */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 120 | if (fmt->is_yuv || src != dst) { |
| 121 | filter[SDE_SSPP_COMP_3] = |
| 122 | (src <= dst) ? SDE_MDP_SCALE_FILTER_BIL : |
| 123 | SDE_MDP_SCALE_FILTER_PCMN; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 124 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 125 | if (fmt->is_yuv) { |
| 126 | filter[SDE_SSPP_COMP_0] = SDE_MDP_SCALE_FILTER_CA; |
| 127 | filter[SDE_SSPP_COMP_1_2] = filter[SDE_SSPP_COMP_3]; |
| 128 | } else { |
| 129 | filter[SDE_SSPP_COMP_0] = filter[SDE_SSPP_COMP_3]; |
| 130 | filter[SDE_SSPP_COMP_1_2] = |
| 131 | SDE_MDP_SCALE_FILTER_NEAREST; |
| 132 | } |
| 133 | } else { |
| 134 | /* disable scaler */ |
| 135 | filter[SDE_SSPP_COMP_0] = SDE_MDP_SCALE_FILTER_MAX; |
| 136 | filter[SDE_SSPP_COMP_1_2] = SDE_MDP_SCALE_FILTER_MAX; |
| 137 | filter[SDE_SSPP_COMP_3] = SDE_MDP_SCALE_FILTER_MAX; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 138 | } |
| 139 | } |
| 140 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 141 | static void _sde_plane_setup_pixel_ext(struct drm_plane *plane, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 142 | uint32_t src, uint32_t dst, uint32_t decimated_src, |
| 143 | uint32_t *phase_steps, uint32_t *out_src, int *out_edge1, |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 144 | int *out_edge2, enum sde_hw_filter *filter, |
| 145 | struct sde_mdp_format_params *fmt, uint32_t chroma_subsampling, |
| 146 | bool post_compare) |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 147 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 148 | int64_t edge1, edge2, caf; |
| 149 | uint32_t src_work; |
| 150 | int i, tmp; |
| 151 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 152 | if (plane && phase_steps && out_src && out_edge1 && |
| 153 | out_edge2 && filter && fmt) { |
| 154 | /* handle CAF for YUV formats */ |
| 155 | if (fmt->is_yuv && SDE_MDP_SCALE_FILTER_CA == *filter) |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 156 | caf = PHASE_STEP_UNIT_SCALE; |
| 157 | else |
| 158 | caf = 0; |
| 159 | |
| 160 | for (i = 0; i < SDE_MAX_PLANES; i++) { |
| 161 | src_work = decimated_src; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 162 | if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2) |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 163 | src_work /= chroma_subsampling; |
| 164 | if (post_compare) |
| 165 | src = src_work; |
| 166 | if (!(fmt->is_yuv) && (src == dst)) { |
| 167 | /* unity */ |
| 168 | edge1 = 0; |
| 169 | edge2 = 0; |
| 170 | } else if (dst >= src) { |
| 171 | /* upscale */ |
| 172 | edge1 = (1 << PHASE_RESIDUAL); |
| 173 | edge1 -= caf; |
| 174 | edge2 = (1 << PHASE_RESIDUAL); |
| 175 | edge2 += (dst - 1) * *(phase_steps + i); |
| 176 | edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE; |
| 177 | edge2 += caf; |
| 178 | edge2 = -(edge2); |
| 179 | } else { |
| 180 | /* downscale */ |
| 181 | edge1 = 0; |
| 182 | edge2 = (dst - 1) * *(phase_steps + i); |
| 183 | edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE; |
| 184 | edge2 += *(phase_steps + i); |
| 185 | edge2 = -(edge2); |
| 186 | } |
| 187 | |
| 188 | /* only enable CAF for luma plane */ |
| 189 | caf = 0; |
| 190 | |
| 191 | /* populate output arrays */ |
| 192 | *(out_src + i) = src_work; |
| 193 | |
| 194 | /* edge updates taken from __pxl_extn_helper */ |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 195 | if (edge1 >= 0) { |
| 196 | tmp = (uint32_t)edge1; |
| 197 | tmp >>= PHASE_STEP_SHIFT; |
| 198 | *(out_edge1 + i) = -tmp; |
| 199 | } else { |
| 200 | tmp = (uint32_t)(-edge1); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 201 | *(out_edge1 + i) = |
| 202 | (tmp + PHASE_STEP_UNIT_SCALE - 1) >> |
| 203 | PHASE_STEP_SHIFT; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 204 | } |
| 205 | if (edge2 >= 0) { |
| 206 | tmp = (uint32_t)edge2; |
| 207 | tmp >>= PHASE_STEP_SHIFT; |
| 208 | *(out_edge2 + i) = -tmp; |
| 209 | } else { |
| 210 | tmp = (uint32_t)(-edge2); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 211 | *(out_edge2 + i) = |
| 212 | (tmp + PHASE_STEP_UNIT_SCALE - 1) >> |
| 213 | PHASE_STEP_SHIFT; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 214 | } |
| 215 | } |
| 216 | } |
| 217 | } |
| 218 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 219 | static void *_sde_plane_get_blob(struct sde_plane_state *pstate, |
| 220 | enum msm_mdp_plane_property property, size_t *byte_len) |
| 221 | { |
| 222 | struct drm_property_blob *blob; |
| 223 | size_t len = 0; |
| 224 | void *ret = 0; |
| 225 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 226 | if (!pstate || (property >= PLANE_PROP_BLOBCOUNT)) { |
| 227 | DRM_ERROR("Invalid argument(s)\n"); |
| 228 | } else { |
| 229 | blob = pstate->property_blobs[property]; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 230 | if (blob) { |
| 231 | len = blob->length; |
| 232 | ret = &blob->data; |
| 233 | } |
| 234 | } |
| 235 | |
| 236 | if (byte_len) |
| 237 | *byte_len = len; |
| 238 | |
| 239 | return ret; |
| 240 | } |
| 241 | |
| 242 | /** |
| 243 | * _sde_plane_verify_blob - verify incoming blob is big enough to contain |
| 244 | * sub-structure |
| 245 | * @blob_ptr: Pointer to start of incoming blob data |
| 246 | * @blob_size: Size of incoming blob data, in bytes |
| 247 | * @sub_ptr: Pointer to start of desired sub-structure |
| 248 | * @sub_size: Required size of sub-structure, in bytes |
| 249 | */ |
| 250 | static int _sde_plane_verify_blob(void *blob_ptr, |
| 251 | size_t blob_size, |
| 252 | void *sub_ptr, |
| 253 | size_t sub_size) |
| 254 | { |
| 255 | /* |
| 256 | * Use the blob size provided by drm to check if there are enough |
| 257 | * bytes from the start of versioned sub-structures to the end of |
| 258 | * blob data: |
| 259 | * |
| 260 | * e.g., |
| 261 | * blob_ptr --> struct blob_data { |
| 262 | * uint32_t version; |
| 263 | * sub_ptr --> struct blob_data_v1 v1; |
| 264 | * sub_ptr + sub_size --> struct blob_stuff more_stuff; |
| 265 | * blob_ptr + blob_size --> }; |
| 266 | * |
| 267 | * It's important to check the actual number of bytes from the start |
| 268 | * of the sub-structure to the end of the blob data, and not just rely |
| 269 | * on something like, |
| 270 | * |
| 271 | * sizeof(blob) - sizeof(blob->version) >= sizeof(sub-struct) |
| 272 | * |
| 273 | * This is because the start of the sub-structure can vary based on |
| 274 | * how the compiler pads the overall structure. |
| 275 | */ |
| 276 | if (blob_ptr && sub_ptr) |
| 277 | /* return zero if end of blob >= end of sub-struct */ |
| 278 | return ((unsigned char *)blob_ptr + blob_size) < |
| 279 | ((unsigned char *)sub_ptr + sub_size); |
| 280 | return -EINVAL; |
| 281 | } |
| 282 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 283 | static void _sde_plane_setup_csc(struct sde_plane *psde, |
| 284 | struct sde_plane_state *pstate, |
| 285 | struct sde_mdp_format_params *fmt) |
| 286 | { |
| 287 | static const struct sde_csc_cfg sde_csc_YUV2RGB_601L = { |
| 288 | { |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 289 | /* S15.16 format */ |
| 290 | 0x00012A00, 0x00000000, 0x00019880, |
| 291 | 0x00012A00, 0xFFFF9B80, 0xFFFF3000, |
| 292 | 0x00012A00, 0x00020480, 0x00000000, |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 293 | }, |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 294 | /* signed bias */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 295 | { 0xfff0, 0xff80, 0xff80,}, |
| 296 | { 0x0, 0x0, 0x0,}, |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 297 | /* unsigned clamp */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 298 | { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,}, |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 299 | { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff,}, |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 300 | }; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 301 | static const struct sde_csc_cfg sde_csc_NOP = { |
| 302 | { |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 303 | /* identity matrix, S15.16 format */ |
| 304 | 0x10000, 0x00000, 0x00000, |
| 305 | 0x00000, 0x10000, 0x00000, |
| 306 | 0x00000, 0x00000, 0x10000, |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 307 | }, |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 308 | /* signed bias */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 309 | { 0x0, 0x0, 0x0,}, |
| 310 | { 0x0, 0x0, 0x0,}, |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 311 | /* unsigned clamp */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 312 | { 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,}, |
| 313 | { 0x0, 0xff, 0x0, 0xff, 0x0, 0xff,}, |
| 314 | }; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 315 | struct sde_drm_csc *csc = NULL; |
| 316 | size_t csc_size = 0; |
| 317 | bool user_blob = false; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 318 | |
| 319 | if (!psde->pipe_hw->ops.setup_csc) |
| 320 | return; |
| 321 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 322 | /* check for user space override */ |
| 323 | csc = _sde_plane_get_blob(pstate, PLANE_PROP_CSC, &csc_size); |
| 324 | if (csc) { |
| 325 | struct sde_csc_cfg cfg; |
| 326 | int i; |
| 327 | |
| 328 | /* user space override */ |
| 329 | memcpy(&cfg, &sde_csc_NOP, sizeof(struct sde_csc_cfg)); |
| 330 | switch (csc->version) { |
| 331 | case SDE_DRM_CSC_V1: |
| 332 | if (!_sde_plane_verify_blob(csc, |
| 333 | csc_size, |
| 334 | &csc->v1, |
| 335 | sizeof(struct sde_drm_csc_v1))) { |
| 336 | for (i = 0; i < SDE_CSC_MATRIX_COEFF_SIZE; ++i) |
| 337 | cfg.csc_mv[i] = |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 338 | csc->v1.ctm_coeff[i] >> 16; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 339 | for (i = 0; i < SDE_CSC_BIAS_SIZE; ++i) { |
| 340 | cfg.csc_pre_bv[i] = |
| 341 | csc->v1.pre_bias[i]; |
| 342 | cfg.csc_post_bv[i] = |
| 343 | csc->v1.post_bias[i]; |
| 344 | } |
| 345 | for (i = 0; i < SDE_CSC_CLAMP_SIZE; ++i) { |
| 346 | cfg.csc_pre_lv[i] = |
| 347 | csc->v1.pre_clamp[i]; |
| 348 | cfg.csc_post_lv[i] = |
| 349 | csc->v1.post_clamp[i]; |
| 350 | } |
| 351 | user_blob = true; |
| 352 | } |
| 353 | break; |
| 354 | default: |
| 355 | break; |
| 356 | } |
| 357 | |
| 358 | if (!user_blob) |
| 359 | DRM_ERROR("Invalid csc blob, v%lld\n", csc->version); |
| 360 | else |
| 361 | psde->pipe_hw->ops.setup_csc(psde->pipe_hw, |
| 362 | (struct sde_csc_cfg *)&cfg); |
| 363 | } |
| 364 | |
| 365 | if (user_blob) { |
| 366 | DBG("User blobs override for CSC"); |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 367 | psde->csc_ptr = &psde->csc_cfg; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 368 | /* revert to kernel default */ |
| 369 | } else if (fmt->is_yuv) { |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 370 | psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc_YUV2RGB_601L; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 371 | } else { |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 372 | psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc_NOP; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 373 | } |
Clarence Ip | 373f859 | 2016-05-26 00:58:42 -0400 | [diff] [blame^] | 374 | |
| 375 | psde->pipe_hw->ops.setup_csc(psde->pipe_hw, psde->csc_ptr); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 376 | } |
| 377 | |
| 378 | static int _sde_plane_mode_set(struct drm_plane *plane, |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 379 | struct drm_crtc *crtc, struct drm_framebuffer *fb, |
| 380 | int crtc_x, int crtc_y, |
| 381 | unsigned int crtc_w, unsigned int crtc_h, |
| 382 | uint32_t src_x, uint32_t src_y, |
| 383 | uint32_t src_w, uint32_t src_h) |
| 384 | { |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 385 | struct sde_plane *psde; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 386 | struct sde_plane_state *pstate; |
| 387 | const struct mdp_format *format; |
| 388 | uint32_t nplanes, pix_format, tmp; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 389 | uint32_t chroma_subsmpl_h, chroma_subsmpl_v; |
| 390 | uint32_t src_fmt_flags; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 391 | int i; |
| 392 | struct sde_mdp_format_params *fmt; |
| 393 | struct sde_hw_pixel_ext *pe; |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 394 | size_t sc_u_size = 0; |
| 395 | struct sde_drm_scaler *sc_u = NULL; |
| 396 | struct sde_drm_scaler_v1 *sc_u1 = NULL; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 397 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 398 | DBG(""); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 399 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 400 | if (!plane || !plane->state) { |
| 401 | DRM_ERROR("Invalid plane/state\n"); |
| 402 | return -EINVAL; |
| 403 | } |
| 404 | if (!crtc || !fb) { |
| 405 | DRM_ERROR("Invalid crtc/fb\n"); |
| 406 | return -EINVAL; |
| 407 | } |
| 408 | psde = to_sde_plane(plane); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 409 | pstate = to_sde_plane_state(plane->state); |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 410 | nplanes = drm_format_num_planes(fb->pixel_format); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 411 | |
| 412 | format = to_mdp_format(msm_framebuffer_format(fb)); |
| 413 | pix_format = format->base.pixel_format; |
| 414 | |
| 415 | /* src values are in Q16 fixed point, convert to integer */ |
| 416 | src_x = src_x >> 16; |
| 417 | src_y = src_y >> 16; |
| 418 | src_w = src_w >> 16; |
| 419 | src_h = src_h >> 16; |
| 420 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 421 | DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", psde->pipe_name, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 422 | fb->base.id, src_x, src_y, src_w, src_h, |
| 423 | crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h); |
| 424 | |
| 425 | /* update format configuration */ |
| 426 | memset(&(psde->pipe_cfg), 0, sizeof(struct sde_hw_pipe_cfg)); |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 427 | src_fmt_flags = 0; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 428 | |
| 429 | psde->pipe_cfg.src.format = sde_mdp_get_format_params(pix_format, |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 430 | fb->modifier[0]); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 431 | psde->pipe_cfg.src.width = fb->width; |
| 432 | psde->pipe_cfg.src.height = fb->height; |
| 433 | psde->pipe_cfg.src.num_planes = nplanes; |
| 434 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 435 | _sde_plane_set_scanout(plane, pstate, &psde->pipe_cfg, fb); |
| 436 | |
| 437 | /* decimation */ |
| 438 | psde->pipe_cfg.horz_decimation = |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 439 | sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE); |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 440 | psde->pipe_cfg.vert_decimation = |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 441 | sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE); |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 442 | |
| 443 | /* flags */ |
| 444 | DBG("Flags 0x%llX, rotation 0x%llX", |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 445 | sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG), |
| 446 | sde_plane_get_property(pstate, PLANE_PROP_ROTATION)); |
| 447 | if (sde_plane_get_property(pstate, PLANE_PROP_ROTATION) & |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 448 | BIT(DRM_REFLECT_X)) |
| 449 | src_fmt_flags |= SDE_SSPP_FLIP_LR; |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 450 | if (sde_plane_get_property(pstate, PLANE_PROP_ROTATION) & |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 451 | BIT(DRM_REFLECT_Y)) |
| 452 | src_fmt_flags |= SDE_SSPP_FLIP_UD; |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 453 | if (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) & |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 454 | BIT(SDE_DRM_DEINTERLACE)) { |
| 455 | src_h /= 2; |
| 456 | src_y = DIV_ROUND_UP(src_y, 2); |
| 457 | src_y &= ~0x1; |
| 458 | } |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 459 | |
| 460 | psde->pipe_cfg.src_rect.x = src_x; |
| 461 | psde->pipe_cfg.src_rect.y = src_y; |
| 462 | psde->pipe_cfg.src_rect.w = src_w; |
| 463 | psde->pipe_cfg.src_rect.h = src_h; |
| 464 | |
| 465 | psde->pipe_cfg.dst_rect.x = crtc_x; |
| 466 | psde->pipe_cfg.dst_rect.y = crtc_y; |
| 467 | psde->pipe_cfg.dst_rect.w = crtc_w; |
| 468 | psde->pipe_cfg.dst_rect.h = crtc_h; |
| 469 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 470 | /* get sde pixel format definition */ |
| 471 | fmt = psde->pipe_cfg.src.format; |
| 472 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 473 | /* don't chroma subsample if decimating */ |
| 474 | chroma_subsmpl_h = psde->pipe_cfg.horz_decimation ? 1 : |
| 475 | drm_format_horz_chroma_subsampling(pix_format); |
| 476 | chroma_subsmpl_v = psde->pipe_cfg.vert_decimation ? 1 : |
| 477 | drm_format_vert_chroma_subsampling(pix_format); |
| 478 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 479 | pe = &(psde->pixel_ext); |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 480 | memset(pe, 0, sizeof(struct sde_hw_pixel_ext)); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 481 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 482 | /* get scaler config from user space */ |
| 483 | sc_u = _sde_plane_get_blob(pstate, PLANE_PROP_SCALER, &sc_u_size); |
| 484 | if (sc_u) { |
| 485 | switch (sc_u->version) { |
| 486 | case SDE_DRM_SCALER_V1: |
| 487 | if (!_sde_plane_verify_blob(sc_u, |
| 488 | sc_u_size, |
| 489 | &sc_u->v1, |
| 490 | sizeof(*sc_u1))) |
| 491 | sc_u1 = &sc_u->v1; |
| 492 | break; |
| 493 | default: |
| 494 | DBG("Unrecognized scaler blob v%lld", sc_u->version); |
| 495 | break; |
| 496 | } |
| 497 | } |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 498 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 499 | /* update scaler */ |
| 500 | if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) { |
| 501 | if (sc_u1 && (sc_u1->enable & SDE_DRM_SCALER_SCALER_3)) |
| 502 | DBG("QSEED3 blob detected"); |
| 503 | else |
| 504 | _sde_plane_setup_scaler3(plane, src_w, src_h, crtc_w, |
| 505 | crtc_h, &psde->scaler3_cfg, fmt, |
| 506 | chroma_subsmpl_h, chroma_subsmpl_v); |
| 507 | } else { |
| 508 | /* always calculate basic scaler config */ |
| 509 | if (sc_u1 && (sc_u1->enable & SDE_DRM_SCALER_SCALER_2)) { |
| 510 | /* populate from user space */ |
| 511 | for (i = 0; i < SDE_MAX_PLANES; i++) { |
| 512 | pe->init_phase_x[i] = sc_u1->init_phase_x[i]; |
| 513 | pe->phase_step_x[i] = sc_u1->phase_step_x[i]; |
| 514 | pe->init_phase_y[i] = sc_u1->init_phase_y[i]; |
| 515 | pe->phase_step_y[i] = sc_u1->phase_step_y[i]; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 516 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 517 | pe->horz_filter[i] = sc_u1->horz_filter[i]; |
| 518 | pe->vert_filter[i] = sc_u1->vert_filter[i]; |
| 519 | } |
| 520 | } else { |
| 521 | /* calculate phase steps */ |
| 522 | _sde_plane_setup_scaler2(plane, src_w, crtc_w, |
| 523 | pe->phase_step_x, |
| 524 | pe->horz_filter, fmt, chroma_subsmpl_h); |
| 525 | _sde_plane_setup_scaler2(plane, src_h, crtc_h, |
| 526 | pe->phase_step_y, |
| 527 | pe->vert_filter, fmt, chroma_subsmpl_v); |
| 528 | } |
| 529 | } |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 530 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 531 | /* update pixel extensions */ |
| 532 | if (sc_u1 && (sc_u1->enable & SDE_DRM_SCALER_PIX_EXT)) { |
| 533 | /* populate from user space */ |
| 534 | for (i = 0; i < SDE_MAX_PLANES; i++) { |
| 535 | pe->num_ext_pxls_left[i] = sc_u1->lr.num_pxls_start[i]; |
| 536 | pe->num_ext_pxls_right[i] = sc_u1->lr.num_pxls_end[i]; |
| 537 | pe->left_ftch[i] = sc_u1->lr.ftch_start[i]; |
| 538 | pe->right_ftch[i] = sc_u1->lr.ftch_end[i]; |
| 539 | pe->left_rpt[i] = sc_u1->lr.rpt_start[i]; |
| 540 | pe->right_rpt[i] = sc_u1->lr.rpt_end[i]; |
| 541 | pe->roi_w[i] = sc_u1->lr.roi[i]; |
| 542 | |
| 543 | pe->num_ext_pxls_top[i] = sc_u1->tb.num_pxls_start[i]; |
| 544 | pe->num_ext_pxls_btm[i] = sc_u1->tb.num_pxls_end[i]; |
| 545 | pe->top_ftch[i] = sc_u1->tb.ftch_start[i]; |
| 546 | pe->btm_ftch[i] = sc_u1->tb.ftch_end[i]; |
| 547 | pe->top_rpt[i] = sc_u1->tb.rpt_start[i]; |
| 548 | pe->btm_rpt[i] = sc_u1->tb.rpt_end[i]; |
| 549 | pe->roi_h[i] = sc_u1->tb.roi[i]; |
| 550 | } |
| 551 | } else { |
| 552 | /* calculate left/right/top/bottom pixel extensions */ |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 553 | tmp = DECIMATED_DIMENSION(src_w, |
| 554 | psde->pipe_cfg.horz_decimation); |
| 555 | if (fmt->is_yuv) |
| 556 | tmp &= ~0x1; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 557 | _sde_plane_setup_pixel_ext(plane, src_w, crtc_w, tmp, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 558 | pe->phase_step_x, |
| 559 | pe->roi_w, |
| 560 | pe->num_ext_pxls_left, |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 561 | pe->num_ext_pxls_right, pe->horz_filter, fmt, |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 562 | chroma_subsmpl_h, 0); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 563 | |
| 564 | tmp = DECIMATED_DIMENSION(src_h, |
| 565 | psde->pipe_cfg.vert_decimation); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 566 | _sde_plane_setup_pixel_ext(plane, src_h, crtc_h, tmp, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 567 | pe->phase_step_y, |
| 568 | pe->roi_h, |
| 569 | pe->num_ext_pxls_top, |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 570 | pe->num_ext_pxls_btm, pe->vert_filter, fmt, |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 571 | chroma_subsmpl_v, 1); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 572 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 573 | for (i = 0; i < SDE_MAX_PLANES; i++) { |
| 574 | if (pe->num_ext_pxls_left[i] >= 0) |
| 575 | pe->left_rpt[i] = |
| 576 | pe->num_ext_pxls_left[i]; |
| 577 | else |
| 578 | pe->left_ftch[i] = |
| 579 | pe->num_ext_pxls_left[i]; |
| 580 | |
| 581 | if (pe->num_ext_pxls_right[i] >= 0) |
| 582 | pe->right_rpt[i] = |
| 583 | pe->num_ext_pxls_right[i]; |
| 584 | else |
| 585 | pe->right_ftch[i] = |
| 586 | pe->num_ext_pxls_right[i]; |
| 587 | |
| 588 | if (pe->num_ext_pxls_top[i] >= 0) |
| 589 | pe->top_rpt[i] = |
| 590 | pe->num_ext_pxls_top[i]; |
| 591 | else |
| 592 | pe->top_ftch[i] = |
| 593 | pe->num_ext_pxls_top[i]; |
| 594 | |
| 595 | if (pe->num_ext_pxls_btm[i] >= 0) |
| 596 | pe->btm_rpt[i] = |
| 597 | pe->num_ext_pxls_btm[i]; |
| 598 | else |
| 599 | pe->btm_ftch[i] = |
| 600 | pe->num_ext_pxls_btm[i]; |
| 601 | } |
| 602 | } |
| 603 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 604 | if (psde->pipe_hw->ops.setup_format) |
| 605 | psde->pipe_hw->ops.setup_format(psde->pipe_hw, |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 606 | &psde->pipe_cfg, src_fmt_flags); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 607 | if (psde->pipe_hw->ops.setup_rects) |
| 608 | psde->pipe_hw->ops.setup_rects(psde->pipe_hw, |
| 609 | &psde->pipe_cfg, &psde->pixel_ext); |
| 610 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 611 | /* update sharpening */ |
| 612 | psde->sharp_cfg.strength = SHARP_STRENGTH_DEFAULT; |
| 613 | psde->sharp_cfg.edge_thr = SHARP_EDGE_THR_DEFAULT; |
| 614 | psde->sharp_cfg.smooth_thr = SHARP_SMOOTH_THR_DEFAULT; |
| 615 | psde->sharp_cfg.noise_thr = SHARP_NOISE_THR_DEFAULT; |
| 616 | |
| 617 | if (psde->pipe_hw->ops.setup_sharpening) |
| 618 | psde->pipe_hw->ops.setup_sharpening(psde->pipe_hw, |
| 619 | &psde->sharp_cfg); |
| 620 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 621 | /* update csc */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 622 | if (fmt->is_yuv) |
| 623 | _sde_plane_setup_csc(psde, pstate, fmt); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 624 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 625 | return 0; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 626 | } |
| 627 | |
| 628 | static int sde_plane_prepare_fb(struct drm_plane *plane, |
| 629 | const struct drm_plane_state *new_state) |
| 630 | { |
| 631 | struct drm_framebuffer *fb = new_state->fb; |
| 632 | struct sde_plane *psde = to_sde_plane(plane); |
| 633 | |
| 634 | if (!new_state->fb) |
| 635 | return 0; |
| 636 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 637 | DBG("%s: prepare: FB[%u]", psde->pipe_name, fb->base.id); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 638 | return msm_framebuffer_prepare(fb, psde->mmu_id); |
| 639 | } |
| 640 | |
| 641 | static void sde_plane_cleanup_fb(struct drm_plane *plane, |
| 642 | const struct drm_plane_state *old_state) |
| 643 | { |
| 644 | struct drm_framebuffer *fb = old_state->fb; |
| 645 | struct sde_plane *psde = to_sde_plane(plane); |
| 646 | |
| 647 | if (!fb) |
| 648 | return; |
| 649 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 650 | DBG("%s: cleanup: FB[%u]", psde->pipe_name, fb->base.id); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 651 | msm_framebuffer_cleanup(fb, psde->mmu_id); |
| 652 | } |
| 653 | |
| 654 | static int sde_plane_atomic_check(struct drm_plane *plane, |
| 655 | struct drm_plane_state *state) |
| 656 | { |
| 657 | struct sde_plane *psde = to_sde_plane(plane); |
| 658 | struct drm_plane_state *old_state = plane->state; |
| 659 | const struct mdp_format *format; |
| 660 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 661 | DBG("%s: check (%d -> %d)", psde->pipe_name, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 662 | sde_plane_enabled(old_state), sde_plane_enabled(state)); |
| 663 | |
| 664 | if (sde_plane_enabled(state)) { |
| 665 | /* CIFIX: don't use mdp format? */ |
| 666 | format = to_mdp_format(msm_framebuffer_format(state->fb)); |
| 667 | if (MDP_FORMAT_IS_YUV(format) && |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 668 | (!(psde->features & SDE_SSPP_SCALER) || |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 669 | !(psde->features & BIT(SDE_SSPP_CSC)))) { |
Lloyd Atkinson | d49de56 | 2016-05-30 13:23:48 -0400 | [diff] [blame] | 670 | DRM_ERROR("Pipe doesn't support YUV\n"); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 671 | |
| 672 | return -EINVAL; |
| 673 | } |
| 674 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 675 | if (!(psde->features & SDE_SSPP_SCALER) && |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 676 | (((state->src_w >> 16) != state->crtc_w) || |
| 677 | ((state->src_h >> 16) != state->crtc_h))) { |
Lloyd Atkinson | d49de56 | 2016-05-30 13:23:48 -0400 | [diff] [blame] | 678 | DRM_ERROR( |
| 679 | "Unsupported Pipe scaling (%dx%d -> %dx%d)\n", |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 680 | state->src_w >> 16, state->src_h >> 16, |
| 681 | state->crtc_w, state->crtc_h); |
| 682 | |
| 683 | return -EINVAL; |
| 684 | } |
| 685 | } |
| 686 | |
| 687 | if (sde_plane_enabled(state) && sde_plane_enabled(old_state)) { |
| 688 | /* we cannot change SMP block configuration during scanout: */ |
| 689 | bool full_modeset = false; |
| 690 | |
| 691 | if (state->fb->pixel_format != old_state->fb->pixel_format) { |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 692 | DBG("%s: pixel_format change!", psde->pipe_name); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 693 | full_modeset = true; |
| 694 | } |
| 695 | if (state->src_w != old_state->src_w) { |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 696 | DBG("%s: src_w change!", psde->pipe_name); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 697 | full_modeset = true; |
| 698 | } |
| 699 | if (to_sde_plane_state(old_state)->pending) { |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 700 | DBG("%s: still pending!", psde->pipe_name); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 701 | full_modeset = true; |
| 702 | } |
| 703 | if (full_modeset) { |
| 704 | struct drm_crtc_state *crtc_state = |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 705 | drm_atomic_get_crtc_state(state->state, |
| 706 | state->crtc); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 707 | crtc_state->mode_changed = true; |
| 708 | to_sde_plane_state(state)->mode_changed = true; |
| 709 | } |
| 710 | } else { |
| 711 | to_sde_plane_state(state)->mode_changed = true; |
| 712 | } |
| 713 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 714 | return 0; |
| 715 | } |
| 716 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 717 | static void sde_plane_atomic_update(struct drm_plane *plane, |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 718 | struct drm_plane_state *old_state) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 719 | { |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 720 | struct sde_plane *sde_plane; |
| 721 | struct drm_plane_state *state; |
| 722 | struct sde_plane_state *pstate; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 723 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 724 | DBG("%s: update", sde_plane->pipe_name); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 725 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 726 | if (!plane || !plane->state) { |
| 727 | DRM_ERROR("Invalid plane/state\n"); |
| 728 | return; |
| 729 | } |
| 730 | |
| 731 | sde_plane = to_sde_plane(plane); |
| 732 | state = plane->state; |
| 733 | pstate = to_sde_plane_state(state); |
| 734 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 735 | if (!sde_plane_enabled(state)) { |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 736 | pstate->pending = true; |
| 737 | } else if (pstate->mode_changed) { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 738 | int ret; |
| 739 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 740 | pstate->pending = true; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 741 | ret = _sde_plane_mode_set(plane, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 742 | state->crtc, state->fb, |
| 743 | state->crtc_x, state->crtc_y, |
| 744 | state->crtc_w, state->crtc_h, |
| 745 | state->src_x, state->src_y, |
| 746 | state->src_w, state->src_h); |
| 747 | /* atomic_check should have ensured that this doesn't fail */ |
| 748 | WARN_ON(ret < 0); |
| 749 | } else { |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 750 | _sde_plane_set_scanout(plane, pstate, |
| 751 | &sde_plane->pipe_cfg, state->fb); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 752 | } |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 753 | } |
| 754 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 755 | static void _sde_plane_install_range_property(struct drm_plane *plane, |
| 756 | struct drm_device *dev, const char *name, |
| 757 | uint64_t min, uint64_t max, uint64_t init, |
| 758 | struct drm_property **prop) |
| 759 | { |
| 760 | if (plane && dev && name && prop) { |
| 761 | /* only create the property once */ |
| 762 | if (*prop == 0) { |
| 763 | *prop = drm_property_create_range(dev, |
| 764 | 0 /* flags */, name, min, max); |
| 765 | if (*prop == 0) |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 766 | DRM_ERROR("Create %s property failed\n", name); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 767 | } |
| 768 | |
| 769 | /* always attach property, if created */ |
| 770 | if (*prop) |
| 771 | drm_object_attach_property(&plane->base, *prop, init); |
| 772 | } |
| 773 | } |
| 774 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 775 | static void _sde_plane_install_rotation_property(struct drm_plane *plane, |
| 776 | struct drm_device *dev, struct drm_property **prop) |
| 777 | { |
| 778 | if (plane && dev && prop) { |
| 779 | /* only create the property once */ |
| 780 | if (*prop == 0) { |
| 781 | *prop = drm_mode_create_rotation_property(dev, |
| 782 | BIT(DRM_REFLECT_X) | |
| 783 | BIT(DRM_REFLECT_Y)); |
| 784 | if (*prop == 0) |
| 785 | DRM_ERROR("Create rotation property failed\n"); |
| 786 | } |
| 787 | |
| 788 | /* always attach property, if created */ |
| 789 | if (*prop) |
| 790 | drm_object_attach_property(&plane->base, *prop, 0); |
| 791 | } |
| 792 | } |
| 793 | |
| 794 | static void _sde_plane_install_enum_property(struct drm_plane *plane, |
| 795 | struct drm_device *dev, const char *name, int is_bitmask, |
| 796 | const struct drm_prop_enum_list *values, int num_values, |
| 797 | struct drm_property **prop) |
| 798 | { |
| 799 | if (plane && dev && name && prop && values && num_values) { |
| 800 | /* only create the property once */ |
| 801 | if (*prop == 0) { |
| 802 | /* 'bitmask' is a special type of 'enum' */ |
| 803 | if (is_bitmask) |
| 804 | *prop = drm_property_create_bitmask(dev, |
| 805 | DRM_MODE_PROP_BITMASK, name, |
| 806 | values, num_values, -1); |
| 807 | else |
| 808 | *prop = drm_property_create_enum(dev, |
| 809 | DRM_MODE_PROP_ENUM, name, |
| 810 | values, num_values); |
| 811 | if (*prop == 0) |
| 812 | DRM_ERROR("Create %s property failed\n", name); |
| 813 | } |
| 814 | |
| 815 | /* always attach property, if created */ |
| 816 | if (*prop) |
| 817 | drm_object_attach_property(&plane->base, *prop, 0); |
| 818 | } |
| 819 | } |
| 820 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 821 | static void _sde_plane_install_blob_property(struct drm_plane *plane, |
| 822 | struct drm_device *dev, const char *name, |
| 823 | struct drm_property **prop) |
| 824 | { |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 825 | if (plane && dev && name && prop) { |
| 826 | /* only create the property once */ |
| 827 | if (*prop == 0) { |
| 828 | /* use 'create' for blob property place holder */ |
| 829 | *prop = drm_property_create(dev, |
| 830 | DRM_MODE_PROP_BLOB, name, 0); |
| 831 | if (*prop == 0) |
| 832 | DRM_ERROR("Create %s property failed\n", name); |
| 833 | } |
| 834 | |
| 835 | /* always attach property, if created */ |
| 836 | if (*prop) |
| 837 | drm_object_attach_property(&plane->base, *prop, 0); |
| 838 | } |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 839 | } |
| 840 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 841 | static int _sde_plane_get_property_index(struct drm_plane *plane, |
| 842 | struct drm_property *property) |
| 843 | { |
| 844 | struct drm_property **prop_array; |
| 845 | int idx = PLANE_PROP_COUNT; |
| 846 | |
| 847 | if (!plane) { |
| 848 | DRM_ERROR("Invalid plane\n"); |
| 849 | } else if (!plane->dev || !plane->dev->dev_private) { |
| 850 | /* don't access dev_private if !dev */ |
| 851 | DRM_ERROR("Invalid device\n"); |
| 852 | } else if (!property) { |
| 853 | DRM_ERROR("Incoming property is NULL\n"); |
| 854 | } else { |
| 855 | prop_array = ((struct msm_drm_private *) |
| 856 | (plane->dev->dev_private))->plane_property; |
| 857 | if (!prop_array) |
| 858 | /* should never hit this */ |
| 859 | DRM_ERROR("Invalid property array\n"); |
| 860 | |
| 861 | /* linear search is okay */ |
| 862 | for (idx = 0; idx < PLANE_PROP_COUNT; ++idx) { |
| 863 | if (prop_array[idx] == property) |
| 864 | break; |
| 865 | } |
| 866 | } |
| 867 | |
| 868 | return idx; |
| 869 | } |
| 870 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 871 | /* helper to install properties which are common to planes and crtcs */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 872 | static void _sde_plane_install_properties(struct drm_plane *plane, |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 873 | struct drm_mode_object *obj, |
| 874 | struct sde_mdss_cfg *catalog) |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 875 | { |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 876 | static const struct drm_prop_enum_list e_blend_op[] = { |
| 877 | {SDE_DRM_BLEND_OP_NOT_DEFINED, "not_defined"}, |
| 878 | {SDE_DRM_BLEND_OP_OPAQUE, "opaque"}, |
| 879 | {SDE_DRM_BLEND_OP_PREMULTIPLIED, "premultiplied"}, |
| 880 | {SDE_DRM_BLEND_OP_COVERAGE, "coverage"} |
| 881 | }; |
| 882 | static const struct drm_prop_enum_list e_src_config[] = { |
| 883 | {SDE_DRM_DEINTERLACE, "deinterlace"} |
| 884 | }; |
| 885 | struct sde_plane *psde = to_sde_plane(plane); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 886 | struct drm_device *dev = plane->dev; |
| 887 | struct msm_drm_private *dev_priv = dev->dev_private; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 888 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 889 | DBG(""); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 890 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 891 | if (!psde || !psde->pipe_sblk || !catalog) { |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 892 | DRM_ERROR("Failed to identify catalog definition\n"); |
| 893 | return; |
| 894 | } |
| 895 | |
| 896 | /* range properties */ |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 897 | _sde_plane_install_range_property(plane, dev, "zpos", 0, 255, 1, |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 898 | &(dev_priv->plane_property[PLANE_PROP_ZPOS])); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 899 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 900 | _sde_plane_install_range_property(plane, dev, "alpha", 0, 255, 255, |
| 901 | &(dev_priv->plane_property[PLANE_PROP_ALPHA])); |
| 902 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 903 | /* max range of first pipe will be used */ |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 904 | _sde_plane_install_range_property(plane, dev, "h_decimate", |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 905 | 0, psde->pipe_sblk->maxhdeciexp, 0, |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 906 | &(dev_priv->plane_property[PLANE_PROP_H_DECIMATE])); |
| 907 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 908 | /* max range of first pipe will be used */ |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 909 | _sde_plane_install_range_property(plane, dev, "v_decimate", |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 910 | 0, psde->pipe_sblk->maxvdeciexp, 0, |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 911 | &(dev_priv->plane_property[PLANE_PROP_V_DECIMATE])); |
| 912 | |
| 913 | _sde_plane_install_range_property(plane, dev, "sync_fence", 0, ~0, 0, |
| 914 | &(dev_priv->plane_property[PLANE_PROP_SYNC_FENCE])); |
| 915 | |
| 916 | /* standard properties */ |
| 917 | _sde_plane_install_rotation_property(plane, dev, |
| 918 | &(dev_priv->plane_property[PLANE_PROP_ROTATION])); |
| 919 | |
| 920 | /* enum/bitmask properties */ |
| 921 | _sde_plane_install_enum_property(plane, dev, "blend_op", 0, |
| 922 | e_blend_op, ARRAY_SIZE(e_blend_op), |
| 923 | &(dev_priv->plane_property[PLANE_PROP_BLEND_OP])); |
| 924 | _sde_plane_install_enum_property(plane, dev, "src_config", 1, |
| 925 | e_src_config, ARRAY_SIZE(e_src_config), |
| 926 | &(dev_priv->plane_property[PLANE_PROP_SRC_CONFIG])); |
| 927 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 928 | /* blob properties */ |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 929 | if (psde->features & SDE_SSPP_SCALER) |
| 930 | _sde_plane_install_blob_property(plane, dev, "scaler", |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 931 | &(dev_priv->plane_property[PLANE_PROP_SCALER])); |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 932 | if (psde->features & BIT(SDE_SSPP_CSC)) |
| 933 | _sde_plane_install_blob_property(plane, dev, "csc", |
| 934 | &(dev_priv->plane_property[PLANE_PROP_CSC])); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 935 | } |
| 936 | |
| 937 | static int sde_plane_atomic_set_property(struct drm_plane *plane, |
| 938 | struct drm_plane_state *state, struct drm_property *property, |
| 939 | uint64_t val) |
| 940 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 941 | struct sde_plane_state *pstate; |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 942 | struct drm_property_blob *blob, **pr_blob; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 943 | int idx, ret = -EINVAL; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 944 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 945 | DBG(""); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 946 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 947 | idx = _sde_plane_get_property_index(plane, property); |
| 948 | if (!state) { |
| 949 | DRM_ERROR("Invalid state\n"); |
| 950 | } else if (idx < PLANE_PROP_COUNT) { |
| 951 | DBG("Set property %d <= %d", idx, (int)val); |
| 952 | pstate = to_sde_plane_state(state); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 953 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 954 | /* extra handling for incoming blob properties */ |
| 955 | if ((property->flags & DRM_MODE_PROP_BLOB) && |
| 956 | (idx < PLANE_PROP_BLOBCOUNT)) { |
| 957 | /* DRM lookup also takes a reference */ |
| 958 | blob = drm_property_lookup_blob(plane->dev, |
| 959 | (uint32_t)val); |
| 960 | if (!blob) { |
| 961 | DRM_ERROR("Blob not found\n"); |
| 962 | val = 0; |
| 963 | } else { |
| 964 | DBG("Blob %u saved", blob->base.id); |
| 965 | val = blob->base.id; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 966 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 967 | /* save blobs for later */ |
| 968 | pr_blob = &pstate->property_blobs[idx]; |
| 969 | /* need to clear previous reference */ |
| 970 | if (*pr_blob) |
| 971 | drm_property_unreference_blob(*pr_blob); |
| 972 | *pr_blob = blob; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 973 | } |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 974 | } |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 975 | pstate->property_values[idx] = val; |
| 976 | ret = 0; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 977 | } |
| 978 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 979 | return ret; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 980 | } |
| 981 | |
| 982 | static int sde_plane_set_property(struct drm_plane *plane, |
| 983 | struct drm_property *property, uint64_t val) |
| 984 | { |
| 985 | int rc; |
| 986 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 987 | DBG(""); |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 988 | |
| 989 | if (!plane) |
| 990 | return -EINVAL; |
| 991 | |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 992 | rc = sde_plane_atomic_set_property(plane, plane->state, property, val); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 993 | return rc; |
| 994 | } |
| 995 | |
| 996 | static int sde_plane_atomic_get_property(struct drm_plane *plane, |
| 997 | const struct drm_plane_state *state, |
| 998 | struct drm_property *property, uint64_t *val) |
| 999 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1000 | struct sde_plane_state *pstate; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1001 | int idx, ret = -EINVAL; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1002 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1003 | DBG(""); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1004 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1005 | idx = _sde_plane_get_property_index(plane, property); |
| 1006 | if (!state) { |
| 1007 | DRM_ERROR("Invalid state\n"); |
| 1008 | } else if (!val) { |
| 1009 | DRM_ERROR("Value pointer is NULL\n"); |
| 1010 | } else if (idx < PLANE_PROP_COUNT) { |
| 1011 | pstate = to_sde_plane_state(state); |
| 1012 | |
| 1013 | *val = pstate->property_values[idx]; |
| 1014 | DBG("Get property %d %lld", idx, *val); |
| 1015 | ret = 0; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1016 | } |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1017 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1018 | return ret; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1019 | } |
| 1020 | |
| 1021 | static void sde_plane_destroy(struct drm_plane *plane) |
| 1022 | { |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1023 | struct sde_plane *psde; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1024 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1025 | DBG(""); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1026 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1027 | if (plane) { |
| 1028 | psde = to_sde_plane(plane); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1029 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1030 | debugfs_remove_recursive(psde->debugfs_root); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1031 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1032 | drm_plane_helper_disable(plane); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1033 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1034 | /* this will destroy the states as well */ |
| 1035 | drm_plane_cleanup(plane); |
| 1036 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1037 | if (psde->pipe_hw) |
| 1038 | sde_hw_sspp_destroy(psde->pipe_hw); |
| 1039 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1040 | kfree(psde); |
| 1041 | } |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1042 | } |
| 1043 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1044 | static void sde_plane_destroy_state(struct drm_plane *plane, |
| 1045 | struct drm_plane_state *state) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1046 | { |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1047 | struct sde_plane_state *pstate; |
| 1048 | int i; |
| 1049 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1050 | DBG(""); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1051 | |
| 1052 | /* remove ref count for frame buffers */ |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1053 | if (state->fb) |
| 1054 | drm_framebuffer_unreference(state->fb); |
| 1055 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1056 | pstate = to_sde_plane_state(state); |
| 1057 | |
| 1058 | /* remove ref count for blobs */ |
| 1059 | for (i = 0; i < PLANE_PROP_BLOBCOUNT; ++i) |
| 1060 | if (pstate->property_blobs[i]) |
| 1061 | drm_property_unreference_blob( |
| 1062 | pstate->property_blobs[i]); |
| 1063 | |
| 1064 | kfree(pstate); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1065 | } |
| 1066 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1067 | static struct drm_plane_state * |
| 1068 | sde_plane_duplicate_state(struct drm_plane *plane) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1069 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1070 | struct sde_plane_state *pstate; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1071 | int i; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1072 | |
| 1073 | if (WARN_ON(!plane->state)) |
| 1074 | return NULL; |
| 1075 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1076 | DBG(""); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1077 | pstate = kmemdup(to_sde_plane_state(plane->state), |
| 1078 | sizeof(*pstate), GFP_KERNEL); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1079 | if (pstate) { |
| 1080 | /* add ref count for frame buffer */ |
| 1081 | if (pstate->base.fb) |
| 1082 | drm_framebuffer_reference(pstate->base.fb); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1083 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1084 | /* add ref count for blobs */ |
| 1085 | for (i = 0; i < PLANE_PROP_BLOBCOUNT; ++i) |
| 1086 | if (pstate->property_blobs[i]) |
| 1087 | drm_property_reference_blob( |
| 1088 | pstate->property_blobs[i]); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1089 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1090 | pstate->mode_changed = false; |
| 1091 | pstate->pending = false; |
| 1092 | } |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1093 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1094 | return pstate ? &pstate->base : NULL; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1095 | } |
| 1096 | |
| 1097 | static void sde_plane_reset(struct drm_plane *plane) |
| 1098 | { |
| 1099 | struct sde_plane_state *pstate; |
| 1100 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1101 | DBG(""); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1102 | if (plane->state && plane->state->fb) |
| 1103 | drm_framebuffer_unreference(plane->state->fb); |
| 1104 | |
| 1105 | kfree(to_sde_plane_state(plane->state)); |
| 1106 | pstate = kzalloc(sizeof(*pstate), GFP_KERNEL); |
| 1107 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1108 | /* assign default blend parameters */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1109 | pstate->property_values[PLANE_PROP_ALPHA] = 255; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1110 | |
| 1111 | if (plane->type == DRM_PLANE_TYPE_PRIMARY) |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1112 | pstate->property_values[PLANE_PROP_ZPOS] = STAGE_BASE; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1113 | else |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1114 | pstate->property_values[PLANE_PROP_ZPOS] = |
| 1115 | STAGE0 + drm_plane_index(plane); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1116 | |
| 1117 | pstate->base.plane = plane; |
| 1118 | |
| 1119 | plane->state = &pstate->base; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1120 | } |
| 1121 | |
| 1122 | static const struct drm_plane_funcs sde_plane_funcs = { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1123 | .update_plane = drm_atomic_helper_update_plane, |
| 1124 | .disable_plane = drm_atomic_helper_disable_plane, |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1125 | .destroy = sde_plane_destroy, |
| 1126 | .set_property = sde_plane_set_property, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1127 | .atomic_set_property = sde_plane_atomic_set_property, |
| 1128 | .atomic_get_property = sde_plane_atomic_get_property, |
| 1129 | .reset = sde_plane_reset, |
| 1130 | .atomic_duplicate_state = sde_plane_duplicate_state, |
| 1131 | .atomic_destroy_state = sde_plane_destroy_state, |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1132 | }; |
| 1133 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1134 | static const struct drm_plane_helper_funcs sde_plane_helper_funcs = { |
| 1135 | .prepare_fb = sde_plane_prepare_fb, |
| 1136 | .cleanup_fb = sde_plane_cleanup_fb, |
| 1137 | .atomic_check = sde_plane_atomic_check, |
| 1138 | .atomic_update = sde_plane_atomic_update, |
| 1139 | }; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1140 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1141 | enum sde_sspp sde_plane_pipe(struct drm_plane *plane) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1142 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1143 | struct sde_plane *sde_plane = to_sde_plane(plane); |
| 1144 | |
| 1145 | return sde_plane->pipe; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1146 | } |
| 1147 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1148 | static void _sde_plane_init_debugfs(struct sde_plane *psde, struct sde_kms *kms) |
| 1149 | { |
| 1150 | const struct sde_sspp_sub_blks *sblk = 0; |
| 1151 | const struct sde_sspp_cfg *cfg = 0; |
| 1152 | |
| 1153 | if (psde && psde->pipe_hw) |
| 1154 | cfg = psde->pipe_hw->cap; |
| 1155 | if (cfg) |
| 1156 | sblk = cfg->sblk; |
| 1157 | |
| 1158 | if (kms && sblk) { |
| 1159 | /* create overall sub-directory for the pipe */ |
| 1160 | psde->debugfs_root = |
| 1161 | debugfs_create_dir(psde->pipe_name, |
| 1162 | sde_debugfs_get_root(kms)); |
| 1163 | if (psde->debugfs_root) { |
| 1164 | /* don't error check these */ |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1165 | debugfs_create_x32("features", 0644, |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1166 | psde->debugfs_root, &psde->features); |
| 1167 | |
| 1168 | /* add register dump support */ |
| 1169 | sde_debugfs_setup_regset32(&psde->debugfs_src, |
| 1170 | sblk->src_blk.base + cfg->base, |
| 1171 | sblk->src_blk.len, |
| 1172 | kms->mmio); |
| 1173 | sde_debugfs_create_regset32("src_blk", 0444, |
| 1174 | psde->debugfs_root, &psde->debugfs_src); |
| 1175 | |
| 1176 | sde_debugfs_setup_regset32(&psde->debugfs_scaler, |
| 1177 | sblk->scaler_blk.base + cfg->base, |
| 1178 | sblk->scaler_blk.len, |
| 1179 | kms->mmio); |
| 1180 | sde_debugfs_create_regset32("scaler_blk", 0444, |
| 1181 | psde->debugfs_root, |
| 1182 | &psde->debugfs_scaler); |
| 1183 | |
| 1184 | sde_debugfs_setup_regset32(&psde->debugfs_csc, |
| 1185 | sblk->csc_blk.base + cfg->base, |
| 1186 | sblk->csc_blk.len, |
| 1187 | kms->mmio); |
| 1188 | sde_debugfs_create_regset32("csc_blk", 0444, |
| 1189 | psde->debugfs_root, &psde->debugfs_csc); |
| 1190 | } |
| 1191 | } |
| 1192 | } |
| 1193 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1194 | /* initialize plane */ |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1195 | struct drm_plane *sde_plane_init(struct drm_device *dev, |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1196 | uint32_t pipe, bool primary_plane) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1197 | { |
| 1198 | struct drm_plane *plane = NULL; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1199 | struct sde_plane *psde; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1200 | struct msm_drm_private *priv; |
| 1201 | struct sde_kms *kms; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1202 | enum drm_plane_type type; |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1203 | int ret = -EINVAL; |
| 1204 | |
| 1205 | if (!dev) { |
| 1206 | DRM_ERROR("[%u]Device is NULL\n", pipe); |
| 1207 | goto exit; |
| 1208 | } |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1209 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1210 | priv = dev->dev_private; |
Ben Chan | 78647cd | 2016-06-26 22:02:47 -0400 | [diff] [blame] | 1211 | if (!priv) { |
| 1212 | DRM_ERROR("[%u]Private data is NULL\n", pipe); |
| 1213 | goto exit; |
| 1214 | } |
| 1215 | |
| 1216 | if (!priv->kms) { |
| 1217 | DRM_ERROR("[%u]Invalid KMS reference\n", pipe); |
| 1218 | goto exit; |
| 1219 | } |
| 1220 | kms = to_sde_kms(priv->kms); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1221 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1222 | if (!kms->catalog) { |
| 1223 | DRM_ERROR("[%u]Invalid catalog reference\n", pipe); |
| 1224 | goto exit; |
| 1225 | } |
| 1226 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1227 | /* create and zero local structure */ |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1228 | psde = kzalloc(sizeof(*psde), GFP_KERNEL); |
| 1229 | if (!psde) { |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1230 | DRM_ERROR("[%u]Failed to allocate local plane struct\n", pipe); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1231 | ret = -ENOMEM; |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1232 | goto exit; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1233 | } |
| 1234 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1235 | /* cache local stuff for later */ |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1236 | plane = &psde->base; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1237 | psde->pipe = pipe; |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1238 | psde->mmu_id = kms->mmu_id; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1239 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1240 | /* initialize underlying h/w driver */ |
| 1241 | psde->pipe_hw = sde_hw_sspp_init(pipe, kms->mmio, kms->catalog); |
| 1242 | if (IS_ERR(psde->pipe_hw)) { |
| 1243 | DRM_ERROR("[%u]SSPP init failed\n", pipe); |
| 1244 | ret = PTR_ERR(psde->pipe_hw); |
| 1245 | goto clean_plane; |
| 1246 | } else if (!psde->pipe_hw->cap || !psde->pipe_hw->cap->sblk) { |
| 1247 | DRM_ERROR("[%u]SSPP init returned invalid cfg\n", pipe); |
| 1248 | goto clean_sspp; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1249 | } |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1250 | |
| 1251 | /* cache features mask for later */ |
| 1252 | psde->features = psde->pipe_hw->cap->features; |
| 1253 | psde->pipe_sblk = psde->pipe_hw->cap->sblk; |
| 1254 | |
| 1255 | /* add plane to DRM framework */ |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1256 | psde->nformats = mdp_get_formats(psde->formats, |
| 1257 | ARRAY_SIZE(psde->formats), |
| 1258 | !(psde->features & BIT(SDE_SSPP_CSC)) || |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 1259 | !(psde->features & SDE_SSPP_SCALER)); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1260 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1261 | if (!psde->nformats) { |
| 1262 | DRM_ERROR("[%u]No valid formats for plane\n", pipe); |
| 1263 | goto clean_sspp; |
| 1264 | } |
| 1265 | |
| 1266 | if (psde->features & BIT(SDE_SSPP_CURSOR)) |
| 1267 | type = DRM_PLANE_TYPE_CURSOR; |
| 1268 | else if (primary_plane) |
| 1269 | type = DRM_PLANE_TYPE_PRIMARY; |
| 1270 | else |
| 1271 | type = DRM_PLANE_TYPE_OVERLAY; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1272 | ret = drm_universal_plane_init(dev, plane, 0xff, &sde_plane_funcs, |
| 1273 | psde->formats, psde->nformats, |
| 1274 | type); |
| 1275 | if (ret) |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1276 | goto clean_sspp; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1277 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1278 | /* success! finalize initialization */ |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 1279 | drm_plane_helper_add(plane, &sde_plane_helper_funcs); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1280 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1281 | _sde_plane_install_properties(plane, &plane->base, kms->catalog); |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 1282 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1283 | /* save user friendly pipe name for later */ |
Clarence Ip | 5e2a922 | 2016-06-26 22:38:24 -0400 | [diff] [blame] | 1284 | snprintf(psde->pipe_name, SDE_NAME_SIZE, "plane%u", plane->base.id); |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 1285 | |
| 1286 | _sde_plane_init_debugfs(psde, kms); |
| 1287 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1288 | DRM_INFO("[%u]Successfully created %s\n", pipe, psde->pipe_name); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1289 | return plane; |
| 1290 | |
Clarence Ip | 4c1d977 | 2016-06-26 09:35:38 -0400 | [diff] [blame] | 1291 | clean_sspp: |
| 1292 | if (psde && psde->pipe_hw) |
| 1293 | sde_hw_sspp_destroy(psde->pipe_hw); |
| 1294 | clean_plane: |
| 1295 | kfree(psde); |
Ben Chan | 78647cd | 2016-06-26 22:02:47 -0400 | [diff] [blame] | 1296 | exit: |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1297 | return ERR_PTR(ret); |
| 1298 | } |