blob: 25b79a29736519884306a5c98c742650b35b15c0 [file] [log] [blame]
Ilya Yanoka8195ba2012-03-05 11:08:36 -08001/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on mach-omap2/board-am3517evm.c
5 * Copyright (C) 2009 Texas Instruments Incorporated
6 * Author: Ranjith Lohithakshan <ranjithl@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13 * whether express or implied; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
Mark A. Greer31ba8802012-06-27 14:59:57 -060018#include <linux/err.h>
Ilya Yanoka8195ba2012-03-05 11:08:36 -080019#include <linux/davinci_emac.h>
Mark A. Greer31ba8802012-06-27 14:59:57 -060020#include <asm/system.h>
Tony Lindgren25c7d492012-10-02 17:25:48 -070021#include "omap_device.h"
Tony Lindgren4f9ed542012-09-20 11:40:52 -070022#include "am35xx.h"
Ilya Yanoka8195ba2012-03-05 11:08:36 -080023#include "control.h"
Mark A. Greer31ba8802012-06-27 14:59:57 -060024#include "am35xx-emac.h"
Ilya Yanoka8195ba2012-03-05 11:08:36 -080025
26static void am35xx_enable_emac_int(void)
27{
Paul Walmsleyeeb37112012-04-13 06:34:32 -060028 u32 v;
Ilya Yanoka8195ba2012-03-05 11:08:36 -080029
Paul Walmsleyeeb37112012-04-13 06:34:32 -060030 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
31 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR |
32 AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR);
33 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
34 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
Ilya Yanoka8195ba2012-03-05 11:08:36 -080035}
36
37static void am35xx_disable_emac_int(void)
38{
Paul Walmsleyeeb37112012-04-13 06:34:32 -060039 u32 v;
Ilya Yanoka8195ba2012-03-05 11:08:36 -080040
Paul Walmsleyeeb37112012-04-13 06:34:32 -060041 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
42 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR);
43 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
44 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
Ilya Yanoka8195ba2012-03-05 11:08:36 -080045}
46
47static struct emac_platform_data am35xx_emac_pdata = {
48 .ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET,
49 .ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET,
50 .ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET,
51 .ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE,
52 .hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR,
53 .version = EMAC_VERSION_2,
54 .interrupt_enable = am35xx_enable_emac_int,
55 .interrupt_disable = am35xx_disable_emac_int,
56};
57
Mark A. Greer31ba8802012-06-27 14:59:57 -060058static struct mdio_platform_data am35xx_mdio_pdata;
Ilya Yanoka8195ba2012-03-05 11:08:36 -080059
Mark A. Greer31ba8802012-06-27 14:59:57 -060060static int __init omap_davinci_emac_dev_init(struct omap_hwmod *oh,
61 void *pdata, int pdata_len)
62{
63 struct platform_device *pdev;
64
Paul Walmsley6efc3fe2013-02-12 03:58:35 +000065 pdev = omap_device_build(oh->class->name, 0, oh, pdata, pdata_len);
Mark A. Greer31ba8802012-06-27 14:59:57 -060066 if (IS_ERR(pdev)) {
67 WARN(1, "Can't build omap_device for %s:%s.\n",
68 oh->class->name, oh->name);
69 return PTR_ERR(pdev);
70 }
71
72 return 0;
73}
Ilya Yanoka8195ba2012-03-05 11:08:36 -080074
75void __init am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en)
76{
Mark A. Greer31ba8802012-06-27 14:59:57 -060077 struct omap_hwmod *oh;
Paul Walmsleyeeb37112012-04-13 06:34:32 -060078 u32 v;
Mark A. Greer31ba8802012-06-27 14:59:57 -060079 int ret;
Ilya Yanoka8195ba2012-03-05 11:08:36 -080080
Mark A. Greer31ba8802012-06-27 14:59:57 -060081 oh = omap_hwmod_lookup("davinci_mdio");
82 if (!oh) {
83 pr_err("Could not find davinci_mdio hwmod\n");
Ilya Yanoka8195ba2012-03-05 11:08:36 -080084 return;
85 }
86
Mark A. Greer31ba8802012-06-27 14:59:57 -060087 am35xx_mdio_pdata.bus_freq = mdio_bus_freq;
88
89 ret = omap_davinci_emac_dev_init(oh, &am35xx_mdio_pdata,
90 sizeof(am35xx_mdio_pdata));
91 if (ret) {
92 pr_err("Could not build davinci_mdio hwmod device\n");
93 return;
94 }
95
96 oh = omap_hwmod_lookup("davinci_emac");
97 if (!oh) {
98 pr_err("Could not find davinci_emac hwmod\n");
99 return;
100 }
101
102 am35xx_emac_pdata.rmii_en = rmii_en;
103
104 ret = omap_davinci_emac_dev_init(oh, &am35xx_emac_pdata,
105 sizeof(am35xx_emac_pdata));
106 if (ret) {
107 pr_err("Could not build davinci_emac hwmod device\n");
Ilya Yanoka8195ba2012-03-05 11:08:36 -0800108 return;
109 }
110
Paul Walmsleyeeb37112012-04-13 06:34:32 -0600111 v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
112 v &= ~AM35XX_CPGMACSS_SW_RST;
113 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
114 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
Ilya Yanoka8195ba2012-03-05 11:08:36 -0800115}