Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 1 | menu "Platform selection" |
| 2 | |
Ray Jui | 36b7c58 | 2015-07-27 15:42:20 -0700 | [diff] [blame] | 3 | config ARCH_BCM_IPROC |
| 4 | bool "Broadcom iProc SoC Family" |
Anup Patel | 382618b | 2016-02-10 11:40:46 +0530 | [diff] [blame^] | 5 | select COMMON_CLK_IPROC |
| 6 | select PINCTRL |
| 7 | select ARCH_REQUIRE_GPIOLIB |
Ray Jui | 36b7c58 | 2015-07-27 15:42:20 -0700 | [diff] [blame] | 8 | help |
| 9 | This enables support for Broadcom iProc based SoCs |
| 10 | |
Jisheng Zhang | dd40fd9 | 2015-08-03 21:24:45 +0200 | [diff] [blame] | 11 | config ARCH_BERLIN |
| 12 | bool "Marvell Berlin SoC Family" |
Jisheng Zhang | c582fbf | 2015-09-18 21:47:37 +0800 | [diff] [blame] | 13 | select ARCH_REQUIRE_GPIOLIB |
Jisheng Zhang | dd40fd9 | 2015-08-03 21:24:45 +0200 | [diff] [blame] | 14 | select DW_APB_ICTL |
Jisheng Zhang | 75d8e1b | 2015-10-16 15:37:09 +0800 | [diff] [blame] | 15 | select PINCTRL |
Jisheng Zhang | dd40fd9 | 2015-08-03 21:24:45 +0200 | [diff] [blame] | 16 | help |
| 17 | This enables support for Marvell Berlin SoC Family |
| 18 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 19 | config ARCH_EXYNOS |
| 20 | bool |
| 21 | help |
| 22 | This enables support for Samsung Exynos SoC family |
| 23 | |
| 24 | config ARCH_EXYNOS7 |
| 25 | bool "ARMv8 based Samsung Exynos7" |
| 26 | select ARCH_EXYNOS |
| 27 | select COMMON_CLK_SAMSUNG |
| 28 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
| 29 | select HAVE_S3C_RTC if RTC_CLASS |
| 30 | select PINCTRL |
| 31 | select PINCTRL_EXYNOS |
| 32 | |
| 33 | help |
| 34 | This enables support for Samsung Exynos7 SoC family |
| 35 | |
Bhupesh Sharma | 53a5fde | 2015-10-24 01:01:50 +0530 | [diff] [blame] | 36 | config ARCH_LAYERSCAPE |
| 37 | bool "ARMv8 based Freescale Layerscape SoC family" |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 38 | help |
Bhupesh Sharma | 53a5fde | 2015-10-24 01:01:50 +0530 | [diff] [blame] | 39 | This enables support for the Freescale Layerscape SoC family. |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 40 | |
| 41 | config ARCH_HISI |
| 42 | bool "Hisilicon SoC Family" |
| 43 | help |
| 44 | This enables support for Hisilicon ARMv8 SoC family |
| 45 | |
| 46 | config ARCH_MEDIATEK |
| 47 | bool "Mediatek MT65xx & MT81xx ARMv8 SoC" |
| 48 | select ARM_GIC |
| 49 | select PINCTRL |
Yingjoe Chen | c050b45 | 2015-10-02 23:05:18 +0800 | [diff] [blame] | 50 | select MTK_TIMER |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 51 | help |
| 52 | Support for Mediatek MT65xx & MT81xx ARMv8 SoCs |
| 53 | |
| 54 | config ARCH_QCOM |
| 55 | bool "Qualcomm Platforms" |
| 56 | select PINCTRL |
| 57 | help |
| 58 | This enables support for the ARMv8 based Qualcomm chipsets. |
| 59 | |
Heiko Stübner | fbac1c8 | 2015-07-17 00:33:51 +0200 | [diff] [blame] | 60 | config ARCH_ROCKCHIP |
| 61 | bool "Rockchip Platforms" |
| 62 | select ARCH_HAS_RESET_CONTROLLER |
| 63 | select ARCH_REQUIRE_GPIOLIB |
| 64 | select PINCTRL |
| 65 | select PINCTRL_ROCKCHIP |
| 66 | help |
| 67 | This enables support for the ARMv8 based Rockchip chipsets, |
| 68 | like the RK3368. |
| 69 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 70 | config ARCH_SEATTLE |
| 71 | bool "AMD Seattle SoC Family" |
| 72 | help |
| 73 | This enables support for AMD Seattle SOC Family |
| 74 | |
Simon Horman | 26a7e06 | 2015-11-17 02:42:32 +0900 | [diff] [blame] | 75 | config ARCH_SHMOBILE |
| 76 | bool |
| 77 | |
| 78 | config ARCH_RENESAS |
| 79 | bool "Renesas SoC Platforms" |
| 80 | select ARCH_SHMOBILE |
| 81 | select PINCTRL |
| 82 | select PM_GENERIC_DOMAINS if PM |
| 83 | help |
| 84 | This enables support for the ARMv8 based Renesas SoCs. |
| 85 | |
| 86 | config ARCH_R8A7795 |
| 87 | bool "Renesas R-Car H3 SoC Platform" |
| 88 | depends on ARCH_RENESAS |
| 89 | help |
| 90 | This enables support for the Renesas R-Car H3 SoC. |
| 91 | |
Dinh Nguyen | 78cd6a9 | 2015-08-04 23:25:50 -0500 | [diff] [blame] | 92 | config ARCH_STRATIX10 |
| 93 | bool "Altera's Stratix 10 SoCFPGA Family" |
| 94 | help |
| 95 | This enables support for Altera's Stratix 10 SoCFPGA Family. |
| 96 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 97 | config ARCH_TEGRA |
| 98 | bool "NVIDIA Tegra SoC Family" |
| 99 | select ARCH_HAS_RESET_CONTROLLER |
| 100 | select ARCH_REQUIRE_GPIOLIB |
| 101 | select CLKDEV_LOOKUP |
| 102 | select CLKSRC_MMIO |
| 103 | select CLKSRC_OF |
| 104 | select GENERIC_CLOCKEVENTS |
| 105 | select HAVE_CLK |
| 106 | select PINCTRL |
| 107 | select RESET_CONTROLLER |
| 108 | help |
| 109 | This enables support for the NVIDIA Tegra SoC family. |
| 110 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 111 | config ARCH_SPRD |
| 112 | bool "Spreadtrum SoC platform" |
| 113 | help |
| 114 | Support for Spreadtrum ARM based SoCs |
| 115 | |
| 116 | config ARCH_THUNDER |
| 117 | bool "Cavium Inc. Thunder SoC Family" |
| 118 | help |
| 119 | This enables support for Cavium's Thunder Family of SoCs. |
| 120 | |
Masahiro Yamada | 56aaafb | 2015-11-24 18:08:28 +0900 | [diff] [blame] | 121 | config ARCH_UNIPHIER |
| 122 | bool "Socionext UniPhier SoC Family" |
| 123 | select PINCTRL |
| 124 | help |
| 125 | This enables support for Socionext UniPhier SoC family. |
| 126 | |
Olof Johansson | eed6b3e | 2015-07-15 07:10:21 -0400 | [diff] [blame] | 127 | config ARCH_VEXPRESS |
| 128 | bool "ARMv8 software model (Versatile Express)" |
| 129 | select ARCH_REQUIRE_GPIOLIB |
| 130 | select COMMON_CLK_VERSATILE |
| 131 | select POWER_RESET_VEXPRESS |
| 132 | select VEXPRESS_CONFIG |
| 133 | help |
| 134 | This enables support for the ARMv8 software model (Versatile |
| 135 | Express). |
| 136 | |
| 137 | config ARCH_XGENE |
| 138 | bool "AppliedMicro X-Gene SOC Family" |
| 139 | help |
| 140 | This enables support for AppliedMicro X-Gene SOC Family |
| 141 | |
| 142 | config ARCH_ZYNQMP |
| 143 | bool "Xilinx ZynqMP Family" |
| 144 | help |
| 145 | This enables support for Xilinx ZynqMP Family |
| 146 | |
| 147 | endmenu |