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Ben Skeggs9274f4a2012-07-06 07:36:43 +10001/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <subdev/device.h>
Ben Skeggs70c0f262012-07-10 10:49:22 +100026#include <subdev/bios.h>
Ben Skeggse0996ae2012-07-10 12:20:17 +100027#include <subdev/gpio.h>
Ben Skeggs4196faa2012-07-10 14:36:38 +100028#include <subdev/i2c.h>
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100029#include <subdev/clock.h>
Ben Skeggscb75d972012-07-11 10:44:20 +100030#include <subdev/devinit.h>
Ben Skeggs7d9115d2012-07-11 15:58:56 +100031#include <subdev/mc.h>
Ben Skeggs5a5c7432012-07-11 16:08:25 +100032#include <subdev/timer.h>
Ben Skeggs861d2102012-07-11 19:05:01 +100033#include <subdev/fb.h>
Ben Skeggs3863c9b2012-07-14 19:09:17 +100034#include <subdev/instmem.h>
35#include <subdev/vm.h>
Ben Skeggs9274f4a2012-07-06 07:36:43 +100036
37int
38nv20_identify(struct nouveau_device *device)
39{
40 switch (device->chipset) {
41 case 0x20:
Ben Skeggs70c0f262012-07-10 10:49:22 +100042 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Ben Skeggse0996ae2012-07-10 12:20:17 +100043 device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass;
Ben Skeggs4196faa2012-07-10 14:36:38 +100044 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100045 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass;
Ben Skeggscb75d972012-07-11 10:44:20 +100046 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
Ben Skeggs7d9115d2012-07-11 15:58:56 +100047 device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
Ben Skeggs5a5c7432012-07-11 16:08:25 +100048 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
Ben Skeggs861d2102012-07-11 19:05:01 +100049 device->oclass[NVDEV_SUBDEV_FB ] = &nv20_fb_oclass;
Ben Skeggs3863c9b2012-07-14 19:09:17 +100050 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
51 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100052 break;
53 case 0x25:
Ben Skeggs70c0f262012-07-10 10:49:22 +100054 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Ben Skeggse0996ae2012-07-10 12:20:17 +100055 device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass;
Ben Skeggs4196faa2012-07-10 14:36:38 +100056 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100057 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass;
Ben Skeggscb75d972012-07-11 10:44:20 +100058 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
Ben Skeggs7d9115d2012-07-11 15:58:56 +100059 device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
Ben Skeggs5a5c7432012-07-11 16:08:25 +100060 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
Ben Skeggs861d2102012-07-11 19:05:01 +100061 device->oclass[NVDEV_SUBDEV_FB ] = &nv20_fb_oclass;
Ben Skeggs3863c9b2012-07-14 19:09:17 +100062 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
63 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100064 break;
65 case 0x28:
Ben Skeggs70c0f262012-07-10 10:49:22 +100066 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Ben Skeggse0996ae2012-07-10 12:20:17 +100067 device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass;
Ben Skeggs4196faa2012-07-10 14:36:38 +100068 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100069 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass;
Ben Skeggscb75d972012-07-11 10:44:20 +100070 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
Ben Skeggs7d9115d2012-07-11 15:58:56 +100071 device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
Ben Skeggs5a5c7432012-07-11 16:08:25 +100072 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
Ben Skeggs861d2102012-07-11 19:05:01 +100073 device->oclass[NVDEV_SUBDEV_FB ] = &nv20_fb_oclass;
Ben Skeggs3863c9b2012-07-14 19:09:17 +100074 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
75 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100076 break;
77 case 0x2a:
Ben Skeggs70c0f262012-07-10 10:49:22 +100078 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
Ben Skeggse0996ae2012-07-10 12:20:17 +100079 device->oclass[NVDEV_SUBDEV_GPIO ] = &nv10_gpio_oclass;
Ben Skeggs4196faa2012-07-10 14:36:38 +100080 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100081 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv04_clock_oclass;
Ben Skeggscb75d972012-07-11 10:44:20 +100082 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
Ben Skeggs7d9115d2012-07-11 15:58:56 +100083 device->oclass[NVDEV_SUBDEV_MC ] = &nv04_mc_oclass;
Ben Skeggs5a5c7432012-07-11 16:08:25 +100084 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
Ben Skeggs861d2102012-07-11 19:05:01 +100085 device->oclass[NVDEV_SUBDEV_FB ] = &nv20_fb_oclass;
Ben Skeggs3863c9b2012-07-14 19:09:17 +100086 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
87 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100088 break;
89 default:
90 nv_fatal(device, "unknown Kelvin chipset\n");
91 return -EINVAL;
92 }
93
94 return 0;
95}