| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /****************************************************************************/ |
| 2 | /* |
| 3 | * linux/include/asm-arm/arch-l7200/gpio.h |
| 4 | * |
| 5 | * Registers and helper functions for the L7200 Link-Up Systems |
| 6 | * GPIO. |
| 7 | * |
| 8 | * (C) Copyright 2000, S A McConnell (samcconn@cotw.com) |
| 9 | * |
| 10 | * This file is subject to the terms and conditions of the GNU General Public |
| 11 | * License. See the file COPYING in the main directory of this archive for |
| 12 | * more details. |
| 13 | */ |
| 14 | |
| 15 | /****************************************************************************/ |
| 16 | |
| 17 | #define GPIO_OFF 0x00005000 /* Offset from IO_START to the GPIO reg's. */ |
| 18 | |
| 19 | /* IO_START and IO_BASE are defined in hardware.h */ |
| 20 | |
| 21 | #define GPIO_START (IO_START_2 + GPIO_OFF) /* Physical addr of the GPIO reg. */ |
| 22 | #define GPIO_BASE (IO_BASE_2 + GPIO_OFF) /* Virtual addr of the GPIO reg. */ |
| 23 | |
| 24 | /* Offsets from the start of the GPIO for all the registers. */ |
| 25 | #define PADR_OFF 0x000 |
| 26 | #define PADDR_OFF 0x004 |
| 27 | #define PASBSR_OFF 0x008 |
| 28 | #define PAEENR_OFF 0x00c |
| 29 | #define PAESNR_OFF 0x010 |
| 30 | #define PAESTR_OFF 0x014 |
| 31 | #define PAIMR_OFF 0x018 |
| 32 | #define PAINT_OFF 0x01c |
| 33 | |
| 34 | #define PBDR_OFF 0x020 |
| 35 | #define PBDDR_OFF 0x024 |
| 36 | #define PBSBSR_OFF 0x028 |
| 37 | #define PBIMR_OFF 0x038 |
| 38 | #define PBINT_OFF 0x03c |
| 39 | |
| 40 | #define PCDR_OFF 0x040 |
| 41 | #define PCDDR_OFF 0x044 |
| 42 | #define PCSBSR_OFF 0x048 |
| 43 | #define PCIMR_OFF 0x058 |
| 44 | #define PCINT_OFF 0x05c |
| 45 | |
| 46 | #define PDDR_OFF 0x060 |
| 47 | #define PDDDR_OFF 0x064 |
| 48 | #define PDSBSR_OFF 0x068 |
| 49 | #define PDEENR_OFF 0x06c |
| 50 | #define PDESNR_OFF 0x070 |
| 51 | #define PDESTR_OFF 0x074 |
| 52 | #define PDIMR_OFF 0x078 |
| 53 | #define PDINT_OFF 0x07c |
| 54 | |
| 55 | #define PEDR_OFF 0x080 |
| 56 | #define PEDDR_OFF 0x084 |
| 57 | #define PESBSR_OFF 0x088 |
| 58 | #define PEEENR_OFF 0x08c |
| 59 | #define PEESNR_OFF 0x090 |
| 60 | #define PEESTR_OFF 0x094 |
| 61 | #define PEIMR_OFF 0x098 |
| 62 | #define PEINT_OFF 0x09c |
| 63 | |
| 64 | /* Define the GPIO registers for use by device drivers and the kernel. */ |
| 65 | #define PADR (*(volatile unsigned long *)(GPIO_BASE+PADR_OFF)) |
| 66 | #define PADDR (*(volatile unsigned long *)(GPIO_BASE+PADDR_OFF)) |
| 67 | #define PASBSR (*(volatile unsigned long *)(GPIO_BASE+PASBSR_OFF)) |
| 68 | #define PAEENR (*(volatile unsigned long *)(GPIO_BASE+PAEENR_OFF)) |
| 69 | #define PAESNR (*(volatile unsigned long *)(GPIO_BASE+PAESNR_OFF)) |
| 70 | #define PAESTR (*(volatile unsigned long *)(GPIO_BASE+PAESTR_OFF)) |
| 71 | #define PAIMR (*(volatile unsigned long *)(GPIO_BASE+PAIMR_OFF)) |
| 72 | #define PAINT (*(volatile unsigned long *)(GPIO_BASE+PAINT_OFF)) |
| 73 | |
| 74 | #define PBDR (*(volatile unsigned long *)(GPIO_BASE+PBDR_OFF)) |
| 75 | #define PBDDR (*(volatile unsigned long *)(GPIO_BASE+PBDDR_OFF)) |
| 76 | #define PBSBSR (*(volatile unsigned long *)(GPIO_BASE+PBSBSR_OFF)) |
| 77 | #define PBIMR (*(volatile unsigned long *)(GPIO_BASE+PBIMR_OFF)) |
| 78 | #define PBINT (*(volatile unsigned long *)(GPIO_BASE+PBINT_OFF)) |
| 79 | |
| 80 | #define PCDR (*(volatile unsigned long *)(GPIO_BASE+PCDR_OFF)) |
| 81 | #define PCDDR (*(volatile unsigned long *)(GPIO_BASE+PCDDR_OFF)) |
| 82 | #define PCSBSR (*(volatile unsigned long *)(GPIO_BASE+PCSBSR_OFF)) |
| 83 | #define PCIMR (*(volatile unsigned long *)(GPIO_BASE+PCIMR_OFF)) |
| 84 | #define PCINT (*(volatile unsigned long *)(GPIO_BASE+PCINT_OFF)) |
| 85 | |
| 86 | #define PDDR (*(volatile unsigned long *)(GPIO_BASE+PDDR_OFF)) |
| 87 | #define PDDDR (*(volatile unsigned long *)(GPIO_BASE+PDDDR_OFF)) |
| 88 | #define PDSBSR (*(volatile unsigned long *)(GPIO_BASE+PDSBSR_OFF)) |
| 89 | #define PDEENR (*(volatile unsigned long *)(GPIO_BASE+PDEENR_OFF)) |
| 90 | #define PDESNR (*(volatile unsigned long *)(GPIO_BASE+PDESNR_OFF)) |
| 91 | #define PDESTR (*(volatile unsigned long *)(GPIO_BASE+PDESTR_OFF)) |
| 92 | #define PDIMR (*(volatile unsigned long *)(GPIO_BASE+PDIMR_OFF)) |
| 93 | #define PDINT (*(volatile unsigned long *)(GPIO_BASE+PDINT_OFF)) |
| 94 | |
| 95 | #define PEDR (*(volatile unsigned long *)(GPIO_BASE+PEDR_OFF)) |
| 96 | #define PEDDR (*(volatile unsigned long *)(GPIO_BASE+PEDDR_OFF)) |
| 97 | #define PESBSR (*(volatile unsigned long *)(GPIO_BASE+PESBSR_OFF)) |
| 98 | #define PEEENR (*(volatile unsigned long *)(GPIO_BASE+PEEENR_OFF)) |
| 99 | #define PEESNR (*(volatile unsigned long *)(GPIO_BASE+PEESNR_OFF)) |
| 100 | #define PEESTR (*(volatile unsigned long *)(GPIO_BASE+PEESTR_OFF)) |
| 101 | #define PEIMR (*(volatile unsigned long *)(GPIO_BASE+PEIMR_OFF)) |
| 102 | #define PEINT (*(volatile unsigned long *)(GPIO_BASE+PEINT_OFF)) |
| 103 | |
| 104 | #define VEE_EN 0x02 |
| 105 | #define BACKLIGHT_EN 0x04 |