blob: 24640c8458ab7f6e861c9c39b41c42c5726d7c00 [file] [log] [blame]
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +00001/*
2 * Renesas SH-mobile MIPI DSI support
3 *
4 * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/clk.h>
12#include <linux/delay.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +000016#include <linux/pm_runtime.h>
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +000017#include <linux/slab.h>
18#include <linux/string.h>
19#include <linux/types.h>
20
21#include <video/mipi_display.h>
22#include <video/sh_mipi_dsi.h>
23#include <video/sh_mobile_lcdc.h>
24
Magnus Damm71b146c2010-11-17 06:44:25 +000025#define SYSCTRL 0x0000
26#define SYSCONF 0x0004
27#define TIMSET 0x0008
28#define RESREQSET0 0x0018
29#define RESREQSET1 0x001c
30#define HSTTOVSET 0x0020
31#define LPRTOVSET 0x0024
32#define TATOVSET 0x0028
33#define PRTOVSET 0x002c
34#define DSICTRL 0x0030
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +000035#define DSIINTE 0x0060
Magnus Damm71b146c2010-11-17 06:44:25 +000036#define PHYCTRL 0x0070
37
Magnus Dammdeaba192010-11-17 09:53:25 +000038/* relative to linkbase */
39#define DTCTR 0x0000
40#define VMCTR1 0x0020
41#define VMCTR2 0x0024
42#define VMLEN1 0x0028
43#define CMTSRTREQ 0x0070
44#define CMTSRTCTR 0x00d0
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +000045
46/* E.g., sh7372 has 2 MIPI-DSIs - one for each LCDC */
47#define MAX_SH_MIPI_DSI 2
48
49struct sh_mipi {
50 void __iomem *base;
Magnus Dammdeaba192010-11-17 09:53:25 +000051 void __iomem *linkbase;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +000052 struct clk *dsit_clk;
53 struct clk *dsip_clk;
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +000054 struct device *dev;
55
56 void *next_board_data;
57 void (*next_display_on)(void *board_data, struct fb_info *info);
58 void (*next_display_off)(void *board_data);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +000059};
60
61static struct sh_mipi *mipi_dsi[MAX_SH_MIPI_DSI];
62
63/* Protect the above array */
64static DEFINE_MUTEX(array_lock);
65
66static struct sh_mipi *sh_mipi_by_handle(int handle)
67{
68 if (handle >= ARRAY_SIZE(mipi_dsi) || handle < 0)
69 return NULL;
70
71 return mipi_dsi[handle];
72}
73
74static int sh_mipi_send_short(struct sh_mipi *mipi, u8 dsi_cmd,
75 u8 cmd, u8 param)
76{
77 u32 data = (dsi_cmd << 24) | (cmd << 16) | (param << 8);
78 int cnt = 100;
79
80 /* transmit a short packet to LCD panel */
Magnus Dammdeaba192010-11-17 09:53:25 +000081 iowrite32(1 | data, mipi->linkbase + CMTSRTCTR);
82 iowrite32(1, mipi->linkbase + CMTSRTREQ);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +000083
Magnus Dammdeaba192010-11-17 09:53:25 +000084 while ((ioread32(mipi->linkbase + CMTSRTREQ) & 1) && --cnt)
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +000085 udelay(1);
86
87 return cnt ? 0 : -ETIMEDOUT;
88}
89
90#define LCD_CHAN2MIPI(c) ((c) < LCDC_CHAN_MAINLCD || (c) > LCDC_CHAN_SUBLCD ? \
91 -EINVAL : (c) - 1)
92
93static int sh_mipi_dcs(int handle, u8 cmd)
94{
95 struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
96 if (!mipi)
97 return -ENODEV;
98 return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE, cmd, 0);
99}
100
101static int sh_mipi_dcs_param(int handle, u8 cmd, u8 param)
102{
103 struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
104 if (!mipi)
105 return -ENODEV;
106 return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE_PARAM, cmd,
107 param);
108}
109
110static void sh_mipi_dsi_enable(struct sh_mipi *mipi, bool enable)
111{
112 /*
113 * enable LCDC data tx, transition to LPS after completion of each HS
114 * packet
115 */
Magnus Dammdeaba192010-11-17 09:53:25 +0000116 iowrite32(0x00000002 | enable, mipi->linkbase + DTCTR);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000117}
118
119static void sh_mipi_shutdown(struct platform_device *pdev)
120{
121 struct sh_mipi *mipi = platform_get_drvdata(pdev);
122
123 sh_mipi_dsi_enable(mipi, false);
124}
125
Guennadi Liakhovetskic2439392010-07-21 10:13:17 +0000126static void mipi_display_on(void *arg, struct fb_info *info)
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000127{
128 struct sh_mipi *mipi = arg;
129
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +0000130 pm_runtime_get_sync(mipi->dev);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000131 sh_mipi_dsi_enable(mipi, true);
Magnus Damm6722a402010-11-17 06:44:54 +0000132
133 if (mipi->next_display_on)
134 mipi->next_display_on(mipi->next_board_data, info);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000135}
136
137static void mipi_display_off(void *arg)
138{
139 struct sh_mipi *mipi = arg;
140
Magnus Damm6722a402010-11-17 06:44:54 +0000141 if (mipi->next_display_off)
142 mipi->next_display_off(mipi->next_board_data);
143
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000144 sh_mipi_dsi_enable(mipi, false);
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +0000145 pm_runtime_put(mipi->dev);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000146}
147
148static int __init sh_mipi_setup(struct sh_mipi *mipi,
149 struct sh_mipi_dsi_info *pdata)
150{
151 void __iomem *base = mipi->base;
152 struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
Guennadi Liakhovetski14bbb7c2010-12-29 08:12:29 +0000153 u32 pctype, datatype, pixfmt, linelength, vmctr2 = 0x00e00000;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000154 bool yuv;
155
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000156 /*
157 * Select data format. MIPI DSI is not hot-pluggable, so, we just use
158 * the default videomode. If this ever becomes a problem, We'll have to
159 * move this to mipi_display_on() above and use info->var.xres
160 */
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000161 switch (pdata->data_format) {
162 case MIPI_RGB888:
163 pctype = 0;
164 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
165 pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000166 linelength = ch->lcd_cfg[0].xres * 3;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000167 yuv = false;
168 break;
169 case MIPI_RGB565:
170 pctype = 1;
171 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
172 pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000173 linelength = ch->lcd_cfg[0].xres * 2;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000174 yuv = false;
175 break;
176 case MIPI_RGB666_LP:
177 pctype = 2;
178 datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
179 pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000180 linelength = ch->lcd_cfg[0].xres * 3;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000181 yuv = false;
182 break;
183 case MIPI_RGB666:
184 pctype = 3;
185 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
186 pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000187 linelength = (ch->lcd_cfg[0].xres * 18 + 7) / 8;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000188 yuv = false;
189 break;
190 case MIPI_BGR888:
191 pctype = 8;
192 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
193 pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000194 linelength = ch->lcd_cfg[0].xres * 3;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000195 yuv = false;
196 break;
197 case MIPI_BGR565:
198 pctype = 9;
199 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
200 pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000201 linelength = ch->lcd_cfg[0].xres * 2;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000202 yuv = false;
203 break;
204 case MIPI_BGR666_LP:
205 pctype = 0xa;
206 datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
207 pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000208 linelength = ch->lcd_cfg[0].xres * 3;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000209 yuv = false;
210 break;
211 case MIPI_BGR666:
212 pctype = 0xb;
213 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
214 pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000215 linelength = (ch->lcd_cfg[0].xres * 18 + 7) / 8;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000216 yuv = false;
217 break;
218 case MIPI_YUYV:
219 pctype = 4;
220 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
221 pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000222 linelength = ch->lcd_cfg[0].xres * 2;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000223 yuv = true;
224 break;
225 case MIPI_UYVY:
226 pctype = 5;
227 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
228 pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000229 linelength = ch->lcd_cfg[0].xres * 2;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000230 yuv = true;
231 break;
232 case MIPI_YUV420_L:
233 pctype = 6;
234 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
235 pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000236 linelength = (ch->lcd_cfg[0].xres * 12 + 7) / 8;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000237 yuv = true;
238 break;
239 case MIPI_YUV420:
240 pctype = 7;
241 datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
242 pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
243 /* Length of U/V line */
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000244 linelength = (ch->lcd_cfg[0].xres + 1) / 2;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000245 yuv = true;
246 break;
247 default:
248 return -EINVAL;
249 }
250
251 if ((yuv && ch->interface_type != YUV422) ||
252 (!yuv && ch->interface_type != RGB24))
253 return -EINVAL;
254
255 /* reset DSI link */
Magnus Damm71b146c2010-11-17 06:44:25 +0000256 iowrite32(0x00000001, base + SYSCTRL);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000257 /* Hold reset for 100 cycles of the slowest of bus, HS byte and LP clock */
258 udelay(50);
Magnus Damm71b146c2010-11-17 06:44:25 +0000259 iowrite32(0x00000000, base + SYSCTRL);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000260
261 /* setup DSI link */
262
263 /*
264 * Default = ULPS enable |
265 * Contention detection enabled |
266 * EoT packet transmission enable |
267 * CRC check enable |
268 * ECC check enable
269 * additionally enable first two lanes
270 */
Magnus Damm71b146c2010-11-17 06:44:25 +0000271 iowrite32(0x00003703, base + SYSCONF);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000272 /*
273 * T_wakeup = 0x7000
274 * T_hs-trail = 3
275 * T_hs-prepare = 3
276 * T_clk-trail = 3
277 * T_clk-prepare = 2
278 */
Magnus Damm71b146c2010-11-17 06:44:25 +0000279 iowrite32(0x70003332, base + TIMSET);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000280 /* no responses requested */
Magnus Damm71b146c2010-11-17 06:44:25 +0000281 iowrite32(0x00000000, base + RESREQSET0);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000282 /* request response to packets of type 0x28 */
Magnus Damm71b146c2010-11-17 06:44:25 +0000283 iowrite32(0x00000100, base + RESREQSET1);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000284 /* High-speed transmission timeout, default 0xffffffff */
Magnus Damm71b146c2010-11-17 06:44:25 +0000285 iowrite32(0x0fffffff, base + HSTTOVSET);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000286 /* LP reception timeout, default 0xffffffff */
Magnus Damm71b146c2010-11-17 06:44:25 +0000287 iowrite32(0x0fffffff, base + LPRTOVSET);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000288 /* Turn-around timeout, default 0xffffffff */
Magnus Damm71b146c2010-11-17 06:44:25 +0000289 iowrite32(0x0fffffff, base + TATOVSET);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000290 /* Peripheral reset timeout, default 0xffffffff */
Magnus Damm71b146c2010-11-17 06:44:25 +0000291 iowrite32(0x0fffffff, base + PRTOVSET);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000292 /* Enable timeout counters */
Magnus Damm71b146c2010-11-17 06:44:25 +0000293 iowrite32(0x00000f00, base + DSICTRL);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000294 /* Interrupts not used, disable all */
295 iowrite32(0, base + DSIINTE);
296 /* DSI-Tx bias on */
Magnus Damm71b146c2010-11-17 06:44:25 +0000297 iowrite32(0x00000001, base + PHYCTRL);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000298 udelay(200);
299 /* Deassert resets, power on, set multiplier */
Magnus Damm71b146c2010-11-17 06:44:25 +0000300 iowrite32(0x03070b01, base + PHYCTRL);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000301
302 /* setup l-bridge */
303
304 /*
305 * Enable transmission of all packets,
306 * transmit LPS after each HS packet completion
307 */
Magnus Dammdeaba192010-11-17 09:53:25 +0000308 iowrite32(0x00000006, mipi->linkbase + DTCTR);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000309 /* VSYNC width = 2 (<< 17) */
Guennadi Liakhovetski14bbb7c2010-12-29 08:12:29 +0000310 iowrite32((ch->lcd_cfg[0].vsync_len << pdata->vsynw_offset) |
311 (pdata->clksrc << 16) | (pctype << 12) | datatype,
Magnus Dammdeaba192010-11-17 09:53:25 +0000312 mipi->linkbase + VMCTR1);
Guennadi Liakhovetski14bbb7c2010-12-29 08:12:29 +0000313
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000314 /*
315 * Non-burst mode with sync pulses: VSE and HSE are output,
316 * HSA period allowed, no commands in LP
317 */
Guennadi Liakhovetski14bbb7c2010-12-29 08:12:29 +0000318 if (pdata->flags & SH_MIPI_DSI_HSABM)
319 vmctr2 |= 0x20;
320 if (pdata->flags & SH_MIPI_DSI_HSPBM)
321 vmctr2 |= 0x10;
322 iowrite32(vmctr2, mipi->linkbase + VMCTR2);
323
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000324 /*
325 * 0x660 = 1632 bytes per line (RGB24, 544 pixels: see
Guennadi Liakhovetski44432402010-09-03 07:20:04 +0000326 * sh_mobile_lcdc_info.ch[0].lcd_cfg[0].xres), HSALEN = 1 - default
Guennadi Liakhovetski14bbb7c2010-12-29 08:12:29 +0000327 * (unused if VMCTR2[HSABM] = 0)
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000328 */
Magnus Dammdeaba192010-11-17 09:53:25 +0000329 iowrite32(1 | (linelength << 16), mipi->linkbase + VMLEN1);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000330
331 msleep(5);
332
333 /* setup LCD panel */
334
335 /* cf. drivers/video/omap/lcd_mipid.c */
336 sh_mipi_dcs(ch->chan, MIPI_DCS_EXIT_SLEEP_MODE);
337 msleep(120);
338 /*
339 * [7] - Page Address Mode
340 * [6] - Column Address Mode
341 * [5] - Page / Column Address Mode
342 * [4] - Display Device Line Refresh Order
343 * [3] - RGB/BGR Order
344 * [2] - Display Data Latch Data Order
345 * [1] - Flip Horizontal
346 * [0] - Flip Vertical
347 */
348 sh_mipi_dcs_param(ch->chan, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
349 /* cf. set_data_lines() */
350 sh_mipi_dcs_param(ch->chan, MIPI_DCS_SET_PIXEL_FORMAT,
351 pixfmt << 4);
352 sh_mipi_dcs(ch->chan, MIPI_DCS_SET_DISPLAY_ON);
353
354 return 0;
355}
356
357static int __init sh_mipi_probe(struct platform_device *pdev)
358{
359 struct sh_mipi *mipi;
360 struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
361 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Magnus Dammdeaba192010-11-17 09:53:25 +0000362 struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000363 unsigned long rate, f_current;
364 int idx = pdev->id, ret;
365 char dsip_clk[] = "dsi.p_clk";
366
Magnus Dammdeaba192010-11-17 09:53:25 +0000367 if (!res || !res2 || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000368 return -ENODEV;
369
370 mutex_lock(&array_lock);
371 if (idx < 0)
372 for (idx = 0; idx < ARRAY_SIZE(mipi_dsi) && mipi_dsi[idx]; idx++)
373 ;
374
375 if (idx == ARRAY_SIZE(mipi_dsi)) {
376 ret = -EBUSY;
377 goto efindslot;
378 }
379
380 mipi = kzalloc(sizeof(*mipi), GFP_KERNEL);
381 if (!mipi) {
382 ret = -ENOMEM;
383 goto ealloc;
384 }
385
386 if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
387 dev_err(&pdev->dev, "MIPI register region already claimed\n");
388 ret = -EBUSY;
389 goto ereqreg;
390 }
391
392 mipi->base = ioremap(res->start, resource_size(res));
393 if (!mipi->base) {
394 ret = -ENOMEM;
395 goto emap;
396 }
397
Magnus Dammdeaba192010-11-17 09:53:25 +0000398 if (!request_mem_region(res2->start, resource_size(res2), pdev->name)) {
399 dev_err(&pdev->dev, "MIPI register region 2 already claimed\n");
400 ret = -EBUSY;
401 goto ereqreg2;
402 }
403
404 mipi->linkbase = ioremap(res2->start, resource_size(res2));
405 if (!mipi->linkbase) {
406 ret = -ENOMEM;
407 goto emap2;
408 }
409
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +0000410 mipi->dev = &pdev->dev;
411
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000412 mipi->dsit_clk = clk_get(&pdev->dev, "dsit_clk");
413 if (IS_ERR(mipi->dsit_clk)) {
414 ret = PTR_ERR(mipi->dsit_clk);
415 goto eclktget;
416 }
417
418 f_current = clk_get_rate(mipi->dsit_clk);
419 /* 80MHz required by the datasheet */
420 rate = clk_round_rate(mipi->dsit_clk, 80000000);
421 if (rate > 0 && rate != f_current)
422 ret = clk_set_rate(mipi->dsit_clk, rate);
423 else
424 ret = rate;
425 if (ret < 0)
426 goto esettrate;
427
428 dev_dbg(&pdev->dev, "DSI-T clk %lu -> %lu\n", f_current, rate);
429
430 sprintf(dsip_clk, "dsi%1.1dp_clk", idx);
431 mipi->dsip_clk = clk_get(&pdev->dev, dsip_clk);
432 if (IS_ERR(mipi->dsip_clk)) {
433 ret = PTR_ERR(mipi->dsip_clk);
434 goto eclkpget;
435 }
436
437 f_current = clk_get_rate(mipi->dsip_clk);
438 /* Between 10 and 50MHz */
439 rate = clk_round_rate(mipi->dsip_clk, 24000000);
440 if (rate > 0 && rate != f_current)
441 ret = clk_set_rate(mipi->dsip_clk, rate);
442 else
443 ret = rate;
444 if (ret < 0)
445 goto esetprate;
446
447 dev_dbg(&pdev->dev, "DSI-P clk %lu -> %lu\n", f_current, rate);
448
449 msleep(10);
450
451 ret = clk_enable(mipi->dsit_clk);
452 if (ret < 0)
453 goto eclkton;
454
455 ret = clk_enable(mipi->dsip_clk);
456 if (ret < 0)
457 goto eclkpon;
458
459 mipi_dsi[idx] = mipi;
460
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +0000461 pm_runtime_enable(&pdev->dev);
462 pm_runtime_resume(&pdev->dev);
463
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000464 ret = sh_mipi_setup(mipi, pdata);
465 if (ret < 0)
466 goto emipisetup;
467
468 mutex_unlock(&array_lock);
469 platform_set_drvdata(pdev, mipi);
470
Magnus Damm6722a402010-11-17 06:44:54 +0000471 /* Save original LCDC callbacks */
472 mipi->next_board_data = pdata->lcd_chan->board_cfg.board_data;
473 mipi->next_display_on = pdata->lcd_chan->board_cfg.display_on;
474 mipi->next_display_off = pdata->lcd_chan->board_cfg.display_off;
475
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000476 /* Set up LCDC callbacks */
477 pdata->lcd_chan->board_cfg.board_data = mipi;
478 pdata->lcd_chan->board_cfg.display_on = mipi_display_on;
479 pdata->lcd_chan->board_cfg.display_off = mipi_display_off;
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +0000480 pdata->lcd_chan->board_cfg.owner = THIS_MODULE;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000481
482 return 0;
483
484emipisetup:
485 mipi_dsi[idx] = NULL;
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +0000486 pm_runtime_disable(&pdev->dev);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000487 clk_disable(mipi->dsip_clk);
488eclkpon:
489 clk_disable(mipi->dsit_clk);
490eclkton:
491esetprate:
492 clk_put(mipi->dsip_clk);
493eclkpget:
494esettrate:
495 clk_put(mipi->dsit_clk);
496eclktget:
Magnus Dammdeaba192010-11-17 09:53:25 +0000497 iounmap(mipi->linkbase);
498emap2:
499 release_mem_region(res2->start, resource_size(res2));
500ereqreg2:
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000501 iounmap(mipi->base);
502emap:
503 release_mem_region(res->start, resource_size(res));
504ereqreg:
505 kfree(mipi);
506ealloc:
507efindslot:
508 mutex_unlock(&array_lock);
509
510 return ret;
511}
512
513static int __exit sh_mipi_remove(struct platform_device *pdev)
514{
515 struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
516 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Magnus Dammdeaba192010-11-17 09:53:25 +0000517 struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000518 struct sh_mipi *mipi = platform_get_drvdata(pdev);
519 int i, ret;
520
521 mutex_lock(&array_lock);
522
523 for (i = 0; i < ARRAY_SIZE(mipi_dsi) && mipi_dsi[i] != mipi; i++)
524 ;
525
526 if (i == ARRAY_SIZE(mipi_dsi)) {
527 ret = -EINVAL;
528 } else {
529 ret = 0;
530 mipi_dsi[i] = NULL;
531 }
532
533 mutex_unlock(&array_lock);
534
535 if (ret < 0)
536 return ret;
537
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +0000538 pdata->lcd_chan->board_cfg.owner = NULL;
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000539 pdata->lcd_chan->board_cfg.display_on = NULL;
540 pdata->lcd_chan->board_cfg.display_off = NULL;
541 pdata->lcd_chan->board_cfg.board_data = NULL;
542
Guennadi Liakhovetski236782a2010-12-27 10:23:05 +0000543 pm_runtime_disable(&pdev->dev);
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000544 clk_disable(mipi->dsip_clk);
545 clk_disable(mipi->dsit_clk);
546 clk_put(mipi->dsit_clk);
547 clk_put(mipi->dsip_clk);
Magnus Dammdeaba192010-11-17 09:53:25 +0000548 iounmap(mipi->linkbase);
549 if (res2)
550 release_mem_region(res2->start, resource_size(res2));
Guennadi Liakhovetski9fd04fe2010-05-23 14:00:43 +0000551 iounmap(mipi->base);
552 if (res)
553 release_mem_region(res->start, resource_size(res));
554 platform_set_drvdata(pdev, NULL);
555 kfree(mipi);
556
557 return 0;
558}
559
560static struct platform_driver sh_mipi_driver = {
561 .remove = __exit_p(sh_mipi_remove),
562 .shutdown = sh_mipi_shutdown,
563 .driver = {
564 .name = "sh-mipi-dsi",
565 },
566};
567
568static int __init sh_mipi_init(void)
569{
570 return platform_driver_probe(&sh_mipi_driver, sh_mipi_probe);
571}
572module_init(sh_mipi_init);
573
574static void __exit sh_mipi_exit(void)
575{
576 platform_driver_unregister(&sh_mipi_driver);
577}
578module_exit(sh_mipi_exit);
579
580MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
581MODULE_DESCRIPTION("SuperH / ARM-shmobile MIPI DSI driver");
582MODULE_LICENSE("GPL v2");