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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mach-pxa/mainstone.c
3 *
4 * Support for the Intel HCDDBBVA0 Development Platform.
5 * (go figure how they came up with such name...)
6 *
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/init.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010017#include <linux/platform_device.h>
Nicolas Pitre22f11c42005-06-16 21:23:56 +010018#include <linux/sysdev.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/interrupt.h>
20#include <linux/sched.h>
21#include <linux/bitops.h>
22#include <linux/fb.h>
Todd Poynor74ec71e2005-11-04 17:15:45 +000023#include <linux/ioport.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/partitions.h>
eric miao450d2872008-03-11 10:06:38 +080026#include <linux/input.h>
27#include <linux/gpio_keys.h>
Russell King402e4902008-04-13 21:47:01 +010028#include <linux/pwm_backlight.h>
Eric Miao38fd6c32008-06-24 16:14:26 +080029#include <linux/smc91x.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
31#include <asm/types.h>
32#include <asm/setup.h>
33#include <asm/memory.h>
34#include <asm/mach-types.h>
35#include <asm/hardware.h>
36#include <asm/irq.h>
Todd Poynor74ec71e2005-11-04 17:15:45 +000037#include <asm/sizes.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41#include <asm/mach/irq.h>
Todd Poynor74ec71e2005-11-04 17:15:45 +000042#include <asm/mach/flash.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
44#include <asm/arch/pxa-regs.h>
Russell King8785a8f2008-01-14 17:02:33 +000045#include <asm/arch/pxa2xx-regs.h>
eric miaofef06d22008-02-04 17:15:50 +080046#include <asm/arch/mfp-pxa27x.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <asm/arch/mainstone.h>
48#include <asm/arch/audio.h>
49#include <asm/arch/pxafb.h>
Mark Brown835e7f12008-04-07 17:16:34 +010050#include <asm/arch/i2c.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include <asm/arch/mmc.h>
Nicolas Pitre6f475c02005-10-28 16:39:33 +010052#include <asm/arch/irda.h>
Richard Purdie81f280e2005-11-12 14:22:11 +000053#include <asm/arch/ohci.h>
eric miao55c26e42008-01-23 14:25:27 +080054#include <asm/arch/pxa27x_keypad.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
56#include "generic.h"
Russell King46c41e62007-05-15 15:39:36 +010057#include "devices.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
eric miaofef06d22008-02-04 17:15:50 +080059static unsigned long mainstone_pin_config[] = {
60 /* Chip Select */
61 GPIO15_nCS_1,
62
63 /* LCD - 16bpp Active TFT */
64 GPIO58_LCD_LDD_0,
65 GPIO59_LCD_LDD_1,
66 GPIO60_LCD_LDD_2,
67 GPIO61_LCD_LDD_3,
68 GPIO62_LCD_LDD_4,
69 GPIO63_LCD_LDD_5,
70 GPIO64_LCD_LDD_6,
71 GPIO65_LCD_LDD_7,
72 GPIO66_LCD_LDD_8,
73 GPIO67_LCD_LDD_9,
74 GPIO68_LCD_LDD_10,
75 GPIO69_LCD_LDD_11,
76 GPIO70_LCD_LDD_12,
77 GPIO71_LCD_LDD_13,
78 GPIO72_LCD_LDD_14,
79 GPIO73_LCD_LDD_15,
80 GPIO74_LCD_FCLK,
81 GPIO75_LCD_LCLK,
82 GPIO76_LCD_PCLK,
83 GPIO77_LCD_BIAS,
84 GPIO16_PWM0_OUT, /* Backlight */
85
86 /* MMC */
87 GPIO32_MMC_CLK,
88 GPIO112_MMC_CMD,
89 GPIO92_MMC_DAT_0,
90 GPIO109_MMC_DAT_1,
91 GPIO110_MMC_DAT_2,
92 GPIO111_MMC_DAT_3,
93
94 /* USB Host Port 1 */
95 GPIO88_USBH1_PWR,
96 GPIO89_USBH1_PEN,
97
98 /* PC Card */
99 GPIO48_nPOE,
100 GPIO49_nPWE,
101 GPIO50_nPIOR,
102 GPIO51_nPIOW,
103 GPIO85_nPCE_1,
104 GPIO54_nPCE_2,
105 GPIO79_PSKTSEL,
106 GPIO55_nPREG,
107 GPIO56_nPWAIT,
108 GPIO57_nIOIS16,
109
110 /* AC97 */
111 GPIO45_AC97_SYSCLK,
112
113 /* Keypad */
Eric Miaob18773d2008-06-02 17:41:42 +0800114 GPIO93_KP_DKIN_0,
115 GPIO94_KP_DKIN_1,
116 GPIO95_KP_DKIN_2,
eric miaofef06d22008-02-04 17:15:50 +0800117 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
118 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
119 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
120 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
121 GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
122 GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
123 GPIO103_KP_MKOUT_0,
124 GPIO104_KP_MKOUT_1,
125 GPIO105_KP_MKOUT_2,
126 GPIO106_KP_MKOUT_3,
127 GPIO107_KP_MKOUT_4,
128 GPIO108_KP_MKOUT_5,
129 GPIO96_KP_MKOUT_6,
130
131 /* GPIO */
132 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
133};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
135static unsigned long mainstone_irq_enabled;
136
137static void mainstone_mask_irq(unsigned int irq)
138{
139 int mainstone_irq = (irq - MAINSTONE_IRQ(0));
140 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
141}
142
143static void mainstone_unmask_irq(unsigned int irq)
144{
145 int mainstone_irq = (irq - MAINSTONE_IRQ(0));
146 /* the irq can be acknowledged only if deasserted, so it's done here */
147 MST_INTSETCLR &= ~(1 << mainstone_irq);
148 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
149}
150
David Brownell38c677c2006-08-01 22:26:25 +0100151static struct irq_chip mainstone_irq_chip = {
152 .name = "FPGA",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 .ack = mainstone_mask_irq,
154 .mask = mainstone_mask_irq,
155 .unmask = mainstone_unmask_irq,
156};
157
Russell King10dd5ce2006-11-23 11:41:32 +0000158static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159{
160 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
161 do {
162 GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
163 if (likely(pending)) {
164 irq = MAINSTONE_IRQ(0) + __ffs(pending);
165 desc = irq_desc + irq;
Linus Torvalds0cd61b62006-10-06 10:53:39 -0700166 desc_handle_irq(irq, desc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167 }
168 pending = MST_INTSETCLR & mainstone_irq_enabled;
169 } while (pending);
170}
171
172static void __init mainstone_init_irq(void)
173{
174 int irq;
175
Eric Miaocd491042007-06-22 04:14:09 +0100176 pxa27x_init_irq();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177
178 /* setup extra Mainstone irqs */
179 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
180 set_irq_chip(irq, &mainstone_irq_chip);
Russell King10dd5ce2006-11-23 11:41:32 +0000181 set_irq_handler(irq, handle_level_irq);
Thomas Gleixnerec641522006-05-17 20:14:29 +0100182 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
183 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
184 else
185 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700186 }
187 set_irq_flags(MAINSTONE_IRQ(8), 0);
188 set_irq_flags(MAINSTONE_IRQ(12), 0);
189
190 MST_INTMSKENA = 0;
191 MST_INTSETCLR = 0;
192
193 set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
194 set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
195}
196
Nicolas Pitre22f11c42005-06-16 21:23:56 +0100197#ifdef CONFIG_PM
198
199static int mainstone_irq_resume(struct sys_device *dev)
200{
201 MST_INTMSKENA = mainstone_irq_enabled;
202 return 0;
203}
204
205static struct sysdev_class mainstone_irq_sysclass = {
Kay Sieversaf5ca3f2007-12-20 02:09:39 +0100206 .name = "cpld_irq",
Nicolas Pitre22f11c42005-06-16 21:23:56 +0100207 .resume = mainstone_irq_resume,
208};
209
210static struct sys_device mainstone_irq_device = {
211 .cls = &mainstone_irq_sysclass,
212};
213
214static int __init mainstone_irq_device_init(void)
215{
Russell King16f159b2007-12-10 13:33:06 +0000216 int ret = -ENODEV;
217
218 if (machine_is_mainstone()) {
219 ret = sysdev_class_register(&mainstone_irq_sysclass);
220 if (ret == 0)
221 ret = sysdev_register(&mainstone_irq_device);
222 }
Nicolas Pitre22f11c42005-06-16 21:23:56 +0100223 return ret;
224}
225
226device_initcall(mainstone_irq_device_init);
227
228#endif
229
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230
231static struct resource smc91x_resources[] = {
232 [0] = {
233 .start = (MST_ETH_PHYS + 0x300),
234 .end = (MST_ETH_PHYS + 0xfffff),
235 .flags = IORESOURCE_MEM,
236 },
237 [1] = {
238 .start = MAINSTONE_IRQ(3),
239 .end = MAINSTONE_IRQ(3),
Russell Kinge7b3dc72008-01-14 22:30:10 +0000240 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 }
242};
243
Eric Miao38fd6c32008-06-24 16:14:26 +0800244static struct smc91x_platdata mainstone_smc91x_info = {
245 .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
246 SMC91X_NOWAIT | SMC91X_USE_DMA,
247};
248
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249static struct platform_device smc91x_device = {
250 .name = "smc91x",
251 .id = 0,
252 .num_resources = ARRAY_SIZE(smc91x_resources),
253 .resource = smc91x_resources,
Eric Miao38fd6c32008-06-24 16:14:26 +0800254 .dev = {
255 .platform_data = &mainstone_smc91x_info,
256 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257};
258
Takashi Iwaif7cbb7f2006-01-13 18:48:06 +0100259static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700260{
261 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
262 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
263 return 0;
264}
265
Takashi Iwaif7cbb7f2006-01-13 18:48:06 +0100266static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267{
268 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
269 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
270}
271
272static long mst_audio_suspend_mask;
273
274static void mst_audio_suspend(void *priv)
275{
276 mst_audio_suspend_mask = MST_MSCWR2;
277 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
278}
279
280static void mst_audio_resume(void *priv)
281{
282 MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
283}
284
285static pxa2xx_audio_ops_t mst_audio_ops = {
286 .startup = mst_audio_startup,
287 .shutdown = mst_audio_shutdown,
288 .suspend = mst_audio_suspend,
289 .resume = mst_audio_resume,
290};
291
Todd Poynor74ec71e2005-11-04 17:15:45 +0000292static struct resource flash_resources[] = {
293 [0] = {
294 .start = PXA_CS0_PHYS,
295 .end = PXA_CS0_PHYS + SZ_64M - 1,
296 .flags = IORESOURCE_MEM,
297 },
298 [1] = {
299 .start = PXA_CS1_PHYS,
300 .end = PXA_CS1_PHYS + SZ_64M - 1,
301 .flags = IORESOURCE_MEM,
302 },
303};
304
305static struct mtd_partition mainstoneflash0_partitions[] = {
306 {
307 .name = "Bootloader",
308 .size = 0x00040000,
309 .offset = 0,
310 .mask_flags = MTD_WRITEABLE /* force read-only */
311 },{
312 .name = "Kernel",
313 .size = 0x00400000,
314 .offset = 0x00040000,
315 },{
316 .name = "Filesystem",
317 .size = MTDPART_SIZ_FULL,
318 .offset = 0x00440000
319 }
320};
321
322static struct flash_platform_data mst_flash_data[2] = {
323 {
324 .map_name = "cfi_probe",
325 .parts = mainstoneflash0_partitions,
326 .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
327 }, {
328 .map_name = "cfi_probe",
329 .parts = NULL,
330 .nr_parts = 0,
331 }
332};
333
334static struct platform_device mst_flash_device[2] = {
335 {
336 .name = "pxa2xx-flash",
337 .id = 0,
338 .dev = {
339 .platform_data = &mst_flash_data[0],
340 },
341 .resource = &flash_resources[0],
342 .num_resources = 1,
343 },
344 {
345 .name = "pxa2xx-flash",
346 .id = 1,
347 .dev = {
348 .platform_data = &mst_flash_data[1],
349 },
350 .resource = &flash_resources[1],
351 .num_resources = 1,
352 },
353};
354
Russell King402e4902008-04-13 21:47:01 +0100355#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
356static struct platform_pwm_backlight_data mainstone_backlight_data = {
357 .pwm_id = 0,
358 .max_brightness = 1023,
359 .dft_brightness = 1023,
360 .pwm_period_ns = 78770,
361};
Russell King3777f772007-11-08 11:22:48 +0000362
Russell King402e4902008-04-13 21:47:01 +0100363static struct platform_device mainstone_backlight_device = {
364 .name = "pwm-backlight",
365 .dev = {
366 .parent = &pxa27x_device_pwm0.dev,
367 .platform_data = &mainstone_backlight_data,
368 },
Russell King3777f772007-11-08 11:22:48 +0000369};
370
371static void __init mainstone_backlight_register(void)
372{
Russell King402e4902008-04-13 21:47:01 +0100373 int ret = platform_device_register(&mainstone_backlight_device);
374 if (ret)
375 printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
Russell King3777f772007-11-08 11:22:48 +0000376}
377#else
378#define mainstone_backlight_register() do { } while (0)
379#endif
380
Richard Purdied14b2722006-09-20 22:54:21 +0100381static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382 .pixclock = 50000,
383 .xres = 640,
384 .yres = 480,
385 .bpp = 16,
386 .hsync_len = 1,
387 .left_margin = 0x9f,
388 .right_margin = 1,
389 .vsync_len = 44,
390 .upper_margin = 0,
391 .lower_margin = 0,
392 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393};
394
Richard Purdied14b2722006-09-20 22:54:21 +0100395static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 .pixclock = 110000,
397 .xres = 240,
398 .yres = 320,
399 .bpp = 16,
400 .hsync_len = 4,
401 .left_margin = 8,
402 .right_margin = 20,
403 .vsync_len = 3,
404 .upper_margin = 1,
405 .lower_margin = 10,
406 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
Richard Purdied14b2722006-09-20 22:54:21 +0100407};
408
409static struct pxafb_mach_info mainstone_pxafb_info = {
410 .num_modes = 1,
eric miao0454bd02008-04-30 00:52:23 -0700411 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412};
413
David Howells40220c12006-10-09 12:19:47 +0100414static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415{
416 int err;
417
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418 /* make sure SD/Memory Stick multiplexer's signals
419 * are routed to MMC controller
420 */
421 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
422
Thomas Gleixner52e405e2006-07-03 02:20:05 +0200423 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424 "MMC card detect", data);
Russell King2687bd32008-01-23 14:05:58 +0000425 if (err)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427
Russell King2687bd32008-01-23 14:05:58 +0000428 return err;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429}
430
431static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
432{
433 struct pxamci_platform_data* p_d = dev->platform_data;
434
435 if (( 1 << vdd) & p_d->ocr_mask) {
Harvey Harrison8e86f422008-03-04 15:08:02 -0800436 printk(KERN_DEBUG "%s: on\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
438 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
439 } else {
Harvey Harrison8e86f422008-03-04 15:08:02 -0800440 printk(KERN_DEBUG "%s: off\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
442 }
443}
444
445static void mainstone_mci_exit(struct device *dev, void *data)
446{
447 free_irq(MAINSTONE_MMC_IRQ, data);
448}
449
450static struct pxamci_platform_data mainstone_mci_platform_data = {
451 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
452 .init = mainstone_mci_init,
453 .setpower = mainstone_mci_setpower,
454 .exit = mainstone_mci_exit,
455};
456
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100457static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
458{
459 unsigned long flags;
460
461 local_irq_save(flags);
462 if (mode & IR_SIRMODE) {
463 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
464 } else if (mode & IR_FIRMODE) {
465 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
466 }
Dmitry Baryshkov0fc3ff32008-07-02 13:54:46 +0100467 pxa2xx_transceiver_mode(dev, mode);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100468 if (mode & IR_OFF) {
469 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
470 } else {
471 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
472 }
473 local_irq_restore(flags);
474}
475
476static struct pxaficp_platform_data mainstone_ficp_platform_data = {
477 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
478 .transceiver_mode = mainstone_irda_transceiver_mode,
479};
480
eric miao450d2872008-03-11 10:06:38 +0800481static struct gpio_keys_button gpio_keys_button[] = {
482 [0] = {
483 .desc = "wakeup",
484 .code = KEY_SUSPEND,
485 .type = EV_KEY,
486 .gpio = 1,
487 .wakeup = 1,
488 },
489};
490
491static struct gpio_keys_platform_data mainstone_gpio_keys = {
492 .buttons = gpio_keys_button,
493 .nbuttons = 1,
494};
495
496static struct platform_device mst_gpio_keys_device = {
497 .name = "gpio-keys",
498 .id = -1,
499 .dev = {
500 .platform_data = &mainstone_gpio_keys,
501 },
502};
503
Todd Poynor74ec71e2005-11-04 17:15:45 +0000504static struct platform_device *platform_devices[] __initdata = {
505 &smc91x_device,
Todd Poynor74ec71e2005-11-04 17:15:45 +0000506 &mst_flash_device[0],
507 &mst_flash_device[1],
eric miao450d2872008-03-11 10:06:38 +0800508 &mst_gpio_keys_device,
Todd Poynor74ec71e2005-11-04 17:15:45 +0000509};
510
Richard Purdie81f280e2005-11-12 14:22:11 +0000511static int mainstone_ohci_init(struct device *dev)
512{
Richard Purdie81f280e2005-11-12 14:22:11 +0000513 /* Set the Power Control Polarity Low and Power Sense
514 Polarity Low to active low. */
515 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
516 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
517
518 return 0;
519}
520
521static struct pxaohci_platform_data mainstone_ohci_platform_data = {
522 .port_mode = PMM_PERPORT_MODE,
523 .init = mainstone_ohci_init,
524};
525
Eric Miao36caeb42008-06-02 13:32:42 +0800526#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
eric miao55c26e42008-01-23 14:25:27 +0800527static unsigned int mainstone_matrix_keys[] = {
528 KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
529 KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
530 KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
531 KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
532 KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
533 KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
534 KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
535 KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
536 KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
537
538 KEY(0, 4, KEY_DOT), /* . */
539 KEY(1, 4, KEY_CLOSE), /* @ */
540 KEY(4, 4, KEY_SLASH),
541 KEY(5, 4, KEY_BACKSLASH),
542 KEY(0, 5, KEY_HOME),
543 KEY(1, 5, KEY_LEFTSHIFT),
544 KEY(2, 5, KEY_SPACE),
545 KEY(3, 5, KEY_SPACE),
546 KEY(4, 5, KEY_ENTER),
547 KEY(5, 5, KEY_BACKSPACE),
548
549 KEY(0, 6, KEY_UP),
550 KEY(1, 6, KEY_DOWN),
551 KEY(2, 6, KEY_LEFT),
552 KEY(3, 6, KEY_RIGHT),
553 KEY(4, 6, KEY_SELECT),
554};
555
556struct pxa27x_keypad_platform_data mainstone_keypad_info = {
557 .matrix_key_rows = 6,
558 .matrix_key_cols = 7,
559 .matrix_key_map = mainstone_matrix_keys,
560 .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
561
562 .enable_rotary0 = 1,
563 .rotary0_up_key = KEY_UP,
564 .rotary0_down_key = KEY_DOWN,
565
566 .debounce_interval = 30,
567};
568
569static void __init mainstone_init_keypad(void)
570{
571 pxa_set_keypad_info(&mainstone_keypad_info);
572}
573#else
574static inline void mainstone_init_keypad(void) {}
575#endif
576
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577static void __init mainstone_init(void)
578{
Todd Poynor74ec71e2005-11-04 17:15:45 +0000579 int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
580
eric miaofef06d22008-02-04 17:15:50 +0800581 pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
582
Todd Poynor74ec71e2005-11-04 17:15:45 +0000583 mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
584 mst_flash_data[1].width = 4;
585
586 /* Compensate for SW7 which swaps the flash banks */
587 mst_flash_data[SW7].name = "processor-flash";
588 mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
589
590 printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
591 mst_flash_data[0].name);
592
Jared Hulbert5b2e98c2006-01-05 21:12:26 +0000593 /* system bus arbiter setting
594 * - Core_Park
595 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
596 */
597 ARB_CNTRL = ARB_CORE_PARK | 0x234;
598
Todd Poynor74ec71e2005-11-04 17:15:45 +0000599 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600
601 /* reading Mainstone's "Virtual Configuration Register"
602 might be handy to select LCD type here */
603 if (0)
Richard Purdied14b2722006-09-20 22:54:21 +0100604 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 else
Richard Purdied14b2722006-09-20 22:54:21 +0100606 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
607
608 set_pxa_fb_info(&mainstone_pxafb_info);
Russell King3777f772007-11-08 11:22:48 +0000609 mainstone_backlight_register();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610
611 pxa_set_mci_info(&mainstone_mci_platform_data);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100612 pxa_set_ficp_info(&mainstone_ficp_platform_data);
Richard Purdie81f280e2005-11-12 14:22:11 +0000613 pxa_set_ohci_info(&mainstone_ohci_platform_data);
Mark Brown835e7f12008-04-07 17:16:34 +0100614 pxa_set_i2c_info(NULL);
Mark Brown9f19d632008-06-10 12:30:05 +0100615 pxa_set_ac97_info(&mst_audio_ops);
eric miao55c26e42008-01-23 14:25:27 +0800616
617 mainstone_init_keypad();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618}
619
620
621static struct map_desc mainstone_io_desc[] __initdata = {
Deepak Saxena6f9182e2005-10-28 15:19:01 +0100622 { /* CPLD */
623 .virtual = MST_FPGA_VIRT,
624 .pfn = __phys_to_pfn(MST_FPGA_PHYS),
625 .length = 0x00100000,
626 .type = MT_DEVICE
627 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700628};
629
630static void __init mainstone_map_io(void)
631{
632 pxa_map_io();
633 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
634
Todd Poynor87754202005-06-03 20:52:27 +0100635 /* for use I SRAM as framebuffer. */
636 PSLR |= 0xF04;
637 PCFR = 0x66;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700638}
639
640MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100641 /* Maintainer: MontaVista Software Inc. */
Russell Kinge9dea0c2005-07-03 17:38:58 +0100642 .phys_io = 0x40000000,
Steve Yanga7d14f82006-06-05 19:47:17 +0100643 .boot_params = 0xa0000100, /* BLOB boot parameter setting */
Russell King68070bd2005-07-04 10:44:34 +0100644 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100645 .map_io = mainstone_map_io,
646 .init_irq = mainstone_init_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700647 .timer = &pxa_timer,
Russell Kinge9dea0c2005-07-03 17:38:58 +0100648 .init_machine = mainstone_init,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700649MACHINE_END