| Patrick Boettcher | 4de2730 | 2006-04-17 13:22:15 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Driver for Microtune MT2060 "Single chip dual conversion broadband tuner" |
| 3 | * |
| 4 | * Copyright (c) 2006 Olivier DANET <odanet@caramail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.= |
| 20 | */ |
| 21 | |
| 22 | #ifndef MT2060_PRIV_H |
| 23 | #define MT2060_PRIV_H |
| 24 | |
| 25 | // Uncomment the #define below to enable spurs checking. The results where quite unconvincing. |
| 26 | // #define MT2060_SPURCHECK |
| 27 | |
| 28 | /* This driver is based on the information available in the datasheet of the |
| 29 | "Comtech SDVBT-3K6M" tuner ( K1000737843.pdf ) which features the MT2060 register map : |
| 30 | |
| 31 | I2C Address : 0x60 |
| 32 | |
| 33 | Reg.No | B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 | ( defaults ) |
| 34 | -------------------------------------------------------------------------------- |
| 35 | 00 | [ PART ] | [ REV ] | R = 0x63 |
| 36 | 01 | [ LNABAND ] | [ NUM1(5:2) ] | RW = 0x3F |
| 37 | 02 | [ DIV1 ] | RW = 0x74 |
| 38 | 03 | FM1CA | FM1SS | [ NUM1(1:0) ] | [ NUM2(3:0) ] | RW = 0x00 |
| 39 | 04 | NUM2(11:4) ] | RW = 0x08 |
| 40 | 05 | [ DIV2 ] |NUM2(12)| RW = 0x93 |
| 41 | 06 | L1LK | [ TAD1 ] | L2LK | [ TAD2 ] | R |
| 42 | 07 | [ FMF ] | R |
| 43 | 08 | ? | FMCAL | ? | ? | ? | ? | ? | TEMP | R |
| 44 | 09 | 0 | 0 | [ FMGC ] | 0 | GP02 | GP01 | 0 | RW = 0x20 |
| 45 | 0A | ?? |
| 46 | 0B | 0 | 0 | 1 | 1 | 0 | 0 | [ VGAG ] | RW = 0x30 |
| 47 | 0C | V1CSE | 1 | 1 | 1 | 1 | 1 | 1 | 1 | RW = 0xFF |
| 48 | 0D | 1 | 0 | [ V1CS ] | RW = 0xB0 |
| 49 | 0E | ?? |
| 50 | 0F | ?? |
| 51 | 10 | ?? |
| 52 | 11 | [ LOTO ] | 0 | 0 | 1 | 0 | RW = 0x42 |
| 53 | |
| 54 | PART : Part code : 6 for MT2060 |
| 55 | REV : Revision code : 3 for current revision |
| 56 | LNABAND : Input frequency range : ( See code for details ) |
| 57 | NUM1 / DIV1 / NUM2 / DIV2 : Frequencies programming ( See code for details ) |
| 58 | FM1CA : Calibration Start Bit |
| 59 | FM1SS : Calibration Single Step bit |
| 60 | L1LK : LO1 Lock Detect |
| 61 | TAD1 : Tune Line ADC ( ? ) |
| 62 | L2LK : LO2 Lock Detect |
| 63 | TAD2 : Tune Line ADC ( ? ) |
| 64 | FMF : Estimated first IF Center frequency Offset ( ? ) |
| 65 | FM1CAL : Calibration done bit |
| 66 | TEMP : On chip temperature sensor |
| 67 | FMCG : Mixer 1 Cap Gain ( ? ) |
| 68 | GP01 / GP02 : Programmable digital outputs. Unconnected pins ? |
| 69 | V1CSE : LO1 VCO Automatic Capacitor Select Enable ( ? ) |
| 70 | V1CS : LO1 Capacitor Selection Value ( ? ) |
| 71 | LOTO : LO Timeout ( ? ) |
| 72 | VGAG : Tuner Output gain |
| 73 | */ |
| 74 | |
| 75 | #define I2C_ADDRESS 0x60 |
| 76 | |
| 77 | #define REG_PART_REV 0 |
| 78 | #define REG_LO1C1 1 |
| 79 | #define REG_LO1C2 2 |
| 80 | #define REG_LO2C1 3 |
| 81 | #define REG_LO2C2 4 |
| 82 | #define REG_LO2C3 5 |
| 83 | #define REG_LO_STATUS 6 |
| 84 | #define REG_FM_FREQ 7 |
| 85 | #define REG_MISC_STAT 8 |
| 86 | #define REG_MISC_CTRL 9 |
| 87 | #define REG_RESERVED_A 0x0A |
| 88 | #define REG_VGAG 0x0B |
| 89 | #define REG_LO1B1 0x0C |
| 90 | #define REG_LO1B2 0x0D |
| 91 | #define REG_LOTO 0x11 |
| 92 | |
| 93 | #define PART_REV 0x63 // The current driver works only with PART=6 and REV=3 chips |
| 94 | |
| Olivier DANET | 46f73f9 | 2006-08-08 15:48:10 -0300 | [diff] [blame] | 95 | struct mt2060_priv { |
| 96 | struct mt2060_config *cfg; |
| 97 | struct i2c_adapter *i2c; |
| 98 | |
| 99 | u32 frequency; |
| Olivier DANET | 46f73f9 | 2006-08-08 15:48:10 -0300 | [diff] [blame] | 100 | u16 if1_freq; |
| 101 | u8 fmfreq; |
| 102 | }; |
| 103 | |
| Patrick Boettcher | 4de2730 | 2006-04-17 13:22:15 -0300 | [diff] [blame] | 104 | #endif |