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Jingbiao Ludc9d8782018-01-31 16:35:04 +08001/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include "msm8937.dtsi"
15#include "sdm439-pm8953.dtsi"
Vaishnavi Kommaraju6e3a36d2018-03-12 11:20:20 +053016#include "sdm439-audio.dtsi"
Jingbiao Ludc9d8782018-01-31 16:35:04 +080017#include "sdm439-pmi632.dtsi"
18
Tirupathi Reddyb651b762018-03-20 10:49:34 +053019&pm8953_s5 {
20 regulator-min-microvolt = <1155000>;
21 regulator-max-microvolt = <1350000>;
22};
23
24&pm8953_s5_limit {
25 regulator-min-microvolt = <1155000>;
26 regulator-max-microvolt = <1350000>;
27};
28
Jingbiao Ludc9d8782018-01-31 16:35:04 +080029&soc {
Vijay kumar Tumati1f978772018-04-16 12:07:05 +053030 qcom,csiphy@1b34000 {
31 compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy";
32 };
33 qcom,csiphy@1b35000 {
34 compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy";
35 };
Vijay kumar Tumati10abc9b2018-03-15 16:25:23 +053036 qcom,csid@1b30000 {
Vijay kumar Tumati6dfea302018-03-23 16:17:51 +053037 qcom,mipi-csi-vdd-supply = <&pm8953_l2>;
Vijay kumar Tumati10abc9b2018-03-15 16:25:23 +053038 };
39 qcom,csid@1b30400 {
Vijay kumar Tumati6dfea302018-03-23 16:17:51 +053040 qcom,mipi-csi-vdd-supply = <&pm8953_l2>;
Vijay kumar Tumati10abc9b2018-03-15 16:25:23 +053041 };
42 qcom,csid@1b30800 {
Vijay kumar Tumati6dfea302018-03-23 16:17:51 +053043 qcom,mipi-csi-vdd-supply = <&pm8953_l2>;
Vijay kumar Tumati10abc9b2018-03-15 16:25:23 +053044 };
45
Jingbiao Ludc9d8782018-01-31 16:35:04 +080046 mem_acc_vreg_corner: regulator@01946004 {
47 compatible = "qcom,mem-acc-regulator";
48 regulator-name = "mem_acc_corner";
49 regulator-min-microvolt = <1>;
50 regulator-max-microvolt = <3>;
51
52 qcom,acc-reg-addr-list =
53 <0x01942138 0x01942130 0x01942120
54 0x01942124 0x01946000 0x01946004>;
55
56 qcom,acc-init-reg-config = <1 0xff>, <2 0x5555>, <6 0x55>;
57
58 qcom,num-acc-corners = <3>;
59 qcom,boot-acc-corner = <2>;
60 qcom,corner1-reg-config =
61 /* SVS+ => SVS+ */
62 <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
63 <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
64 /* SVS+ => NOM */
65 < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
66 <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
67 /* SVS+ => TURBO/NOM+ */
68 < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
69 < 3 0x0>, < 4 0x0>, < 5 0x0>;
70
71 qcom,corner2-reg-config =
72 /* NOM => SVS+ */
73 < 3 0x30c30c3>, < 4 0x30c3>, < 5 0x6060606>,
74 /* NOM => NOM */
75 <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
76 /* NOM => TURBO/NOM+ */
77 < 3 0x0>, < 4 0x0>, < 5 0x0>;
78
79 qcom,corner3-reg-config =
80 /* TURBO/NOM+ => SVS+ */
81 < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
82 < 3 0x30c30c3>, < 4 0x30c3>, < 5 0x6060606>,
83 /* TURBO/NOM+ => NOM */
84 < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
85 <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
86 /* TURBO/NOM+ => TURBO/NOM+ */
87 <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
88 <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>;
89 };
90
91 apc_vreg_corner: regulator@b018000 {
92 compatible = "qcom,cpr-regulator";
93 reg = <0xb018000 0x1000>, <0xb011064 4>, <0xa4000 0x1000>;
94 reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
95 interrupts = <0 15 0>;
96 regulator-name = "apc_corner";
97 regulator-min-microvolt = <1>;
98 regulator-max-microvolt = <7>;
99
100 qcom,cpr-fuse-corners = <3>;
101 qcom,cpr-voltage-ceiling = <1155000 1225000 1350000>;
102 qcom,cpr-voltage-floor = <1050000 1050000 1090000>;
103 vdd-apc-supply = <&pm8953_s5>;
104
105 mem-acc-supply = <&mem_acc_vreg_corner>;
106
107 qcom,cpr-ref-clk = <19200>;
108 qcom,cpr-timer-delay = <5000>;
109 qcom,cpr-timer-cons-up = <0>;
110 qcom,cpr-timer-cons-down = <2>;
111 qcom,cpr-irq-line = <0>;
112 qcom,cpr-step-quotient = <10>;
113 qcom,cpr-up-threshold = <2>;
114 qcom,cpr-down-threshold = <4>;
115 qcom,cpr-idle-clocks = <15>;
116 qcom,cpr-gcnt-time = <1>;
117 qcom,vdd-apc-step-up-limit = <1>;
118 qcom,vdd-apc-step-down-limit = <1>;
119 qcom,cpr-apc-volt-step = <5000>;
120
121 qcom,cpr-fuse-row = <67 0>;
122 qcom,cpr-fuse-target-quot = <42 24 6>;
123 qcom,cpr-fuse-ro-sel = <60 57 54>;
124 qcom,cpr-init-voltage-ref = <1155000 1225000 1350000>;
125 qcom,cpr-fuse-init-voltage =
126 <67 36 6 0>,
127 <67 18 6 0>,
128 <67 0 6 0>;
129 qcom,cpr-fuse-quot-offset =
130 <71 26 6 0>,
131 <71 20 6 0>,
132 <70 54 7 0>;
133 qcom,cpr-fuse-quot-offset-scale = <5 5 5>;
134 qcom,cpr-init-voltage-step = <10000>;
135 qcom,cpr-corner-map = <1 2 3 3 3 3 3>;
136 qcom,cpr-corner-frequency-map =
137 <1 960000000>,
138 <2 1094400000>,
139 <3 1209600000>,
140 <4 1248000000>,
141 <5 1344000000>,
142 <6 1401000000>,
143 <7 1497600000>;
144 qcom,speed-bin-fuse-sel = <37 34 3 0>;
145 qcom,cpr-speed-bin-max-corners =
146 <0 0 1 2 6>,
147 <1 0 1 2 7>,
148 <2 0 1 2 3>;
149 qcom,cpr-fuse-revision = <69 39 3 0>;
150 qcom,cpr-quot-adjust-scaling-factor-max = <0 1400 1400>;
151 qcom,cpr-voltage-scaling-factor-max = <0 2000 2000>;
152 qcom,cpr-scaled-init-voltage-as-ceiling;
153 qcom,cpr-fuse-version-map =
154 <0 (-1) 1 (-1) (-1) (-1)>,
155 <(-1) (-1) 2 (-1) (-1) (-1)>,
156 <(-1) (-1) 3 (-1) (-1) (-1)>,
157 <(-1) (-1) (-1) (-1) (-1) (-1)>;
158 qcom,cpr-quotient-adjustment =
159 <(-20) (-40) (-20)>,
160 <0 (-40) (20)>,
161 <0 0 (20)>,
162 <0 0 0>;
163 qcom,cpr-init-voltage-adjustment =
164 <0 0 0>,
165 <(10000) (15000) (20000)>,
166 <0 0 0>,
167 <0 0 0>;
168 qcom,cpr-enable;
169 };
Shefali Jain15f58d12018-03-02 11:18:17 +0530170
171 qcom,cpu-clock-8939@b111050 {
172 vdd-c0-supply = <&apc_vreg_corner>;
173 vdd-c1-supply = <&apc_vreg_corner>;
174 vdd-cci-supply = <&apc_vreg_corner>;
175 };
Jingbiao Ludc9d8782018-01-31 16:35:04 +0800176};
Rashi Bindra56dda4c2018-04-11 17:21:52 +0530177
178&mdss_dsi {
179 vdda-supply = <&pm8953_l2>;
180};