Heiko Stuebner | f75efdd | 2013-09-29 13:25:08 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013 MundoReader S.L. |
| 3 | * Author: Heiko Stuebner <heiko@sntech.de> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <dt-bindings/interrupt-controller/irq.h> |
| 17 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 18 | #include "skeleton.dtsi" |
| 19 | |
| 20 | / { |
| 21 | interrupt-parent = <&gic>; |
| 22 | |
Heiko Stuebner | 9cdffd8 | 2014-06-24 20:12:06 +0200 | [diff] [blame] | 23 | aliases { |
| 24 | i2c0 = &i2c0; |
| 25 | i2c1 = &i2c1; |
| 26 | i2c2 = &i2c2; |
| 27 | i2c3 = &i2c3; |
| 28 | i2c4 = &i2c4; |
Heiko Stuebner | 39c2bd7 | 2014-09-10 16:28:02 +0200 | [diff] [blame^] | 29 | spi0 = &spi0; |
| 30 | spi1 = &spi1; |
Heiko Stuebner | 9cdffd8 | 2014-06-24 20:12:06 +0200 | [diff] [blame] | 31 | }; |
| 32 | |
Heiko Stuebner | 560106c | 2014-04-15 19:44:59 +0200 | [diff] [blame] | 33 | xin24m: oscillator { |
| 34 | compatible = "fixed-clock"; |
| 35 | clock-frequency = <24000000>; |
| 36 | #clock-cells = <0>; |
| 37 | clock-output-names = "xin24m"; |
| 38 | }; |
| 39 | |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 40 | L2: l2-cache-controller@10138000 { |
| 41 | compatible = "arm,pl310-cache"; |
| 42 | reg = <0x10138000 0x1000>; |
| 43 | cache-unified; |
| 44 | cache-level = <2>; |
| 45 | }; |
| 46 | |
Heiko Stuebner | ff84b90 | 2014-07-26 23:28:03 +0200 | [diff] [blame] | 47 | scu@1013c000 { |
| 48 | compatible = "arm,cortex-a9-scu"; |
| 49 | reg = <0x1013c000 0x100>; |
| 50 | }; |
| 51 | |
Heiko Stuebner | e40b43d | 2014-07-26 18:53:07 +0200 | [diff] [blame] | 52 | global_timer: global-timer@1013c200 { |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 53 | compatible = "arm,cortex-a9-global-timer"; |
| 54 | reg = <0x1013c200 0x20>; |
| 55 | interrupts = <GIC_PPI 11 0x304>; |
| 56 | clocks = <&cru CORE_PERI>; |
| 57 | }; |
| 58 | |
Heiko Stuebner | e40b43d | 2014-07-26 18:53:07 +0200 | [diff] [blame] | 59 | local_timer: local-timer@1013c600 { |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 60 | compatible = "arm,cortex-a9-twd-timer"; |
| 61 | reg = <0x1013c600 0x20>; |
| 62 | interrupts = <GIC_PPI 13 0x304>; |
| 63 | clocks = <&cru CORE_PERI>; |
| 64 | }; |
| 65 | |
Heiko Stuebner | ff84b90 | 2014-07-26 23:28:03 +0200 | [diff] [blame] | 66 | gic: interrupt-controller@1013d000 { |
| 67 | compatible = "arm,cortex-a9-gic"; |
| 68 | interrupt-controller; |
| 69 | #interrupt-cells = <3>; |
| 70 | reg = <0x1013d000 0x1000>, |
| 71 | <0x1013c100 0x0100>; |
| 72 | }; |
| 73 | |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 74 | uart0: serial@10124000 { |
| 75 | compatible = "snps,dw-apb-uart"; |
| 76 | reg = <0x10124000 0x400>; |
| 77 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; |
| 78 | reg-shift = <2>; |
| 79 | reg-io-width = <1>; |
Heiko Stuebner | 69667ca | 2014-06-26 16:06:12 +0200 | [diff] [blame] | 80 | clock-names = "baudclk", "apb_pclk"; |
| 81 | clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 82 | status = "disabled"; |
| 83 | }; |
| 84 | |
| 85 | uart1: serial@10126000 { |
| 86 | compatible = "snps,dw-apb-uart"; |
| 87 | reg = <0x10126000 0x400>; |
| 88 | interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; |
| 89 | reg-shift = <2>; |
| 90 | reg-io-width = <1>; |
Heiko Stuebner | 69667ca | 2014-06-26 16:06:12 +0200 | [diff] [blame] | 91 | clock-names = "baudclk", "apb_pclk"; |
| 92 | clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 93 | status = "disabled"; |
| 94 | }; |
| 95 | |
Heiko Stuebner | fd14e6f | 2014-09-09 15:37:27 +0200 | [diff] [blame] | 96 | usb_otg: usb@10180000 { |
| 97 | compatible = "rockchip,rk3066-usb", "snps,dwc2"; |
| 98 | reg = <0x10180000 0x40000>; |
| 99 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| 100 | clocks = <&cru HCLK_OTG0>; |
| 101 | clock-names = "otg"; |
| 102 | status = "disabled"; |
| 103 | }; |
| 104 | |
| 105 | usb_host: usb@101c0000 { |
| 106 | compatible = "snps,dwc2"; |
| 107 | reg = <0x101c0000 0x40000>; |
| 108 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
| 109 | clocks = <&cru HCLK_OTG1>; |
| 110 | clock-names = "otg"; |
| 111 | status = "disabled"; |
| 112 | }; |
| 113 | |
Heiko Stuebner | e40b43d | 2014-07-26 18:53:07 +0200 | [diff] [blame] | 114 | mmc0: dwmmc@10214000 { |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 115 | compatible = "rockchip,rk2928-dw-mshc"; |
| 116 | reg = <0x10214000 0x1000>; |
| 117 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; |
Heiko Stuebner | f75efdd | 2013-09-29 13:25:08 +0200 | [diff] [blame] | 118 | #address-cells = <1>; |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 119 | #size-cells = <0>; |
Heiko Stuebner | f75efdd | 2013-09-29 13:25:08 +0200 | [diff] [blame] | 120 | |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 121 | clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; |
| 122 | clock-names = "biu", "ciu"; |
Heiko Stuebner | f6f70cf | 2013-06-17 21:28:57 +0200 | [diff] [blame] | 123 | |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 124 | status = "disabled"; |
| 125 | }; |
Heiko Stuebner | 46b8219 | 2013-06-17 22:17:16 +0200 | [diff] [blame] | 126 | |
Heiko Stuebner | e40b43d | 2014-07-26 18:53:07 +0200 | [diff] [blame] | 127 | mmc1: dwmmc@10218000 { |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 128 | compatible = "rockchip,rk2928-dw-mshc"; |
| 129 | reg = <0x10218000 0x1000>; |
| 130 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; |
| 131 | #address-cells = <1>; |
| 132 | #size-cells = <0>; |
Heiko Stuebner | 56f2b89 | 2014-04-29 22:02:52 +0200 | [diff] [blame] | 133 | |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 134 | clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>; |
| 135 | clock-names = "biu", "ciu"; |
Heiko Stuebner | f75efdd | 2013-09-29 13:25:08 +0200 | [diff] [blame] | 136 | |
Heiko Stuebner | c3030d3 | 2014-07-26 18:44:35 +0200 | [diff] [blame] | 137 | status = "disabled"; |
Heiko Stuebner | f75efdd | 2013-09-29 13:25:08 +0200 | [diff] [blame] | 138 | }; |
Heiko Stuebner | ff84b90 | 2014-07-26 23:28:03 +0200 | [diff] [blame] | 139 | |
| 140 | pmu: pmu@20004000 { |
| 141 | compatible = "rockchip,rk3066-pmu", "syscon"; |
| 142 | reg = <0x20004000 0x100>; |
| 143 | }; |
| 144 | |
| 145 | grf: grf@20008000 { |
| 146 | compatible = "syscon"; |
| 147 | reg = <0x20008000 0x200>; |
| 148 | }; |
| 149 | |
Heiko Stuebner | 9cdffd8 | 2014-06-24 20:12:06 +0200 | [diff] [blame] | 150 | i2c0: i2c@2002d000 { |
| 151 | compatible = "rockchip,rk3066-i2c"; |
| 152 | reg = <0x2002d000 0x1000>; |
| 153 | interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
| 154 | #address-cells = <1>; |
| 155 | #size-cells = <0>; |
| 156 | |
| 157 | rockchip,grf = <&grf>; |
Heiko Stuebner | 9cdffd8 | 2014-06-24 20:12:06 +0200 | [diff] [blame] | 158 | |
| 159 | clock-names = "i2c"; |
| 160 | clocks = <&cru PCLK_I2C0>; |
| 161 | |
| 162 | status = "disabled"; |
| 163 | }; |
| 164 | |
| 165 | i2c1: i2c@2002f000 { |
| 166 | compatible = "rockchip,rk3066-i2c"; |
| 167 | reg = <0x2002f000 0x1000>; |
| 168 | interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; |
| 169 | #address-cells = <1>; |
| 170 | #size-cells = <0>; |
| 171 | |
| 172 | rockchip,grf = <&grf>; |
| 173 | |
| 174 | clocks = <&cru PCLK_I2C1>; |
| 175 | clock-names = "i2c"; |
| 176 | |
| 177 | status = "disabled"; |
| 178 | }; |
| 179 | |
Beniamino Galvani | 550c7f4 | 2014-06-26 20:03:41 +0200 | [diff] [blame] | 180 | pwm0: pwm@20030000 { |
| 181 | compatible = "rockchip,rk2928-pwm"; |
| 182 | reg = <0x20030000 0x10>; |
| 183 | #pwm-cells = <2>; |
| 184 | clocks = <&cru PCLK_PWM01>; |
| 185 | status = "disabled"; |
| 186 | }; |
| 187 | |
| 188 | pwm1: pwm@20030010 { |
| 189 | compatible = "rockchip,rk2928-pwm"; |
| 190 | reg = <0x20030010 0x10>; |
| 191 | #pwm-cells = <2>; |
| 192 | clocks = <&cru PCLK_PWM01>; |
| 193 | status = "disabled"; |
| 194 | }; |
| 195 | |
Heiko Stuebner | eb2b9d4 | 2014-07-30 10:16:17 +0200 | [diff] [blame] | 196 | wdt: watchdog@2004c000 { |
| 197 | compatible = "snps,dw-wdt"; |
| 198 | reg = <0x2004c000 0x100>; |
| 199 | clocks = <&cru PCLK_WDT>; |
| 200 | interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; |
| 201 | status = "disabled"; |
| 202 | }; |
| 203 | |
Beniamino Galvani | 550c7f4 | 2014-06-26 20:03:41 +0200 | [diff] [blame] | 204 | pwm2: pwm@20050020 { |
| 205 | compatible = "rockchip,rk2928-pwm"; |
| 206 | reg = <0x20050020 0x10>; |
| 207 | #pwm-cells = <2>; |
| 208 | clocks = <&cru PCLK_PWM23>; |
| 209 | status = "disabled"; |
| 210 | }; |
| 211 | |
| 212 | pwm3: pwm@20050030 { |
| 213 | compatible = "rockchip,rk2928-pwm"; |
| 214 | reg = <0x20050030 0x10>; |
| 215 | #pwm-cells = <2>; |
| 216 | clocks = <&cru PCLK_PWM23>; |
| 217 | status = "disabled"; |
| 218 | }; |
| 219 | |
Heiko Stuebner | 9cdffd8 | 2014-06-24 20:12:06 +0200 | [diff] [blame] | 220 | i2c2: i2c@20056000 { |
| 221 | compatible = "rockchip,rk3066-i2c"; |
| 222 | reg = <0x20056000 0x1000>; |
| 223 | interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; |
| 224 | #address-cells = <1>; |
| 225 | #size-cells = <0>; |
| 226 | |
| 227 | rockchip,grf = <&grf>; |
| 228 | |
| 229 | clocks = <&cru PCLK_I2C2>; |
| 230 | clock-names = "i2c"; |
| 231 | |
| 232 | status = "disabled"; |
| 233 | }; |
| 234 | |
| 235 | i2c3: i2c@2005a000 { |
| 236 | compatible = "rockchip,rk3066-i2c"; |
| 237 | reg = <0x2005a000 0x1000>; |
| 238 | interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; |
| 239 | #address-cells = <1>; |
| 240 | #size-cells = <0>; |
| 241 | |
| 242 | rockchip,grf = <&grf>; |
| 243 | |
| 244 | clocks = <&cru PCLK_I2C3>; |
| 245 | clock-names = "i2c"; |
| 246 | |
| 247 | status = "disabled"; |
| 248 | }; |
| 249 | |
| 250 | i2c4: i2c@2005e000 { |
| 251 | compatible = "rockchip,rk3066-i2c"; |
| 252 | reg = <0x2005e000 0x1000>; |
| 253 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; |
| 254 | #address-cells = <1>; |
| 255 | #size-cells = <0>; |
| 256 | |
| 257 | rockchip,grf = <&grf>; |
| 258 | |
| 259 | clocks = <&cru PCLK_I2C4>; |
| 260 | clock-names = "i2c"; |
| 261 | |
| 262 | status = "disabled"; |
| 263 | }; |
| 264 | |
Heiko Stuebner | ff84b90 | 2014-07-26 23:28:03 +0200 | [diff] [blame] | 265 | uart2: serial@20064000 { |
| 266 | compatible = "snps,dw-apb-uart"; |
| 267 | reg = <0x20064000 0x400>; |
| 268 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; |
| 269 | reg-shift = <2>; |
| 270 | reg-io-width = <1>; |
Heiko Stuebner | 69667ca | 2014-06-26 16:06:12 +0200 | [diff] [blame] | 271 | clock-names = "baudclk", "apb_pclk"; |
| 272 | clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; |
Heiko Stuebner | ff84b90 | 2014-07-26 23:28:03 +0200 | [diff] [blame] | 273 | status = "disabled"; |
| 274 | }; |
| 275 | |
| 276 | uart3: serial@20068000 { |
| 277 | compatible = "snps,dw-apb-uart"; |
| 278 | reg = <0x20068000 0x400>; |
| 279 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; |
| 280 | reg-shift = <2>; |
| 281 | reg-io-width = <1>; |
Heiko Stuebner | 69667ca | 2014-06-26 16:06:12 +0200 | [diff] [blame] | 282 | clock-names = "baudclk", "apb_pclk"; |
| 283 | clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; |
Heiko Stuebner | ff84b90 | 2014-07-26 23:28:03 +0200 | [diff] [blame] | 284 | status = "disabled"; |
| 285 | }; |
Heiko Stübner | f23a617 | 2014-08-20 21:09:24 +0200 | [diff] [blame] | 286 | |
| 287 | saradc: saradc@2006c000 { |
| 288 | compatible = "rockchip,saradc"; |
| 289 | reg = <0x2006c000 0x100>; |
| 290 | interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
| 291 | #io-channel-cells = <1>; |
| 292 | clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; |
| 293 | clock-names = "saradc", "apb_pclk"; |
| 294 | status = "disabled"; |
| 295 | }; |
Heiko Stuebner | 39c2bd7 | 2014-09-10 16:28:02 +0200 | [diff] [blame^] | 296 | |
| 297 | spi0: spi@20070000 { |
| 298 | compatible = "rockchip,rk3066-spi"; |
| 299 | clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; |
| 300 | clock-names = "spiclk", "apb_pclk"; |
| 301 | interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; |
| 302 | reg = <0x20070000 0x1000>; |
| 303 | #address-cells = <1>; |
| 304 | #size-cells = <0>; |
| 305 | status = "disabled"; |
| 306 | }; |
| 307 | |
| 308 | spi1: spi@20074000 { |
| 309 | compatible = "rockchip,rk3066-spi"; |
| 310 | clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; |
| 311 | clock-names = "spiclk", "apb_pclk"; |
| 312 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; |
| 313 | reg = <0x20074000 0x1000>; |
| 314 | #address-cells = <1>; |
| 315 | #size-cells = <0>; |
| 316 | status = "disabled"; |
| 317 | }; |
Heiko Stuebner | f75efdd | 2013-09-29 13:25:08 +0200 | [diff] [blame] | 318 | }; |