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Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -06001/*
2 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
3 *
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +03004 * Copyright (C) 2009 - 2011 Texas Instruments
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -06005 *
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +03006 * Author: Misael Lopez Cruz <misael.lopez@ti.com>
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -06007 * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
8 * Margarita Olaya <magi.olaya@ti.com>
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +03009 * Peter Ujfalusi <peter.ujfalusi@ti.com>
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -060010 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 * 02110-1301 USA
24 *
25 */
26
27#include <linux/init.h>
28#include <linux/module.h>
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +030029#include <linux/platform_device.h>
30#include <linux/interrupt.h>
31#include <linux/err.h>
32#include <linux/io.h>
33#include <linux/irq.h>
34#include <linux/slab.h>
35#include <linux/pm_runtime.h>
Peter Ujfalusi7cb8a1b2011-11-15 11:32:14 +020036#include <linux/of_device.h>
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +030037
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -060038#include <sound/core.h>
39#include <sound/pcm.h>
40#include <sound/pcm_params.h>
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -060041#include <sound/soc.h>
Lars-Peter Clausen09ae3aa2013-04-03 11:06:05 +020042#include <sound/dmaengine_pcm.h>
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -060043
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +030044#include "omap-mcpdm.h"
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -060045
Peter Ujfalusi62376632013-03-20 10:47:12 +010046struct mcpdm_link_config {
47 u32 link_mask; /* channel mask for the direction */
48 u32 threshold; /* FIFO threshold */
49};
Tony Lindgrendbc04162012-08-31 10:59:07 -070050
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +030051struct omap_mcpdm {
52 struct device *dev;
53 unsigned long phys_base;
54 void __iomem *io_base;
55 int irq;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -060056
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +030057 struct mutex mutex;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -060058
Peter Ujfalusi62376632013-03-20 10:47:12 +010059 /* Playback/Capture configuration */
60 struct mcpdm_link_config config[2];
Peter Ujfalusi89b0d552011-09-26 16:05:58 +030061
62 /* McPDM dn offsets for rx1, and 2 channels */
63 u32 dn_rx_offset;
Peter Ujfalusi81054b22013-03-20 10:47:13 +010064
65 /* McPDM needs to be restarted due to runtime reconfiguration */
66 bool restart;
Lars-Peter Clausen09ae3aa2013-04-03 11:06:05 +020067
68 struct snd_dmaengine_dai_dma_data dma_data[2];
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -060069};
70
71/*
72 * Stream DMA parameters
73 */
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -060074
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +030075static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
76{
77 __raw_writel(val, mcpdm->io_base + reg);
78}
79
80static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
81{
82 return __raw_readl(mcpdm->io_base + reg);
83}
84
85#ifdef DEBUG
86static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
87{
88 dev_dbg(mcpdm->dev, "***********************\n");
89 dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
90 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
91 dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
92 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
93 dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
94 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
95 dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
96 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
97 dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
98 omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
99 dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
100 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
101 dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
102 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
103 dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
104 omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
105 dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
106 omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
107 dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
108 omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
109 dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
110 omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
111 dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
112 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
113 dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
114 omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
115 dev_dbg(mcpdm->dev, "***********************\n");
116}
117#else
118static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
119#endif
120
121/*
122 * Enables the transfer through the PDM interface to/from the Phoenix
123 * codec by enabling the corresponding UP or DN channels.
124 */
125static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
126{
127 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
Peter Ujfalusi62376632013-03-20 10:47:12 +0100128 u32 link_mask = mcpdm->config[0].link_mask | mcpdm->config[1].link_mask;
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300129
130 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
131 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
132
Peter Ujfalusi62376632013-03-20 10:47:12 +0100133 ctrl |= link_mask;
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300134 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
135
136 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
137 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
138}
139
140/*
141 * Disables the transfer through the PDM interface to/from the Phoenix
142 * codec by disabling the corresponding UP or DN channels.
143 */
144static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
145{
146 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
Peter Ujfalusi81054b22013-03-20 10:47:13 +0100147 u32 link_mask = MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK;
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300148
149 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
150 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
151
Peter Ujfalusi62376632013-03-20 10:47:12 +0100152 ctrl &= ~(link_mask);
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300153 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
154
155 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
156 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
157
158}
159
160/*
161 * Is the physical McPDM interface active.
162 */
163static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
164{
165 return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
166 (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
167}
168
169/*
170 * Configures McPDM uplink, and downlink for audio.
171 * This function should be called before omap_mcpdm_start.
172 */
173static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
174{
175 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
176 MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
177 MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
178
Peter Ujfalusi89b0d552011-09-26 16:05:58 +0300179 /* Enable DN RX1/2 offset cancellation feature, if configured */
180 if (mcpdm->dn_rx_offset) {
181 u32 dn_offset = mcpdm->dn_rx_offset;
182
183 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
184 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
185 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
186 }
187
Peter Ujfalusi62376632013-03-20 10:47:12 +0100188 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN,
189 mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold);
190 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP,
191 mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold);
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300192
193 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
194 MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
195}
196
197/*
198 * Cleans McPDM uplink, and downlink configuration.
199 * This function should be called when the stream is closed.
200 */
201static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
202{
203 /* Disable irq request generation for downlink */
204 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
205 MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
206
207 /* Disable DMA request generation for downlink */
208 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
209
210 /* Disable irq request generation for uplink */
211 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
212 MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
213
214 /* Disable DMA request generation for uplink */
215 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
Peter Ujfalusi89b0d552011-09-26 16:05:58 +0300216
217 /* Disable RX1/2 offset cancellation */
218 if (mcpdm->dn_rx_offset)
219 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300220}
221
222static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
223{
224 struct omap_mcpdm *mcpdm = dev_id;
225 int irq_status;
226
227 irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
228
229 /* Acknowledge irq event */
230 omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
231
232 if (irq_status & MCPDM_DN_IRQ_FULL)
233 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
234
235 if (irq_status & MCPDM_DN_IRQ_EMPTY)
236 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
237
238 if (irq_status & MCPDM_DN_IRQ)
239 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
240
241 if (irq_status & MCPDM_UP_IRQ_FULL)
242 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
243
244 if (irq_status & MCPDM_UP_IRQ_EMPTY)
245 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
246
247 if (irq_status & MCPDM_UP_IRQ)
248 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
249
250 return IRQ_HANDLED;
251}
252
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600253static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
254 struct snd_soc_dai *dai)
255{
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300256 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600257
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300258 mutex_lock(&mcpdm->mutex);
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600259
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300260 if (!dai->active) {
Peter Ujfalusi68214d92012-10-04 11:27:16 +0300261 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300262
Peter Ujfalusi68214d92012-10-04 11:27:16 +0300263 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl | MCPDM_WD_EN);
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300264 omap_mcpdm_open_streams(mcpdm);
265 }
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300266 mutex_unlock(&mcpdm->mutex);
267
Peter Ujfalusibcd6da72012-09-14 15:05:57 +0300268 snd_soc_dai_set_dma_data(dai, substream,
Lars-Peter Clausen09ae3aa2013-04-03 11:06:05 +0200269 &mcpdm->dma_data[substream->stream]);
Peter Ujfalusibcd6da72012-09-14 15:05:57 +0300270
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300271 return 0;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600272}
273
274static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600275 struct snd_soc_dai *dai)
276{
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300277 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600278
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300279 mutex_lock(&mcpdm->mutex);
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600280
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300281 if (!dai->active) {
282 if (omap_mcpdm_active(mcpdm)) {
283 omap_mcpdm_stop(mcpdm);
284 omap_mcpdm_close_streams(mcpdm);
Peter Ujfalusi81054b22013-03-20 10:47:13 +0100285 mcpdm->config[0].link_mask = 0;
286 mcpdm->config[1].link_mask = 0;
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300287 }
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600288 }
289
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300290 mutex_unlock(&mcpdm->mutex);
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600291}
292
293static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
294 struct snd_pcm_hw_params *params,
295 struct snd_soc_dai *dai)
296{
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300297 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600298 int stream = substream->stream;
Lars-Peter Clausen09ae3aa2013-04-03 11:06:05 +0200299 struct snd_dmaengine_dai_dma_data *dma_data;
Peter Ujfalusi62376632013-03-20 10:47:12 +0100300 u32 threshold;
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300301 int channels;
302 int link_mask = 0;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600303
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600304 channels = params_channels(params);
305 switch (channels) {
Peter Ujfalusi3b5b516f2011-09-23 09:49:43 +0300306 case 5:
307 if (stream == SNDRV_PCM_STREAM_CAPTURE)
308 /* up to 3 channels for capture */
309 return -EINVAL;
310 link_mask |= 1 << 4;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600311 case 4:
312 if (stream == SNDRV_PCM_STREAM_CAPTURE)
Peter Ujfalusi3b5b516f2011-09-23 09:49:43 +0300313 /* up to 3 channels for capture */
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600314 return -EINVAL;
315 link_mask |= 1 << 3;
316 case 3:
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600317 link_mask |= 1 << 2;
318 case 2:
319 link_mask |= 1 << 1;
320 case 1:
321 link_mask |= 1 << 0;
322 break;
323 default:
324 /* unsupported number of channels */
325 return -EINVAL;
326 }
327
Peter Ujfalusibcd6da72012-09-14 15:05:57 +0300328 dma_data = snd_soc_dai_get_dma_data(dai, substream);
Peter Ujfalusib199adf2011-08-02 13:35:30 +0300329
Peter Ujfalusi62376632013-03-20 10:47:12 +0100330 threshold = mcpdm->config[stream].threshold;
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300331 /* Configure McPDM channels, and DMA packet size */
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600332 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
Peter Ujfalusi62376632013-03-20 10:47:12 +0100333 link_mask <<= 3;
Peter Ujfalusi81054b22013-03-20 10:47:13 +0100334
335 /* If capture is not running assume a stereo stream to come */
336 if (!mcpdm->config[!stream].link_mask)
337 mcpdm->config[!stream].link_mask = 0x3;
338
Lars-Peter Clausen09ae3aa2013-04-03 11:06:05 +0200339 dma_data->maxburst =
Peter Ujfalusi62376632013-03-20 10:47:12 +0100340 (MCPDM_DN_THRES_MAX - threshold) * channels;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600341 } else {
Peter Ujfalusi81054b22013-03-20 10:47:13 +0100342 /* If playback is not running assume a stereo stream to come */
343 if (!mcpdm->config[!stream].link_mask)
344 mcpdm->config[!stream].link_mask = (0x3 << 3);
345
Lars-Peter Clausen09ae3aa2013-04-03 11:06:05 +0200346 dma_data->maxburst = threshold * channels;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600347 }
348
Peter Ujfalusi81054b22013-03-20 10:47:13 +0100349 /* Check if we need to restart McPDM with this stream */
350 if (mcpdm->config[stream].link_mask &&
351 mcpdm->config[stream].link_mask != link_mask)
352 mcpdm->restart = true;
353
Peter Ujfalusi62376632013-03-20 10:47:12 +0100354 mcpdm->config[stream].link_mask = link_mask;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600355
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300356 return 0;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600357}
358
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300359static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600360 struct snd_soc_dai *dai)
361{
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300362 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600363
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300364 if (!omap_mcpdm_active(mcpdm)) {
365 omap_mcpdm_start(mcpdm);
366 omap_mcpdm_reg_dump(mcpdm);
Peter Ujfalusi81054b22013-03-20 10:47:13 +0100367 } else if (mcpdm->restart) {
368 omap_mcpdm_stop(mcpdm);
369 omap_mcpdm_start(mcpdm);
370 mcpdm->restart = false;
371 omap_mcpdm_reg_dump(mcpdm);
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300372 }
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600373
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300374 return 0;
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600375}
376
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100377static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600378 .startup = omap_mcpdm_dai_startup,
379 .shutdown = omap_mcpdm_dai_shutdown,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600380 .hw_params = omap_mcpdm_dai_hw_params,
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300381 .prepare = omap_mcpdm_prepare,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600382};
383
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300384static int omap_mcpdm_probe(struct snd_soc_dai *dai)
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000385{
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300386 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
387 int ret;
388
389 pm_runtime_enable(mcpdm->dev);
390
391 /* Disable lines while request is ongoing */
392 pm_runtime_get_sync(mcpdm->dev);
393 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
394
Sebastien Guiriecddd17532013-02-13 08:21:54 +0100395 ret = devm_request_irq(mcpdm->dev, mcpdm->irq, omap_mcpdm_irq_handler,
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300396 0, "McPDM", (void *)mcpdm);
397
398 pm_runtime_put_sync(mcpdm->dev);
399
400 if (ret) {
401 dev_err(mcpdm->dev, "Request for IRQ failed\n");
402 pm_runtime_disable(mcpdm->dev);
403 }
404
405 /* Configure McPDM threshold values */
Peter Ujfalusi62376632013-03-20 10:47:12 +0100406 mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold = 2;
407 mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold =
408 MCPDM_UP_THRES_MAX - 3;
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300409 return ret;
410}
411
412static int omap_mcpdm_remove(struct snd_soc_dai *dai)
413{
414 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
415
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300416 pm_runtime_disable(mcpdm->dev);
417
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000418 return 0;
419}
420
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300421#define OMAP_MCPDM_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
422#define OMAP_MCPDM_FORMATS SNDRV_PCM_FMTBIT_S32_LE
423
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000424static struct snd_soc_dai_driver omap_mcpdm_dai = {
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300425 .probe = omap_mcpdm_probe,
426 .remove = omap_mcpdm_remove,
427 .probe_order = SND_SOC_COMP_ORDER_LATE,
428 .remove_order = SND_SOC_COMP_ORDER_EARLY,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600429 .playback = {
430 .channels_min = 1,
Peter Ujfalusi3b5b516f2011-09-23 09:49:43 +0300431 .channels_max = 5,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600432 .rates = OMAP_MCPDM_RATES,
433 .formats = OMAP_MCPDM_FORMATS,
Peter Ujfalusib4badd42012-01-18 12:18:24 +0100434 .sig_bits = 24,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600435 },
436 .capture = {
437 .channels_min = 1,
Peter Ujfalusi3b5b516f2011-09-23 09:49:43 +0300438 .channels_max = 3,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600439 .rates = OMAP_MCPDM_RATES,
440 .formats = OMAP_MCPDM_FORMATS,
Peter Ujfalusib4badd42012-01-18 12:18:24 +0100441 .sig_bits = 24,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600442 },
443 .ops = &omap_mcpdm_dai_ops,
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600444};
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000445
Kuninori Morimoto58709a32013-03-21 03:33:37 -0700446static const struct snd_soc_component_driver omap_mcpdm_component = {
447 .name = "omap-mcpdm",
448};
449
Peter Ujfalusi89b0d552011-09-26 16:05:58 +0300450void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
451 u8 rx1, u8 rx2)
452{
453 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
454
455 mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
456}
457EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
458
Bill Pemberton7ff60002012-12-07 09:26:29 -0500459static int asoc_mcpdm_probe(struct platform_device *pdev)
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000460{
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300461 struct omap_mcpdm *mcpdm;
462 struct resource *res;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000463
Peter Ujfalusid77ae332012-07-23 12:39:51 +0300464 mcpdm = devm_kzalloc(&pdev->dev, sizeof(struct omap_mcpdm), GFP_KERNEL);
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300465 if (!mcpdm)
466 return -ENOMEM;
467
468 platform_set_drvdata(pdev, mcpdm);
469
470 mutex_init(&mcpdm->mutex);
471
Peter Ujfalusi5a40c572012-09-14 15:05:54 +0300472 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
473 if (res == NULL)
474 return -ENOMEM;
475
Lars-Peter Clausen09ae3aa2013-04-03 11:06:05 +0200476 mcpdm->dma_data[0].addr = res->start + MCPDM_REG_DN_DATA;
477 mcpdm->dma_data[1].addr = res->start + MCPDM_REG_UP_DATA;
Peter Ujfalusi5a40c572012-09-14 15:05:54 +0300478
Peter Ujfalusia8035f02013-07-11 14:35:44 +0200479 mcpdm->dma_data[0].filter_data = "dn_link";
480 mcpdm->dma_data[1].filter_data = "up_link";
Peter Ujfalusi5a40c572012-09-14 15:05:54 +0300481
482 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
483 if (res == NULL)
484 return -ENOMEM;
485
Silviu-Mihai Popescu77c641d2013-03-11 17:58:57 +0200486 mcpdm->io_base = devm_ioremap_resource(&pdev->dev, res);
487 if (IS_ERR(mcpdm->io_base))
488 return PTR_ERR(mcpdm->io_base);
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300489
490 mcpdm->irq = platform_get_irq(pdev, 0);
Peter Ujfalusid77ae332012-07-23 12:39:51 +0300491 if (mcpdm->irq < 0)
492 return mcpdm->irq;
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300493
494 mcpdm->dev = &pdev->dev;
495
Kuninori Morimoto58709a32013-03-21 03:33:37 -0700496 return snd_soc_register_component(&pdev->dev, &omap_mcpdm_component,
497 &omap_mcpdm_dai, 1);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000498}
499
Bill Pemberton7ff60002012-12-07 09:26:29 -0500500static int asoc_mcpdm_remove(struct platform_device *pdev)
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000501{
Kuninori Morimoto58709a32013-03-21 03:33:37 -0700502 snd_soc_unregister_component(&pdev->dev);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000503 return 0;
504}
505
Peter Ujfalusi7cb8a1b2011-11-15 11:32:14 +0200506static const struct of_device_id omap_mcpdm_of_match[] = {
507 { .compatible = "ti,omap4-mcpdm", },
508 { }
509};
510MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
511
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000512static struct platform_driver asoc_mcpdm_driver = {
513 .driver = {
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300514 .name = "omap-mcpdm",
515 .owner = THIS_MODULE,
Peter Ujfalusi7cb8a1b2011-11-15 11:32:14 +0200516 .of_match_table = omap_mcpdm_of_match,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000517 },
518
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300519 .probe = asoc_mcpdm_probe,
Bill Pemberton7ff60002012-12-07 09:26:29 -0500520 .remove = asoc_mcpdm_remove,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000521};
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600522
Axel Linbeda5bf52011-11-25 10:12:16 +0800523module_platform_driver(asoc_mcpdm_driver);
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600524
Peter Ujfalusid66a5472012-07-06 12:19:10 +0200525MODULE_ALIAS("platform:omap-mcpdm");
Misael Lopez Cruzf5f9d7b2011-07-05 19:50:45 +0300526MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
Misael Lopez Cruzdb72c2f2010-02-22 15:09:22 -0600527MODULE_DESCRIPTION("OMAP PDM SoC Interface");
528MODULE_LICENSE("GPL");