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Naveen N. Rao156d0e22016-06-22 21:55:07 +05301/*
2 * bpf_jit_comp64.c: eBPF JIT compiler
3 *
4 * Copyright 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
5 * IBM Corporation
6 *
7 * Based on the powerpc classic BPF JIT compiler by Matt Evans
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2
12 * of the License.
13 */
14#include <linux/moduleloader.h>
15#include <asm/cacheflush.h>
16#include <linux/netdevice.h>
17#include <linux/filter.h>
18#include <linux/if_vlan.h>
19#include <asm/kprobes.h>
Naveen N. Raoce076142016-09-24 02:05:01 +053020#include <linux/bpf.h>
Naveen N. Rao156d0e22016-06-22 21:55:07 +053021
22#include "bpf_jit64.h"
23
24int bpf_jit_enable __read_mostly;
25
26static void bpf_jit_fill_ill_insns(void *area, unsigned int size)
27{
28 int *p = area;
29
30 /* Fill whole space with trap instructions */
31 while (p < (int *)((char *)area + size))
32 *p++ = BREAKPOINT_INSTRUCTION;
33}
34
35static inline void bpf_flush_icache(void *start, void *end)
36{
37 smp_wmb();
38 flush_icache_range((unsigned long)start, (unsigned long)end);
39}
40
41static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i)
42{
43 return (ctx->seen & (1 << (31 - b2p[i])));
44}
45
46static inline void bpf_set_seen_register(struct codegen_context *ctx, int i)
47{
48 ctx->seen |= (1 << (31 - b2p[i]));
49}
50
51static inline bool bpf_has_stack_frame(struct codegen_context *ctx)
52{
53 /*
54 * We only need a stack frame if:
55 * - we call other functions (kernel helpers), or
56 * - the bpf program uses its stack area
57 * The latter condition is deduced from the usage of BPF_REG_FP
58 */
59 return ctx->seen & SEEN_FUNC || bpf_is_seen_register(ctx, BPF_REG_FP);
60}
61
Naveen N. Rao7b847f52016-09-24 02:05:00 +053062/*
63 * When not setting up our own stackframe, the redzone usage is:
64 *
65 * [ prev sp ] <-------------
66 * [ ... ] |
67 * sp (r1) ---> [ stack pointer ] --------------
68 * [ nv gpr save area ] 8*8
69 * [ tail_call_cnt ] 8
70 * [ local_tmp_var ] 8
71 * [ unused red zone ] 208 bytes protected
72 */
73static int bpf_jit_stack_local(struct codegen_context *ctx)
74{
75 if (bpf_has_stack_frame(ctx))
76 return STACK_FRAME_MIN_SIZE + MAX_BPF_STACK;
77 else
78 return -(BPF_PPC_STACK_SAVE + 16);
79}
80
Naveen N. Raoce076142016-09-24 02:05:01 +053081static int bpf_jit_stack_tailcallcnt(struct codegen_context *ctx)
82{
83 return bpf_jit_stack_local(ctx) + 8;
84}
85
Naveen N. Rao7b847f52016-09-24 02:05:00 +053086static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg)
87{
88 if (reg >= BPF_PPC_NVR_MIN && reg < 32)
89 return (bpf_has_stack_frame(ctx) ? BPF_PPC_STACKFRAME : 0)
90 - (8 * (32 - reg));
91
92 pr_err("BPF JIT is asking about unknown registers");
93 BUG();
94}
95
Naveen N. Rao156d0e22016-06-22 21:55:07 +053096static void bpf_jit_emit_skb_loads(u32 *image, struct codegen_context *ctx)
97{
98 /*
99 * Load skb->len and skb->data_len
100 * r3 points to skb
101 */
102 PPC_LWZ(b2p[SKB_HLEN_REG], 3, offsetof(struct sk_buff, len));
103 PPC_LWZ(b2p[TMP_REG_1], 3, offsetof(struct sk_buff, data_len));
104 /* header_len = len - data_len */
105 PPC_SUB(b2p[SKB_HLEN_REG], b2p[SKB_HLEN_REG], b2p[TMP_REG_1]);
106
107 /* skb->data pointer */
108 PPC_BPF_LL(b2p[SKB_DATA_REG], 3, offsetof(struct sk_buff, data));
109}
110
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530111static void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)
112{
113 int i;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530114
Naveen N. Raoce076142016-09-24 02:05:01 +0530115 /*
116 * Initialize tail_call_cnt if we do tail calls.
117 * Otherwise, put in NOPs so that it can be skipped when we are
118 * invoked through a tail call.
119 */
120 if (ctx->seen & SEEN_TAILCALL) {
121 PPC_LI(b2p[TMP_REG_1], 0);
122 /* this goes in the redzone */
123 PPC_BPF_STL(b2p[TMP_REG_1], 1, -(BPF_PPC_STACK_SAVE + 8));
124 } else {
125 PPC_NOP();
126 PPC_NOP();
127 }
128
129#define BPF_TAILCALL_PROLOGUE_SIZE 8
130
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530131 if (bpf_has_stack_frame(ctx)) {
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530132 /*
133 * We need a stack frame, but we don't necessarily need to
134 * save/restore LR unless we call other functions
135 */
136 if (ctx->seen & SEEN_FUNC) {
137 EMIT(PPC_INST_MFLR | __PPC_RT(R0));
138 PPC_BPF_STL(0, 1, PPC_LR_STKOFF);
139 }
140
141 PPC_BPF_STLU(1, 1, -BPF_PPC_STACKFRAME);
142 }
143
144 /*
145 * Back up non-volatile regs -- BPF registers 6-10
146 * If we haven't created our own stack frame, we save these
147 * in the protected zone below the previous stack frame
148 */
149 for (i = BPF_REG_6; i <= BPF_REG_10; i++)
150 if (bpf_is_seen_register(ctx, i))
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530151 PPC_BPF_STL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530152
153 /*
154 * Save additional non-volatile regs if we cache skb
155 * Also, setup skb data
156 */
157 if (ctx->seen & SEEN_SKB) {
158 PPC_BPF_STL(b2p[SKB_HLEN_REG], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530159 bpf_jit_stack_offsetof(ctx, b2p[SKB_HLEN_REG]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530160 PPC_BPF_STL(b2p[SKB_DATA_REG], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530161 bpf_jit_stack_offsetof(ctx, b2p[SKB_DATA_REG]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530162 bpf_jit_emit_skb_loads(image, ctx);
163 }
164
165 /* Setup frame pointer to point to the bpf stack area */
166 if (bpf_is_seen_register(ctx, BPF_REG_FP))
167 PPC_ADDI(b2p[BPF_REG_FP], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530168 STACK_FRAME_MIN_SIZE + MAX_BPF_STACK);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530169}
170
Naveen N. Raoce076142016-09-24 02:05:01 +0530171static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx)
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530172{
173 int i;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530174
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530175 /* Restore NVRs */
176 for (i = BPF_REG_6; i <= BPF_REG_10; i++)
177 if (bpf_is_seen_register(ctx, i))
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530178 PPC_BPF_LL(b2p[i], 1, bpf_jit_stack_offsetof(ctx, b2p[i]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530179
180 /* Restore non-volatile registers used for skb cache */
181 if (ctx->seen & SEEN_SKB) {
182 PPC_BPF_LL(b2p[SKB_HLEN_REG], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530183 bpf_jit_stack_offsetof(ctx, b2p[SKB_HLEN_REG]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530184 PPC_BPF_LL(b2p[SKB_DATA_REG], 1,
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530185 bpf_jit_stack_offsetof(ctx, b2p[SKB_DATA_REG]));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530186 }
187
188 /* Tear down our stack frame */
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530189 if (bpf_has_stack_frame(ctx)) {
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530190 PPC_ADDI(1, 1, BPF_PPC_STACKFRAME);
191 if (ctx->seen & SEEN_FUNC) {
192 PPC_BPF_LL(0, 1, PPC_LR_STKOFF);
193 PPC_MTLR(0);
194 }
195 }
Naveen N. Raoce076142016-09-24 02:05:01 +0530196}
197
198static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
199{
200 bpf_jit_emit_common_epilogue(image, ctx);
201
202 /* Move result to r3 */
203 PPC_MR(3, b2p[BPF_REG_0]);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530204
205 PPC_BLR();
206}
207
Naveen N. Raoce076142016-09-24 02:05:01 +0530208static void bpf_jit_emit_func_call(u32 *image, struct codegen_context *ctx, u64 func)
209{
Sandipan Das0416be42018-05-24 12:26:46 +0530210 unsigned int i, ctx_idx = ctx->idx;
211
212 /* Load function address into r12 */
213 PPC_LI64(12, func);
214
215 /* For bpf-to-bpf function calls, the callee's address is unknown
216 * until the last extra pass. As seen above, we use PPC_LI64() to
217 * load the callee's address, but this may optimize the number of
218 * instructions required based on the nature of the address.
219 *
220 * Since we don't want the number of instructions emitted to change,
221 * we pad the optimized PPC_LI64() call with NOPs to guarantee that
222 * we always have a five-instruction sequence, which is the maximum
223 * that PPC_LI64() can emit.
224 */
225 for (i = ctx->idx - ctx_idx; i < 5; i++)
226 PPC_NOP();
227
Naveen N. Raoce076142016-09-24 02:05:01 +0530228#ifdef PPC64_ELF_ABI_v1
Naveen N. Raoce076142016-09-24 02:05:01 +0530229 /*
230 * Load TOC from function descriptor at offset 8.
231 * We can clobber r2 since we get called through a
232 * function pointer (so caller will save/restore r2)
233 * and since we don't use a TOC ourself.
234 */
Sandipan Das0416be42018-05-24 12:26:46 +0530235 PPC_BPF_LL(2, 12, 8);
236 /* Load actual entry point from function descriptor */
237 PPC_BPF_LL(12, 12, 0);
Naveen N. Raoce076142016-09-24 02:05:01 +0530238#endif
Sandipan Das0416be42018-05-24 12:26:46 +0530239
240 PPC_MTLR(12);
Naveen N. Raoce076142016-09-24 02:05:01 +0530241 PPC_BLRL();
242}
243
244static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 out)
245{
246 /*
247 * By now, the eBPF program has already setup parameters in r3, r4 and r5
248 * r3/BPF_REG_1 - pointer to ctx -- passed as is to the next bpf program
249 * r4/BPF_REG_2 - pointer to bpf_array
250 * r5/BPF_REG_3 - index in bpf_array
251 */
252 int b2p_bpf_array = b2p[BPF_REG_2];
253 int b2p_index = b2p[BPF_REG_3];
254
255 /*
256 * if (index >= array->map.max_entries)
257 * goto out;
258 */
259 PPC_LWZ(b2p[TMP_REG_1], b2p_bpf_array, offsetof(struct bpf_array, map.max_entries));
Daniel Borkmann2b70de42018-03-08 16:17:37 +0100260 PPC_RLWINM(b2p_index, b2p_index, 0, 0, 31);
Naveen N. Raoce076142016-09-24 02:05:01 +0530261 PPC_CMPLW(b2p_index, b2p[TMP_REG_1]);
262 PPC_BCC(COND_GE, out);
263
264 /*
265 * if (tail_call_cnt > MAX_TAIL_CALL_CNT)
266 * goto out;
267 */
Naveen N. Rao91f81cb2019-03-15 20:21:19 +0530268 PPC_BPF_LL(b2p[TMP_REG_1], 1, bpf_jit_stack_tailcallcnt(ctx));
Naveen N. Raoce076142016-09-24 02:05:01 +0530269 PPC_CMPLWI(b2p[TMP_REG_1], MAX_TAIL_CALL_CNT);
270 PPC_BCC(COND_GT, out);
271
272 /*
273 * tail_call_cnt++;
274 */
275 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1], 1);
276 PPC_BPF_STL(b2p[TMP_REG_1], 1, bpf_jit_stack_tailcallcnt(ctx));
277
278 /* prog = array->ptrs[index]; */
279 PPC_MULI(b2p[TMP_REG_1], b2p_index, 8);
280 PPC_ADD(b2p[TMP_REG_1], b2p[TMP_REG_1], b2p_bpf_array);
Naveen N. Rao91f81cb2019-03-15 20:21:19 +0530281 PPC_BPF_LL(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_array, ptrs));
Naveen N. Raoce076142016-09-24 02:05:01 +0530282
283 /*
284 * if (prog == NULL)
285 * goto out;
286 */
287 PPC_CMPLDI(b2p[TMP_REG_1], 0);
288 PPC_BCC(COND_EQ, out);
289
290 /* goto *(prog->bpf_func + prologue_size); */
Naveen N. Rao91f81cb2019-03-15 20:21:19 +0530291 PPC_BPF_LL(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_prog, bpf_func));
Naveen N. Raoce076142016-09-24 02:05:01 +0530292#ifdef PPC64_ELF_ABI_v1
293 /* skip past the function descriptor */
294 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1],
295 FUNCTION_DESCR_SIZE + BPF_TAILCALL_PROLOGUE_SIZE);
296#else
297 PPC_ADDI(b2p[TMP_REG_1], b2p[TMP_REG_1], BPF_TAILCALL_PROLOGUE_SIZE);
298#endif
299 PPC_MTCTR(b2p[TMP_REG_1]);
300
301 /* tear down stack, restore NVRs, ... */
302 bpf_jit_emit_common_epilogue(image, ctx);
303
304 PPC_BCTR();
305 /* out: */
306}
307
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530308/* Assemble the body code between the prologue & epilogue */
309static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
310 struct codegen_context *ctx,
311 u32 *addrs)
312{
313 const struct bpf_insn *insn = fp->insnsi;
314 int flen = fp->len;
315 int i;
316
317 /* Start of epilogue code - will only be valid 2nd pass onwards */
318 u32 exit_addr = addrs[flen];
319
320 for (i = 0; i < flen; i++) {
321 u32 code = insn[i].code;
322 u32 dst_reg = b2p[insn[i].dst_reg];
323 u32 src_reg = b2p[insn[i].src_reg];
324 s16 off = insn[i].off;
325 s32 imm = insn[i].imm;
326 u64 imm64;
327 u8 *func;
328 u32 true_cond;
Daniel Borkmann6e9261a2018-07-19 18:18:35 +0200329 u32 tmp_idx;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530330
331 /*
332 * addrs[] maps a BPF bytecode address into a real offset from
333 * the start of the body code.
334 */
335 addrs[i] = ctx->idx * 4;
336
337 /*
338 * As an optimization, we note down which non-volatile registers
339 * are used so that we can only save/restore those in our
340 * prologue and epilogue. We do this here regardless of whether
341 * the actual BPF instruction uses src/dst registers or not
342 * (for instance, BPF_CALL does not use them). The expectation
343 * is that those instructions will have src_reg/dst_reg set to
344 * 0. Even otherwise, we just lose some prologue/epilogue
345 * optimization but everything else should work without
346 * any issues.
347 */
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530348 if (dst_reg >= BPF_PPC_NVR_MIN && dst_reg < 32)
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530349 bpf_set_seen_register(ctx, insn[i].dst_reg);
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530350 if (src_reg >= BPF_PPC_NVR_MIN && src_reg < 32)
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530351 bpf_set_seen_register(ctx, insn[i].src_reg);
352
353 switch (code) {
354 /*
355 * Arithmetic operations: ADD/SUB/MUL/DIV/MOD/NEG
356 */
357 case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */
358 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */
359 PPC_ADD(dst_reg, dst_reg, src_reg);
360 goto bpf_alu32_trunc;
361 case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */
362 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */
363 PPC_SUB(dst_reg, dst_reg, src_reg);
364 goto bpf_alu32_trunc;
365 case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */
366 case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */
367 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */
368 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */
369 if (BPF_OP(code) == BPF_SUB)
370 imm = -imm;
371 if (imm) {
372 if (imm >= -32768 && imm < 32768)
373 PPC_ADDI(dst_reg, dst_reg, IMM_L(imm));
374 else {
375 PPC_LI32(b2p[TMP_REG_1], imm);
376 PPC_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]);
377 }
378 }
379 goto bpf_alu32_trunc;
380 case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */
381 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst *= src */
382 if (BPF_CLASS(code) == BPF_ALU)
383 PPC_MULW(dst_reg, dst_reg, src_reg);
384 else
385 PPC_MULD(dst_reg, dst_reg, src_reg);
386 goto bpf_alu32_trunc;
387 case BPF_ALU | BPF_MUL | BPF_K: /* (u32) dst *= (u32) imm */
388 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst *= imm */
389 if (imm >= -32768 && imm < 32768)
390 PPC_MULI(dst_reg, dst_reg, IMM_L(imm));
391 else {
392 PPC_LI32(b2p[TMP_REG_1], imm);
393 if (BPF_CLASS(code) == BPF_ALU)
394 PPC_MULW(dst_reg, dst_reg,
395 b2p[TMP_REG_1]);
396 else
397 PPC_MULD(dst_reg, dst_reg,
398 b2p[TMP_REG_1]);
399 }
400 goto bpf_alu32_trunc;
401 case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */
402 case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */
403 PPC_CMPWI(src_reg, 0);
404 PPC_BCC_SHORT(COND_NE, (ctx->idx * 4) + 12);
405 PPC_LI(b2p[BPF_REG_0], 0);
406 PPC_JMP(exit_addr);
407 if (BPF_OP(code) == BPF_MOD) {
408 PPC_DIVWU(b2p[TMP_REG_1], dst_reg, src_reg);
409 PPC_MULW(b2p[TMP_REG_1], src_reg,
410 b2p[TMP_REG_1]);
411 PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]);
412 } else
413 PPC_DIVWU(dst_reg, dst_reg, src_reg);
414 goto bpf_alu32_trunc;
415 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */
416 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */
417 PPC_CMPDI(src_reg, 0);
418 PPC_BCC_SHORT(COND_NE, (ctx->idx * 4) + 12);
419 PPC_LI(b2p[BPF_REG_0], 0);
420 PPC_JMP(exit_addr);
421 if (BPF_OP(code) == BPF_MOD) {
Naveen N. Raoe90a7ec2019-06-13 00:21:40 +0530422 PPC_DIVDU(b2p[TMP_REG_1], dst_reg, src_reg);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530423 PPC_MULD(b2p[TMP_REG_1], src_reg,
424 b2p[TMP_REG_1]);
425 PPC_SUB(dst_reg, dst_reg, b2p[TMP_REG_1]);
426 } else
Naveen N. Raoe90a7ec2019-06-13 00:21:40 +0530427 PPC_DIVDU(dst_reg, dst_reg, src_reg);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530428 break;
429 case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */
430 case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */
431 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst %= imm */
432 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */
433 if (imm == 0)
434 return -EINVAL;
435 else if (imm == 1)
436 goto bpf_alu32_trunc;
437
438 PPC_LI32(b2p[TMP_REG_1], imm);
439 switch (BPF_CLASS(code)) {
440 case BPF_ALU:
441 if (BPF_OP(code) == BPF_MOD) {
442 PPC_DIVWU(b2p[TMP_REG_2], dst_reg,
443 b2p[TMP_REG_1]);
444 PPC_MULW(b2p[TMP_REG_1],
445 b2p[TMP_REG_1],
446 b2p[TMP_REG_2]);
447 PPC_SUB(dst_reg, dst_reg,
448 b2p[TMP_REG_1]);
449 } else
450 PPC_DIVWU(dst_reg, dst_reg,
451 b2p[TMP_REG_1]);
452 break;
453 case BPF_ALU64:
454 if (BPF_OP(code) == BPF_MOD) {
Naveen N. Raoe90a7ec2019-06-13 00:21:40 +0530455 PPC_DIVDU(b2p[TMP_REG_2], dst_reg,
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530456 b2p[TMP_REG_1]);
457 PPC_MULD(b2p[TMP_REG_1],
458 b2p[TMP_REG_1],
459 b2p[TMP_REG_2]);
460 PPC_SUB(dst_reg, dst_reg,
461 b2p[TMP_REG_1]);
462 } else
Naveen N. Raoe90a7ec2019-06-13 00:21:40 +0530463 PPC_DIVDU(dst_reg, dst_reg,
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530464 b2p[TMP_REG_1]);
465 break;
466 }
467 goto bpf_alu32_trunc;
468 case BPF_ALU | BPF_NEG: /* (u32) dst = -dst */
469 case BPF_ALU64 | BPF_NEG: /* dst = -dst */
470 PPC_NEG(dst_reg, dst_reg);
471 goto bpf_alu32_trunc;
472
473 /*
474 * Logical operations: AND/OR/XOR/[A]LSH/[A]RSH
475 */
476 case BPF_ALU | BPF_AND | BPF_X: /* (u32) dst = dst & src */
477 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
478 PPC_AND(dst_reg, dst_reg, src_reg);
479 goto bpf_alu32_trunc;
480 case BPF_ALU | BPF_AND | BPF_K: /* (u32) dst = dst & imm */
481 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
482 if (!IMM_H(imm))
483 PPC_ANDI(dst_reg, dst_reg, IMM_L(imm));
484 else {
485 /* Sign-extended */
486 PPC_LI32(b2p[TMP_REG_1], imm);
487 PPC_AND(dst_reg, dst_reg, b2p[TMP_REG_1]);
488 }
489 goto bpf_alu32_trunc;
490 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
491 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
492 PPC_OR(dst_reg, dst_reg, src_reg);
493 goto bpf_alu32_trunc;
494 case BPF_ALU | BPF_OR | BPF_K:/* dst = (u32) dst | (u32) imm */
495 case BPF_ALU64 | BPF_OR | BPF_K:/* dst = dst | imm */
496 if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) {
497 /* Sign-extended */
498 PPC_LI32(b2p[TMP_REG_1], imm);
499 PPC_OR(dst_reg, dst_reg, b2p[TMP_REG_1]);
500 } else {
501 if (IMM_L(imm))
502 PPC_ORI(dst_reg, dst_reg, IMM_L(imm));
503 if (IMM_H(imm))
504 PPC_ORIS(dst_reg, dst_reg, IMM_H(imm));
505 }
506 goto bpf_alu32_trunc;
507 case BPF_ALU | BPF_XOR | BPF_X: /* (u32) dst ^= src */
508 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst ^= src */
509 PPC_XOR(dst_reg, dst_reg, src_reg);
510 goto bpf_alu32_trunc;
511 case BPF_ALU | BPF_XOR | BPF_K: /* (u32) dst ^= (u32) imm */
512 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst ^= imm */
513 if (imm < 0 && BPF_CLASS(code) == BPF_ALU64) {
514 /* Sign-extended */
515 PPC_LI32(b2p[TMP_REG_1], imm);
516 PPC_XOR(dst_reg, dst_reg, b2p[TMP_REG_1]);
517 } else {
518 if (IMM_L(imm))
519 PPC_XORI(dst_reg, dst_reg, IMM_L(imm));
520 if (IMM_H(imm))
521 PPC_XORIS(dst_reg, dst_reg, IMM_H(imm));
522 }
523 goto bpf_alu32_trunc;
524 case BPF_ALU | BPF_LSH | BPF_X: /* (u32) dst <<= (u32) src */
525 /* slw clears top 32 bits */
526 PPC_SLW(dst_reg, dst_reg, src_reg);
527 break;
528 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst <<= src; */
529 PPC_SLD(dst_reg, dst_reg, src_reg);
530 break;
531 case BPF_ALU | BPF_LSH | BPF_K: /* (u32) dst <<== (u32) imm */
532 /* with imm 0, we still need to clear top 32 bits */
533 PPC_SLWI(dst_reg, dst_reg, imm);
534 break;
535 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst <<== imm */
536 if (imm != 0)
537 PPC_SLDI(dst_reg, dst_reg, imm);
538 break;
539 case BPF_ALU | BPF_RSH | BPF_X: /* (u32) dst >>= (u32) src */
540 PPC_SRW(dst_reg, dst_reg, src_reg);
541 break;
542 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst >>= src */
543 PPC_SRD(dst_reg, dst_reg, src_reg);
544 break;
545 case BPF_ALU | BPF_RSH | BPF_K: /* (u32) dst >>= (u32) imm */
546 PPC_SRWI(dst_reg, dst_reg, imm);
547 break;
548 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst >>= imm */
549 if (imm != 0)
550 PPC_SRDI(dst_reg, dst_reg, imm);
551 break;
552 case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */
553 PPC_SRAD(dst_reg, dst_reg, src_reg);
554 break;
555 case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */
556 if (imm != 0)
557 PPC_SRADI(dst_reg, dst_reg, imm);
558 break;
559
560 /*
561 * MOV
562 */
563 case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */
564 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
565 PPC_MR(dst_reg, src_reg);
566 goto bpf_alu32_trunc;
567 case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */
568 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = (s64) imm */
569 PPC_LI32(dst_reg, imm);
570 if (imm < 0)
571 goto bpf_alu32_trunc;
572 break;
573
574bpf_alu32_trunc:
575 /* Truncate to 32-bits */
576 if (BPF_CLASS(code) == BPF_ALU)
577 PPC_RLWINM(dst_reg, dst_reg, 0, 0, 31);
578 break;
579
580 /*
581 * BPF_FROM_BE/LE
582 */
583 case BPF_ALU | BPF_END | BPF_FROM_LE:
584 case BPF_ALU | BPF_END | BPF_FROM_BE:
585#ifdef __BIG_ENDIAN__
586 if (BPF_SRC(code) == BPF_FROM_BE)
587 goto emit_clear;
588#else /* !__BIG_ENDIAN__ */
589 if (BPF_SRC(code) == BPF_FROM_LE)
590 goto emit_clear;
591#endif
592 switch (imm) {
593 case 16:
594 /* Rotate 8 bits left & mask with 0x0000ff00 */
595 PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 16, 23);
596 /* Rotate 8 bits right & insert LSB to reg */
597 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 24, 31);
598 /* Move result back to dst_reg */
599 PPC_MR(dst_reg, b2p[TMP_REG_1]);
600 break;
601 case 32:
602 /*
603 * Rotate word left by 8 bits:
604 * 2 bytes are already in their final position
605 * -- byte 2 and 4 (of bytes 1, 2, 3 and 4)
606 */
607 PPC_RLWINM(b2p[TMP_REG_1], dst_reg, 8, 0, 31);
608 /* Rotate 24 bits and insert byte 1 */
609 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 0, 7);
610 /* Rotate 24 bits and insert byte 3 */
611 PPC_RLWIMI(b2p[TMP_REG_1], dst_reg, 24, 16, 23);
612 PPC_MR(dst_reg, b2p[TMP_REG_1]);
613 break;
614 case 64:
615 /*
616 * Way easier and faster(?) to store the value
617 * into stack and then use ldbrx
618 *
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530619 * ctx->seen will be reliable in pass2, but
620 * the instructions generated will remain the
621 * same across all passes
622 */
Naveen N. Rao91f81cb2019-03-15 20:21:19 +0530623 PPC_BPF_STL(dst_reg, 1, bpf_jit_stack_local(ctx));
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530624 PPC_ADDI(b2p[TMP_REG_1], 1, bpf_jit_stack_local(ctx));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530625 PPC_LDBRX(dst_reg, 0, b2p[TMP_REG_1]);
626 break;
627 }
628 break;
629
630emit_clear:
631 switch (imm) {
632 case 16:
633 /* zero-extend 16 bits into 64 bits */
634 PPC_RLDICL(dst_reg, dst_reg, 0, 48);
635 break;
636 case 32:
637 /* zero-extend 32 bits into 64 bits */
638 PPC_RLDICL(dst_reg, dst_reg, 0, 32);
639 break;
640 case 64:
641 /* nop */
642 break;
643 }
644 break;
645
646 /*
647 * BPF_ST(X)
648 */
649 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src */
650 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
651 if (BPF_CLASS(code) == BPF_ST) {
652 PPC_LI(b2p[TMP_REG_1], imm);
653 src_reg = b2p[TMP_REG_1];
654 }
655 PPC_STB(src_reg, dst_reg, off);
656 break;
657 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
658 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
659 if (BPF_CLASS(code) == BPF_ST) {
660 PPC_LI(b2p[TMP_REG_1], imm);
661 src_reg = b2p[TMP_REG_1];
662 }
663 PPC_STH(src_reg, dst_reg, off);
664 break;
665 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
666 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
667 if (BPF_CLASS(code) == BPF_ST) {
668 PPC_LI32(b2p[TMP_REG_1], imm);
669 src_reg = b2p[TMP_REG_1];
670 }
671 PPC_STW(src_reg, dst_reg, off);
672 break;
673 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
674 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
675 if (BPF_CLASS(code) == BPF_ST) {
676 PPC_LI32(b2p[TMP_REG_1], imm);
677 src_reg = b2p[TMP_REG_1];
678 }
Naveen N. Rao91f81cb2019-03-15 20:21:19 +0530679 PPC_BPF_STL(src_reg, dst_reg, off);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530680 break;
681
682 /*
683 * BPF_STX XADD (atomic_add)
684 */
685 /* *(u32 *)(dst + off) += src */
686 case BPF_STX | BPF_XADD | BPF_W:
687 /* Get EA into TMP_REG_1 */
688 PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);
Daniel Borkmann6e9261a2018-07-19 18:18:35 +0200689 tmp_idx = ctx->idx * 4;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530690 /* load value from memory into TMP_REG_2 */
691 PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
692 /* add value from src_reg into this */
693 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
694 /* store result back */
695 PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
696 /* we're done if this succeeded */
Daniel Borkmann6e9261a2018-07-19 18:18:35 +0200697 PPC_BCC_SHORT(COND_NE, tmp_idx);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530698 break;
699 /* *(u64 *)(dst + off) += src */
700 case BPF_STX | BPF_XADD | BPF_DW:
701 PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);
Daniel Borkmann6e9261a2018-07-19 18:18:35 +0200702 tmp_idx = ctx->idx * 4;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530703 PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
704 PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
705 PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
Daniel Borkmann6e9261a2018-07-19 18:18:35 +0200706 PPC_BCC_SHORT(COND_NE, tmp_idx);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530707 break;
708
709 /*
710 * BPF_LDX
711 */
712 /* dst = *(u8 *)(ul) (src + off) */
713 case BPF_LDX | BPF_MEM | BPF_B:
714 PPC_LBZ(dst_reg, src_reg, off);
715 break;
716 /* dst = *(u16 *)(ul) (src + off) */
717 case BPF_LDX | BPF_MEM | BPF_H:
718 PPC_LHZ(dst_reg, src_reg, off);
719 break;
720 /* dst = *(u32 *)(ul) (src + off) */
721 case BPF_LDX | BPF_MEM | BPF_W:
722 PPC_LWZ(dst_reg, src_reg, off);
723 break;
724 /* dst = *(u64 *)(ul) (src + off) */
725 case BPF_LDX | BPF_MEM | BPF_DW:
Naveen N. Rao91f81cb2019-03-15 20:21:19 +0530726 PPC_BPF_LL(dst_reg, src_reg, off);
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530727 break;
728
729 /*
730 * Doubleword load
731 * 16 byte instruction that uses two 'struct bpf_insn'
732 */
733 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
734 imm64 = ((u64)(u32) insn[i].imm) |
735 (((u64)(u32) insn[i+1].imm) << 32);
736 /* Adjust for two bpf instructions */
737 addrs[++i] = ctx->idx * 4;
738 PPC_LI64(dst_reg, imm64);
739 break;
740
741 /*
742 * Return/Exit
743 */
744 case BPF_JMP | BPF_EXIT:
745 /*
746 * If this isn't the very last instruction, branch to
747 * the epilogue. If we _are_ the last instruction,
748 * we'll just fall through to the epilogue.
749 */
750 if (i != flen - 1)
751 PPC_JMP(exit_addr);
752 /* else fall through to the epilogue */
753 break;
754
755 /*
756 * Call kernel helper
757 */
758 case BPF_JMP | BPF_CALL:
759 ctx->seen |= SEEN_FUNC;
760 func = (u8 *) __bpf_call_base + imm;
761
762 /* Save skb pointer if we need to re-cache skb data */
763 if (bpf_helper_changes_skb_data(func))
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530764 PPC_BPF_STL(3, 1, bpf_jit_stack_local(ctx));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530765
766 bpf_jit_emit_func_call(image, ctx, (u64)func);
767
768 /* move return value from r3 to BPF_REG_0 */
769 PPC_MR(b2p[BPF_REG_0], 3);
770
771 /* refresh skb cache */
772 if (bpf_helper_changes_skb_data(func)) {
773 /* reload skb pointer to r3 */
Naveen N. Rao7b847f52016-09-24 02:05:00 +0530774 PPC_BPF_LL(3, 1, bpf_jit_stack_local(ctx));
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530775 bpf_jit_emit_skb_loads(image, ctx);
776 }
777 break;
778
779 /*
780 * Jumps and branches
781 */
782 case BPF_JMP | BPF_JA:
783 PPC_JMP(addrs[i + 1 + off]);
784 break;
785
786 case BPF_JMP | BPF_JGT | BPF_K:
787 case BPF_JMP | BPF_JGT | BPF_X:
788 case BPF_JMP | BPF_JSGT | BPF_K:
789 case BPF_JMP | BPF_JSGT | BPF_X:
790 true_cond = COND_GT;
791 goto cond_branch;
792 case BPF_JMP | BPF_JGE | BPF_K:
793 case BPF_JMP | BPF_JGE | BPF_X:
794 case BPF_JMP | BPF_JSGE | BPF_K:
795 case BPF_JMP | BPF_JSGE | BPF_X:
796 true_cond = COND_GE;
797 goto cond_branch;
798 case BPF_JMP | BPF_JEQ | BPF_K:
799 case BPF_JMP | BPF_JEQ | BPF_X:
800 true_cond = COND_EQ;
801 goto cond_branch;
802 case BPF_JMP | BPF_JNE | BPF_K:
803 case BPF_JMP | BPF_JNE | BPF_X:
804 true_cond = COND_NE;
805 goto cond_branch;
806 case BPF_JMP | BPF_JSET | BPF_K:
807 case BPF_JMP | BPF_JSET | BPF_X:
808 true_cond = COND_NE;
809 /* Fall through */
810
811cond_branch:
812 switch (code) {
813 case BPF_JMP | BPF_JGT | BPF_X:
814 case BPF_JMP | BPF_JGE | BPF_X:
815 case BPF_JMP | BPF_JEQ | BPF_X:
816 case BPF_JMP | BPF_JNE | BPF_X:
817 /* unsigned comparison */
818 PPC_CMPLD(dst_reg, src_reg);
819 break;
820 case BPF_JMP | BPF_JSGT | BPF_X:
821 case BPF_JMP | BPF_JSGE | BPF_X:
822 /* signed comparison */
823 PPC_CMPD(dst_reg, src_reg);
824 break;
825 case BPF_JMP | BPF_JSET | BPF_X:
826 PPC_AND_DOT(b2p[TMP_REG_1], dst_reg, src_reg);
827 break;
828 case BPF_JMP | BPF_JNE | BPF_K:
829 case BPF_JMP | BPF_JEQ | BPF_K:
830 case BPF_JMP | BPF_JGT | BPF_K:
831 case BPF_JMP | BPF_JGE | BPF_K:
832 /*
833 * Need sign-extended load, so only positive
834 * values can be used as imm in cmpldi
835 */
836 if (imm >= 0 && imm < 32768)
837 PPC_CMPLDI(dst_reg, imm);
838 else {
839 /* sign-extending load */
840 PPC_LI32(b2p[TMP_REG_1], imm);
841 /* ... but unsigned comparison */
842 PPC_CMPLD(dst_reg, b2p[TMP_REG_1]);
843 }
844 break;
845 case BPF_JMP | BPF_JSGT | BPF_K:
846 case BPF_JMP | BPF_JSGE | BPF_K:
847 /*
848 * signed comparison, so any 16-bit value
849 * can be used in cmpdi
850 */
851 if (imm >= -32768 && imm < 32768)
852 PPC_CMPDI(dst_reg, imm);
853 else {
854 PPC_LI32(b2p[TMP_REG_1], imm);
855 PPC_CMPD(dst_reg, b2p[TMP_REG_1]);
856 }
857 break;
858 case BPF_JMP | BPF_JSET | BPF_K:
859 /* andi does not sign-extend the immediate */
860 if (imm >= 0 && imm < 32768)
861 /* PPC_ANDI is _only/always_ dot-form */
862 PPC_ANDI(b2p[TMP_REG_1], dst_reg, imm);
863 else {
864 PPC_LI32(b2p[TMP_REG_1], imm);
865 PPC_AND_DOT(b2p[TMP_REG_1], dst_reg,
866 b2p[TMP_REG_1]);
867 }
868 break;
869 }
870 PPC_BCC(true_cond, addrs[i + 1 + off]);
871 break;
872
873 /*
874 * Loads from packet header/data
875 * Assume 32-bit input value in imm and X (src_reg)
876 */
877
878 /* Absolute loads */
879 case BPF_LD | BPF_W | BPF_ABS:
880 func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_word);
881 goto common_load_abs;
882 case BPF_LD | BPF_H | BPF_ABS:
883 func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_half);
884 goto common_load_abs;
885 case BPF_LD | BPF_B | BPF_ABS:
886 func = (u8 *)CHOOSE_LOAD_FUNC(imm, sk_load_byte);
887common_load_abs:
888 /*
889 * Load from [imm]
890 * Load into r4, which can just be passed onto
891 * skb load helpers as the second parameter
892 */
893 PPC_LI32(4, imm);
894 goto common_load;
895
896 /* Indirect loads */
897 case BPF_LD | BPF_W | BPF_IND:
898 func = (u8 *)sk_load_word;
899 goto common_load_ind;
900 case BPF_LD | BPF_H | BPF_IND:
901 func = (u8 *)sk_load_half;
902 goto common_load_ind;
903 case BPF_LD | BPF_B | BPF_IND:
904 func = (u8 *)sk_load_byte;
905common_load_ind:
906 /*
907 * Load from [src_reg + imm]
908 * Treat src_reg as a 32-bit value
909 */
910 PPC_EXTSW(4, src_reg);
911 if (imm) {
912 if (imm >= -32768 && imm < 32768)
913 PPC_ADDI(4, 4, IMM_L(imm));
914 else {
915 PPC_LI32(b2p[TMP_REG_1], imm);
916 PPC_ADD(4, 4, b2p[TMP_REG_1]);
917 }
918 }
919
920common_load:
921 ctx->seen |= SEEN_SKB;
922 ctx->seen |= SEEN_FUNC;
923 bpf_jit_emit_func_call(image, ctx, (u64)func);
924
925 /*
926 * Helper returns 'lt' condition on error, and an
927 * appropriate return value in BPF_REG_0
928 */
929 PPC_BCC(COND_LT, exit_addr);
930 break;
931
932 /*
Naveen N. Raoce076142016-09-24 02:05:01 +0530933 * Tail call
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530934 */
935 case BPF_JMP | BPF_CALL | BPF_X:
Naveen N. Raoce076142016-09-24 02:05:01 +0530936 ctx->seen |= SEEN_TAILCALL;
937 bpf_jit_emit_tail_call(image, ctx, addrs[i + 1]);
938 break;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530939
940 default:
941 /*
942 * The filter contains something cruel & unusual.
943 * We don't handle it, but also there shouldn't be
944 * anything missing from our list.
945 */
946 pr_err_ratelimited("eBPF filter opcode %04x (@%d) unsupported\n",
947 code, i);
948 return -ENOTSUPP;
949 }
950 }
951
952 /* Set end-of-body-code address for exit. */
953 addrs[i] = ctx->idx * 4;
954
955 return 0;
956}
957
958void bpf_jit_compile(struct bpf_prog *fp) { }
959
960struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
961{
962 u32 proglen;
963 u32 alloclen;
964 u8 *image = NULL;
965 u32 *code_base;
966 u32 *addrs;
967 struct codegen_context cgctx;
968 int pass;
969 int flen;
970 struct bpf_binary_header *bpf_hdr;
Naveen N. Raob7b70132016-09-24 02:05:02 +0530971 struct bpf_prog *org_fp = fp;
972 struct bpf_prog *tmp_fp;
973 bool bpf_blinded = false;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530974
975 if (!bpf_jit_enable)
Naveen N. Raob7b70132016-09-24 02:05:02 +0530976 return org_fp;
977
978 tmp_fp = bpf_jit_blind_constants(org_fp);
979 if (IS_ERR(tmp_fp))
980 return org_fp;
981
982 if (tmp_fp != org_fp) {
983 bpf_blinded = true;
984 fp = tmp_fp;
985 }
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530986
987 flen = fp->len;
988 addrs = kzalloc((flen+1) * sizeof(*addrs), GFP_KERNEL);
Naveen N. Raob7b70132016-09-24 02:05:02 +0530989 if (addrs == NULL) {
990 fp = org_fp;
Naveen N. Rao156d0e22016-06-22 21:55:07 +0530991 goto out;
Naveen N. Raob7b70132016-09-24 02:05:02 +0530992 }
993
994 memset(&cgctx, 0, sizeof(struct codegen_context));
995
996 /* Scouting faux-generate pass 0 */
997 if (bpf_jit_build_body(fp, 0, &cgctx, addrs)) {
998 /* We hit something illegal or unsupported. */
999 fp = org_fp;
1000 goto out;
1001 }
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301002
1003 /*
1004 * Pretend to build prologue, given the features we've seen. This will
1005 * update ctgtx.idx as it pretends to output instructions, then we can
1006 * calculate total size from idx.
1007 */
1008 bpf_jit_build_prologue(0, &cgctx);
1009 bpf_jit_build_epilogue(0, &cgctx);
1010
1011 proglen = cgctx.idx * 4;
1012 alloclen = proglen + FUNCTION_DESCR_SIZE;
1013
1014 bpf_hdr = bpf_jit_binary_alloc(alloclen, &image, 4,
1015 bpf_jit_fill_ill_insns);
Naveen N. Raob7b70132016-09-24 02:05:02 +05301016 if (!bpf_hdr) {
1017 fp = org_fp;
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301018 goto out;
Naveen N. Raob7b70132016-09-24 02:05:02 +05301019 }
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301020
1021 code_base = (u32 *)(image + FUNCTION_DESCR_SIZE);
1022
1023 /* Code generation passes 1-2 */
1024 for (pass = 1; pass < 3; pass++) {
1025 /* Now build the prologue, body code & epilogue for real. */
1026 cgctx.idx = 0;
1027 bpf_jit_build_prologue(code_base, &cgctx);
1028 bpf_jit_build_body(fp, code_base, &cgctx, addrs);
1029 bpf_jit_build_epilogue(code_base, &cgctx);
1030
1031 if (bpf_jit_enable > 1)
1032 pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass,
1033 proglen - (cgctx.idx * 4), cgctx.seen);
1034 }
1035
1036 if (bpf_jit_enable > 1)
1037 /*
1038 * Note that we output the base address of the code_base
1039 * rather than image, since opcodes are in code_base.
1040 */
1041 bpf_jit_dump(flen, proglen, pass, code_base);
1042
1043 if (image) {
1044 bpf_flush_icache(bpf_hdr, image + alloclen);
1045#ifdef PPC64_ELF_ABI_v1
1046 /* Function descriptor nastiness: Address + TOC */
1047 ((u64 *)image)[0] = (u64)code_base;
1048 ((u64 *)image)[1] = local_paca->kernel_toc;
1049#endif
1050 fp->bpf_func = (void *)image;
1051 fp->jited = 1;
1052 }
1053
1054out:
1055 kfree(addrs);
Naveen N. Raob7b70132016-09-24 02:05:02 +05301056
1057 if (bpf_blinded)
1058 bpf_jit_prog_release_other(fp, fp == org_fp ? tmp_fp : org_fp);
1059
Naveen N. Rao156d0e22016-06-22 21:55:07 +05301060 return fp;
1061}
1062
1063void bpf_jit_free(struct bpf_prog *fp)
1064{
1065 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
1066 struct bpf_binary_header *bpf_hdr = (void *)addr;
1067
1068 if (fp->jited)
1069 bpf_jit_binary_free(bpf_hdr);
1070
1071 bpf_prog_unlock_free(fp);
1072}