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gerrit-public.fairphone.software / kernel / msm-4.9 / 3a2f2ac9b96f9a9f5538396a212d3b9fb543bfc5 / . / arch / arm64 / boot / dts / nvidia / tegra132-norrin.dts
blob: 62f33fc84e3ea7afd11655069a16a45b7e120b90 [file] [log] [blame]
Thierry Reding0f279eb2015-05-13 16:31:52 +0200[diff] [blame]1/dts-v1/;
2
3#include <dt-bindings/input/input.h>
4#include "tegra132.dtsi"
5
6/ {
7 model = "NVIDIA Tegra132 Norrin";
8 compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";
9
10 aliases {
11 rtc0 = "/i2c@0,7000d000/as3722@40";
12 rtc1 = "/rtc@0,7000e000";
13 };
14
Jon Hunter43acf832016-01-25 20:25:55 +0000[diff] [blame]15 chosen { };
16
Thierry Reding0f279eb2015-05-13 16:31:52 +0200[diff] [blame]17 memory {
18 device_type = "memory";
19 reg = <0x0 0x80000000 0x0 0x80000000>;
20 };
21
22 host1x@0,50000000 {
23 hdmi@0,54280000 {
24 status = "disabled";
25
26 vdd-supply = <&vdd_3v3_hdmi>;
27 pll-supply = <&vdd_hdmi_pll>;
28 hdmi-supply = <&vdd_5v0_hdmi>;
29
30 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
31 nvidia,hpd-gpio =
32 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
33 };
34
35 sor@0,54540000 {
36 status = "okay";
37
38 nvidia,dpaux = <&dpaux>;
39 nvidia,panel = <&panel>;
40 };
41
42 dpaux: dpaux@0,545c0000 {
43 vdd-supply = <&vdd_3v3_panel>;
44 status = "okay";
45 };
46 };
47
48 gpu@0,57000000 {
49 status = "okay";
50
51 vdd-supply = <&vdd_gpu>;
52 };
53
54 pinmux@0,70000868 {
55 pinctrl-names = "default";
56 pinctrl-0 = <&pinmux_default>;
57
58 pinmux_default: pinmux@0 {
59 dap_mclk1_pw4 {
60 nvidia,pins = "dap_mclk1_pw4";
61 nvidia,function = "extperiph1";
62 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
63 nvidia,tristate = <TEGRA_PIN_DISABLE>;
64 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
65 };
66 dap2_din_pa4 {
67 nvidia,pins = "dap2_din_pa4";
68 nvidia,function = "i2s1";
69 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
70 nvidia,tristate = <TEGRA_PIN_DISABLE>;
71 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
72 };
73 dap2_dout_pa5 {
74 nvidia,pins = "dap2_dout_pa5",
75 "dap2_fs_pa2",
76 "dap2_sclk_pa3";
77 nvidia,function = "i2s1";
78 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
79 nvidia,tristate = <TEGRA_PIN_DISABLE>;
80 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
81 };
82 dap3_dout_pp2 {
83 nvidia,pins = "dap3_dout_pp2";
84 nvidia,function = "i2s2";
85 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
86 nvidia,tristate = <TEGRA_PIN_DISABLE>;
87 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
88 };
89 dvfs_pwm_px0 {
90 nvidia,pins = "dvfs_pwm_px0",
91 "dvfs_clk_px2";
92 nvidia,function = "cldvfs";
93 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
94 nvidia,tristate = <TEGRA_PIN_DISABLE>;
95 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
96 };
97 ulpi_clk_py0 {
98 nvidia,pins = "ulpi_clk_py0",
99 "ulpi_nxt_py2",
100 "ulpi_stp_py3";
101 nvidia,function = "spi1";
102 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
103 nvidia,tristate = <TEGRA_PIN_DISABLE>;
104 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
105 };
106 ulpi_dir_py1 {
107 nvidia,pins = "ulpi_dir_py1";
108 nvidia,function = "spi1";
109 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
110 nvidia,tristate = <TEGRA_PIN_DISABLE>;
111 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
112 };
113 cam_i2c_scl_pbb1 {
114 nvidia,pins = "cam_i2c_scl_pbb1",
115 "cam_i2c_sda_pbb2";
116 nvidia,function = "i2c3";
117 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
118 nvidia,tristate = <TEGRA_PIN_DISABLE>;
119 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
120 nvidia,lock = <TEGRA_PIN_DISABLE>;
121 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
122 };
123 gen2_i2c_scl_pt5 {
124 nvidia,pins = "gen2_i2c_scl_pt5",
125 "gen2_i2c_sda_pt6";
126 nvidia,function = "i2c2";
127 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
128 nvidia,tristate = <TEGRA_PIN_DISABLE>;
129 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
130 nvidia,lock = <TEGRA_PIN_DISABLE>;
131 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
132 };
133 pj7 {
134 nvidia,pins = "pj7";
135 nvidia,function = "uartd";
136 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
137 nvidia,tristate = <TEGRA_PIN_DISABLE>;
138 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
139 };
140 spdif_in_pk6 {
141 nvidia,pins = "spdif_in_pk6";
142 nvidia,function = "spdif";
143 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
144 nvidia,tristate = <TEGRA_PIN_DISABLE>;
145 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
146 };
147 pk7 {
148 nvidia,pins = "pk7";
149 nvidia,function = "uartd";
150 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
151 nvidia,tristate = <TEGRA_PIN_DISABLE>;
152 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
153 };
154 pg4 {
155 nvidia,pins = "pg4",
156 "pg5",
157 "pg6",
158 "pi3";
159 nvidia,function = "spi4";
160 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
161 nvidia,tristate = <TEGRA_PIN_DISABLE>;
162 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
163 };
164 pg7 {
165 nvidia,pins = "pg7";
166 nvidia,function = "spi4";
167 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
168 nvidia,tristate = <TEGRA_PIN_DISABLE>;
169 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
170 };
171 ph1 {
172 nvidia,pins = "ph1";
173 nvidia,function = "pwm1";
174 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
175 nvidia,tristate = <TEGRA_PIN_DISABLE>;
176 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
177 };
178 pk0 {
179 nvidia,pins = "pk0",
180 "kb_row15_ps7",
181 "clk_32k_out_pa0";
182 nvidia,function = "soc";
183 nvidia,pull = <TEGRA_PIN_PULL_UP>;
184 nvidia,tristate = <TEGRA_PIN_DISABLE>;
185 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
186 };
187 sdmmc1_clk_pz0 {
188 nvidia,pins = "sdmmc1_clk_pz0";
189 nvidia,function = "sdmmc1";
190 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
191 nvidia,tristate = <TEGRA_PIN_DISABLE>;
192 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
193 };
194 sdmmc1_cmd_pz1 {
195 nvidia,pins = "sdmmc1_cmd_pz1",
196 "sdmmc1_dat0_py7",
197 "sdmmc1_dat1_py6",
198 "sdmmc1_dat2_py5",
199 "sdmmc1_dat3_py4";
200 nvidia,function = "sdmmc1";
201 nvidia,pull = <TEGRA_PIN_PULL_UP>;
202 nvidia,tristate = <TEGRA_PIN_DISABLE>;
203 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
204 };
205 sdmmc3_clk_pa6 {
206 nvidia,pins = "sdmmc3_clk_pa6";
207 nvidia,function = "sdmmc3";
208 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
209 nvidia,tristate = <TEGRA_PIN_DISABLE>;
210 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
211 };
212 sdmmc3_cmd_pa7 {
213 nvidia,pins = "sdmmc3_cmd_pa7",
214 "sdmmc3_dat0_pb7",
215 "sdmmc3_dat1_pb6",
216 "sdmmc3_dat2_pb5",
217 "sdmmc3_dat3_pb4",
218 "kb_col4_pq4",
219 "sdmmc3_clk_lb_out_pee4",
220 "sdmmc3_clk_lb_in_pee5",
221 "sdmmc3_cd_n_pv2";
222 nvidia,function = "sdmmc3";
223 nvidia,pull = <TEGRA_PIN_PULL_UP>;
224 nvidia,tristate = <TEGRA_PIN_DISABLE>;
225 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
226 };
227 sdmmc4_clk_pcc4 {
228 nvidia,pins = "sdmmc4_clk_pcc4";
229 nvidia,function = "sdmmc4";
230 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
231 nvidia,tristate = <TEGRA_PIN_DISABLE>;
232 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
233 };
234 sdmmc4_cmd_pt7 {
235 nvidia,pins = "sdmmc4_cmd_pt7",
236 "sdmmc4_dat0_paa0",
237 "sdmmc4_dat1_paa1",
238 "sdmmc4_dat2_paa2",
239 "sdmmc4_dat3_paa3",
240 "sdmmc4_dat4_paa4",
241 "sdmmc4_dat5_paa5",
242 "sdmmc4_dat6_paa6",
243 "sdmmc4_dat7_paa7";
244 nvidia,function = "sdmmc4";
245 nvidia,pull = <TEGRA_PIN_PULL_UP>;
246 nvidia,tristate = <TEGRA_PIN_DISABLE>;
247 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
248 };
249 mic_det_l {
250 nvidia,pins = "kb_row7_pr7";
251 nvidia,function = "rsvd2";
252 nvidia,pull = <TEGRA_PIN_PULL_UP>;
253 nvidia,tristate = <TEGRA_PIN_DISABLE>;
254 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255 };
256 kb_row10_ps2 {
257 nvidia,pins = "kb_row10_ps2";
258 nvidia,function = "uarta";
259 nvidia,pull = <TEGRA_PIN_PULL_UP>;
260 nvidia,tristate = <TEGRA_PIN_DISABLE>;
261 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
262 };
263 kb_row9_ps1 {
264 nvidia,pins = "kb_row9_ps1";
265 nvidia,function = "uarta";
266 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267 nvidia,tristate = <TEGRA_PIN_DISABLE>;
268 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
269 };
270 pwr_i2c_scl_pz6 {
271 nvidia,pins = "pwr_i2c_scl_pz6",
272 "pwr_i2c_sda_pz7";
273 nvidia,function = "i2cpwr";
274 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
275 nvidia,tristate = <TEGRA_PIN_DISABLE>;
276 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
277 nvidia,lock = <TEGRA_PIN_DISABLE>;
278 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
279 };
280 jtag_rtck {
281 nvidia,pins = "jtag_rtck";
282 nvidia,function = "rtck";
283 nvidia,pull = <TEGRA_PIN_PULL_UP>;
284 nvidia,tristate = <TEGRA_PIN_DISABLE>;
285 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
286 };
287 clk_32k_in {
288 nvidia,pins = "clk_32k_in";
289 nvidia,function = "clk";
290 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
291 nvidia,tristate = <TEGRA_PIN_DISABLE>;
292 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
293 };
294 core_pwr_req {
295 nvidia,pins = "core_pwr_req";
296 nvidia,function = "pwron";
297 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
298 nvidia,tristate = <TEGRA_PIN_DISABLE>;
299 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
300 };
301 cpu_pwr_req {
302 nvidia,pins = "cpu_pwr_req";
303 nvidia,function = "cpu";
304 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
305 nvidia,tristate = <TEGRA_PIN_DISABLE>;
306 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
307 };
308 kb_col0_ap {
309 nvidia,pins = "kb_col0_pq0";
310 nvidia,function = "rsvd4";
311 nvidia,pull = <TEGRA_PIN_PULL_UP>;
312 nvidia,tristate = <TEGRA_PIN_DISABLE>;
313 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
314 };
315 en_vdd_sd {
316 nvidia,pins = "kb_row0_pr0";
317 nvidia,function = "rsvd4";
318 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
319 nvidia,tristate = <TEGRA_PIN_DISABLE>;
320 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
321 };
322 lid_open {
323 nvidia,pins = "kb_row4_pr4";
324 nvidia,function = "rsvd3";
325 nvidia,pull = <TEGRA_PIN_PULL_UP>;
326 nvidia,tristate = <TEGRA_PIN_DISABLE>;
327 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
328 };
329 pwr_int_n {
330 nvidia,pins = "pwr_int_n";
331 nvidia,function = "pmi";
332 nvidia,pull = <TEGRA_PIN_PULL_UP>;
333 nvidia,tristate = <TEGRA_PIN_DISABLE>;
334 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
335 };
336 reset_out_n {
337 nvidia,pins = "reset_out_n";
338 nvidia,function = "reset_out_n";
339 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
340 nvidia,tristate = <TEGRA_PIN_DISABLE>;
341 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
342 };
343 clk3_out_pee0 {
344 nvidia,pins = "clk3_out_pee0";
345 nvidia,function = "extperiph3";
346 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
347 nvidia,tristate = <TEGRA_PIN_DISABLE>;
348 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
349 };
350 gen1_i2c_scl_pc4 {
351 nvidia,pins = "gen1_i2c_scl_pc4",
352 "gen1_i2c_sda_pc5";
353 nvidia,function = "i2c1";
354 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
355 nvidia,tristate = <TEGRA_PIN_DISABLE>;
356 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
357 nvidia,lock = <TEGRA_PIN_DISABLE>;
358 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
359 };
360 hdmi_cec_pee3 {
361 nvidia,pins = "hdmi_cec_pee3";
362 nvidia,function = "cec";
363 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
364 nvidia,tristate = <TEGRA_PIN_DISABLE>;
365 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
366 nvidia,lock = <TEGRA_PIN_DISABLE>;
367 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
368 };
369 hdmi_int_pn7 {
370 nvidia,pins = "hdmi_int_pn7";
371 nvidia,function = "rsvd1";
372 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
373 nvidia,tristate = <TEGRA_PIN_DISABLE>;
374 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
375 };
376 ddc_scl_pv4 {
377 nvidia,pins = "ddc_scl_pv4",
378 "ddc_sda_pv5";
379 nvidia,function = "i2c4";
380 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
381 nvidia,tristate = <TEGRA_PIN_DISABLE>;
382 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
383 nvidia,lock = <TEGRA_PIN_DISABLE>;
384 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
385 };
386 usb_vbus_en0_pn4 {
387 nvidia,pins = "usb_vbus_en0_pn4",
388 "usb_vbus_en1_pn5",
389 "usb_vbus_en2_pff1";
390 nvidia,function = "usb";
391 nvidia,pull = <TEGRA_PIN_PULL_UP>;
392 nvidia,tristate = <TEGRA_PIN_ENABLE>;
393 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
394 nvidia,lock = <TEGRA_PIN_DISABLE>;
395 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
396 };
397 drive_sdio1 {
398 nvidia,pins = "drive_sdio1";
399 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
400 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
401 nvidia,pull-down-strength = <36>;
402 nvidia,pull-up-strength = <20>;
403 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
404 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
405 };
406 drive_sdio3 {
407 nvidia,pins = "drive_sdio3";
408 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
409 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
410 nvidia,pull-down-strength = <22>;
411 nvidia,pull-up-strength = <36>;
412 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
413 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
414 };
415 drive_gma {
416 nvidia,pins = "drive_gma";
417 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
418 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
419 nvidia,pull-down-strength = <2>;
420 nvidia,pull-up-strength = <1>;
421 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
422 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
423 nvidia,drive-type = <1>;
424 };
425 ac_ok {
426 nvidia,pins = "pj0";
427 nvidia,function = "gmi";
428 nvidia,pull = <TEGRA_PIN_PULL_UP>;
429 nvidia,tristate = <TEGRA_PIN_ENABLE>;
430 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
431 };
432 codec_irq_l {
433 nvidia,pins = "ph4";
434 nvidia,function = "gmi";
435 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
436 nvidia,tristate = <TEGRA_PIN_DISABLE>;
437 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
438 };
439 lcd_bl_en {
440 nvidia,pins = "ph2";
441 nvidia,function = "gmi";
442 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
443 nvidia,tristate = <TEGRA_PIN_DISABLE>;
444 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
445 };
446 touch_irq_l {
447 nvidia,pins = "gpio_w3_aud_pw3";
448 nvidia,function = "spi6";
449 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
450 nvidia,tristate = <TEGRA_PIN_DISABLE>;
451 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
452 };
453 tpm_davint_l {
454 nvidia,pins = "ph6";
455 nvidia,function = "gmi";
456 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
457 nvidia,tristate = <TEGRA_PIN_DISABLE>;
458 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
459 };
460 ts_irq_l {
461 nvidia,pins = "pk2";
462 nvidia,function = "gmi";
463 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
464 nvidia,tristate = <TEGRA_PIN_DISABLE>;
465 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
466 };
467 ts_reset_l {
468 nvidia,pins = "pk4";
469 nvidia,function = "gmi";
470 nvidia,pull = <1>;
471 nvidia,tristate = <TEGRA_PIN_DISABLE>;
472 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
473 };
474 ts_shdn_l {
475 nvidia,pins = "pk1";
476 nvidia,function = "gmi";
477 nvidia,pull = <TEGRA_PIN_PULL_UP>;
478 nvidia,tristate = <TEGRA_PIN_DISABLE>;
479 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
480 };
481 ph7 {
482 nvidia,pins = "ph7";
483 nvidia,function = "gmi";
484 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
485 nvidia,tristate = <TEGRA_PIN_DISABLE>;
486 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
487 };
488 sensor_irq_l {
489 nvidia,pins = "pi6";
490 nvidia,function = "gmi";
491 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
492 nvidia,tristate = <TEGRA_PIN_DISABLE>;
493 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
494 };
495 wifi_en {
496 nvidia,pins = "gpio_x7_aud_px7";
497 nvidia,function = "rsvd4";
498 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
499 nvidia,tristate = <TEGRA_PIN_DISABLE>;
500 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
501 };
502 chromeos_write_protect {
503 nvidia,pins = "kb_row1_pr1";
504 nvidia,function = "rsvd4";
505 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
506 nvidia,tristate = <TEGRA_PIN_DISABLE>;
507 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
508 };
509 hp_det_l {
510 nvidia,pins = "pi7";
511 nvidia,function = "rsvd1";
512 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513 nvidia,tristate = <TEGRA_PIN_DISABLE>;
514 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515 };
516 soc_warm_reset_l {
517 nvidia,pins = "pi5";
518 nvidia,function = "gmi";
519 nvidia,pull = <TEGRA_PIN_PULL_UP>;
520 nvidia,tristate = <TEGRA_PIN_DISABLE>;
521 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
522 };
523 };
524 };
525
526 serial@0,70006000 {
527 status = "okay";
528 };
529
530 pwm: pwm@0,7000a000 {
531 status = "okay";
532 };
533
534 /* HDMI DDC */
535 hdmi_ddc: i2c@0,7000c700 {
536 status = "okay";
537 clock-frequency = <100000>;
538 };
539
540 i2c@0,7000d000 {
541 status = "okay";
542 clock-frequency = <400000>;
543
544 as3722: pmic@40 {
545 compatible = "ams,as3722";
546 reg = <0x40>;
547 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
548
549 ams,system-power-controller;
550
551 #interrupt-cells = <2>;
552 interrupt-controller;
553
554 #gpio-cells = <2>;
555 gpio-controller;
556
557 pinctrl-names = "default";
558 pinctrl-0 = <&as3722_default>;
559
560 as3722_default: pinmux@0 {
561 gpio0 {
562 pins = "gpio0";
563 function = "gpio";
564 bias-pull-down;
565 };
566
567 gpio1 {
568 pins = "gpio1";
569 function = "gpio";
570 bias-pull-up;
571 };
572
573 gpio2_4_7 {
574 pins = "gpio2", "gpio4", "gpio7";
575 function = "gpio";
576 bias-pull-up;
577 };
578
579 gpio3 {
580 pins = "gpio3";
581 function = "gpio";
582 bias-high-impedance;
583 };
584
585 gpio5 {
586 pins = "gpio5";
587 function = "clk32k-out";
588 bias-pull-down;
589 };
590
591 gpio6 {
592 pins = "gpio6";
593 function = "clk32k-out";
594 bias-pull-down;
595 };
596 };
597
598 regulators {
599 vsup-sd2-supply = <&vdd_5v0_sys>;
600 vsup-sd3-supply = <&vdd_5v0_sys>;
601 vsup-sd4-supply = <&vdd_5v0_sys>;
602 vsup-sd5-supply = <&vdd_5v0_sys>;
603 vin-ldo0-supply = <&vdd_1v35_lp0>;
604 vin-ldo1-6-supply = <&vdd_3v3_sys>;
605 vin-ldo2-5-7-supply = <&vddio_1v8>;
606 vin-ldo3-4-supply = <&vdd_3v3_sys>;
607 vin-ldo9-10-supply = <&vdd_5v0_sys>;
608 vin-ldo11-supply = <&vdd_3v3_run>;
609
610 sd0 {
611 regulator-name = "+VDD_CPU_AP";
612 regulator-min-microvolt = <700000>;
613 regulator-max-microvolt = <1350000>;
614 regulator-max-microamp = <3500000>;
615 regulator-always-on;
616 regulator-boot-on;
617 ams,ext-control = <2>;
618 };
619
620 sd1 {
621 regulator-name = "+VDD_CORE";
622 regulator-min-microvolt = <700000>;
623 regulator-max-microvolt = <1350000>;
624 regulator-max-microamp = <4000000>;
625 regulator-always-on;
626 regulator-boot-on;
627 ams,ext-control = <1>;
628 };
629
630 vdd_1v35_lp0: sd2 {
631 regulator-name = "+1.35V_LP0(sd2)";
632 regulator-min-microvolt = <1350000>;
633 regulator-max-microvolt = <1350000>;
634 regulator-always-on;
635 regulator-boot-on;
636 };
637
638 sd3 {
639 regulator-name = "+1.35V_LP0(sd3)";
640 regulator-min-microvolt = <1350000>;
641 regulator-max-microvolt = <1350000>;
642 regulator-always-on;
643 regulator-boot-on;
644 };
645
646 vdd_1v05_run: sd4 {
647 regulator-name = "+1.05V_RUN";
648 regulator-min-microvolt = <1050000>;
649 regulator-max-microvolt = <1050000>;
650 };
651
652 vddio_1v8: sd5 {
653 regulator-name = "+1.8V_VDDIO";
654 regulator-min-microvolt = <1800000>;
655 regulator-max-microvolt = <1800000>;
656 regulator-always-on;
657 regulator-boot-on;
658 };
659
660 vdd_gpu: sd6 {
661 regulator-name = "+VDD_GPU_AP";
662 regulator-min-microvolt = <800000>;
663 regulator-max-microvolt = <1200000>;
664 regulator-min-microamp = <3500000>;
665 regulator-max-microamp = <3500000>;
666 regulator-always-on;
667 regulator-boot-on;
668 };
669
670 ldo0 {
671 regulator-name = "+1.05_RUN_AVDD";
672 regulator-min-microvolt = <1050000>;
673 regulator-max-microvolt = <1050000>;
674 regulator-always-on;
675 regulator-boot-on;
676 ams,ext-control = <1>;
677 };
678
679 ldo1 {
680 regulator-name = "+1.8V_RUN_CAM";
681 regulator-min-microvolt = <1800000>;
682 regulator-max-microvolt = <1800000>;
683 };
684
685 ldo2 {
686 regulator-name = "+1.2V_GEN_AVDD";
687 regulator-min-microvolt = <1200000>;
688 regulator-max-microvolt = <1200000>;
689 regulator-always-on;
690 regulator-boot-on;
691 };
692
693 ldo3 {
694 regulator-name = "+1.00V_LP0_VDD_RTC";
695 regulator-min-microvolt = <1000000>;
696 regulator-max-microvolt = <1000000>;
697 regulator-always-on;
698 regulator-boot-on;
699 ams,enable-tracking;
700 };
701
702 vdd_run_cam: ldo4 {
703 regulator-name = "+2.8V_RUN_CAM";
704 regulator-min-microvolt = <2800000>;
705 regulator-max-microvolt = <2800000>;
706 };
707
708 ldo5 {
709 regulator-name = "+1.2V_RUN_CAM_FRONT";
710 regulator-min-microvolt = <1200000>;
711 regulator-max-microvolt = <1200000>;
712 };
713
714 vddio_sdmmc3: ldo6 {
715 regulator-name = "+VDDIO_SDMMC3";
716 regulator-min-microvolt = <1800000>;
717 regulator-max-microvolt = <3300000>;
718 };
719
720 ldo7 {
721 regulator-name = "+1.05V_RUN_CAM_REAR";
722 regulator-min-microvolt = <1050000>;
723 regulator-max-microvolt = <1050000>;
724 };
725
726 ldo9 {
727 regulator-name = "+2.8V_RUN_TOUCH";
728 regulator-min-microvolt = <2800000>;
729 regulator-max-microvolt = <2800000>;
730 };
731
732 ldo10 {
733 regulator-name = "+2.8V_RUN_CAM_AF";
734 regulator-min-microvolt = <2800000>;
735 regulator-max-microvolt = <2800000>;
736 };
737
738 ldo11 {
739 regulator-name = "+1.8V_RUN_VPP_FUSE";
740 regulator-min-microvolt = <1800000>;
741 regulator-max-microvolt = <1800000>;
742 };
743 };
744 };
745 };
746
747 spi@0,7000d400 {
748 status = "okay";
749
750 ec: cros-ec@0 {
751 compatible = "google,cros-ec-spi";
752 spi-max-frequency = <3000000>;
753 interrupt-parent = <&gpio>;
754 interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
755 reg = <0>;
756
757 google,cros-ec-spi-msg-delay = <2000>;
758
759 i2c_20: i2c-tunnel {
760 compatible = "google,cros-ec-i2c-tunnel";
761 #address-cells = <1>;
762 #size-cells = <0>;
763
764 google,remote-bus = <0>;
765
766 charger: bq24735 {
767 compatible = "ti,bq24735";
768 reg = <0x9>;
769 interrupt-parent = <&gpio>;
770 interrupts = <TEGRA_GPIO(J, 0)
771 GPIO_ACTIVE_HIGH>;
772 ti,ac-detect-gpios = <&gpio
773 TEGRA_GPIO(J, 0)
774 GPIO_ACTIVE_HIGH>;
775 };
776
777 battery: smart-battery {
778 compatible = "sbs,sbs-battery";
779 reg = <0xb>;
780 battery-name = "battery";
781 sbs,i2c-retry-count = <2>;
782 sbs,poll-retry-count = <10>;
783 /* power-supplies = <&charger>; */
784 };
785 };
786
787 keyboard-controller {
788 compatible = "google,cros-ec-keyb";
789 keypad,num-rows = <8>;
790 keypad,num-columns = <13>;
791 google,needs-ghost-filter;
792 linux,keymap =
793 <MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA)
794 MATRIX_KEY(0x00, 0x02, KEY_F1)
795 MATRIX_KEY(0x00, 0x03, KEY_B)
796 MATRIX_KEY(0x00, 0x04, KEY_F10)
797 MATRIX_KEY(0x00, 0x06, KEY_N)
798 MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
799 MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
800
801 MATRIX_KEY(0x01, 0x01, KEY_ESC)
802 MATRIX_KEY(0x01, 0x02, KEY_F4)
803 MATRIX_KEY(0x01, 0x03, KEY_G)
804 MATRIX_KEY(0x01, 0x04, KEY_F7)
805 MATRIX_KEY(0x01, 0x06, KEY_H)
806 MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
807 MATRIX_KEY(0x01, 0x09, KEY_F9)
808 MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
809
810 MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
811 MATRIX_KEY(0x02, 0x01, KEY_TAB)
812 MATRIX_KEY(0x02, 0x02, KEY_F3)
813 MATRIX_KEY(0x02, 0x03, KEY_T)
814 MATRIX_KEY(0x02, 0x04, KEY_F6)
815 MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE)
816 MATRIX_KEY(0x02, 0x06, KEY_Y)
817 MATRIX_KEY(0x02, 0x07, KEY_102ND)
818 MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
819 MATRIX_KEY(0x02, 0x09, KEY_F8)
820
821 MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
822 MATRIX_KEY(0x03, 0x02, KEY_F2)
823 MATRIX_KEY(0x03, 0x03, KEY_5)
824 MATRIX_KEY(0x03, 0x04, KEY_F5)
825 MATRIX_KEY(0x03, 0x06, KEY_6)
826 MATRIX_KEY(0x03, 0x08, KEY_MINUS)
827 MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
828
829 MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
830 MATRIX_KEY(0x04, 0x01, KEY_A)
831 MATRIX_KEY(0x04, 0x02, KEY_D)
832 MATRIX_KEY(0x04, 0x03, KEY_F)
833 MATRIX_KEY(0x04, 0x04, KEY_S)
834 MATRIX_KEY(0x04, 0x05, KEY_K)
835 MATRIX_KEY(0x04, 0x06, KEY_J)
836 MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON)
837 MATRIX_KEY(0x04, 0x09, KEY_L)
838 MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH)
839 MATRIX_KEY(0x04, 0x0b, KEY_ENTER)
840
841 MATRIX_KEY(0x05, 0x01, KEY_Z)
842 MATRIX_KEY(0x05, 0x02, KEY_C)
843 MATRIX_KEY(0x05, 0x03, KEY_V)
844 MATRIX_KEY(0x05, 0x04, KEY_X)
845 MATRIX_KEY(0x05, 0x05, KEY_COMMA)
846 MATRIX_KEY(0x05, 0x06, KEY_M)
847 MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT)
848 MATRIX_KEY(0x05, 0x08, KEY_SLASH)
849 MATRIX_KEY(0x05, 0x09, KEY_DOT)
850 MATRIX_KEY(0x05, 0x0b, KEY_SPACE)
851
852 MATRIX_KEY(0x06, 0x01, KEY_1)
853 MATRIX_KEY(0x06, 0x02, KEY_3)
854 MATRIX_KEY(0x06, 0x03, KEY_4)
855 MATRIX_KEY(0x06, 0x04, KEY_2)
856 MATRIX_KEY(0x06, 0x05, KEY_8)
857 MATRIX_KEY(0x06, 0x06, KEY_7)
858 MATRIX_KEY(0x06, 0x08, KEY_0)
859 MATRIX_KEY(0x06, 0x09, KEY_9)
860 MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT)
861 MATRIX_KEY(0x06, 0x0b, KEY_DOWN)
862 MATRIX_KEY(0x06, 0x0c, KEY_RIGHT)
863
864 MATRIX_KEY(0x07, 0x01, KEY_Q)
865 MATRIX_KEY(0x07, 0x02, KEY_E)
866 MATRIX_KEY(0x07, 0x03, KEY_R)
867 MATRIX_KEY(0x07, 0x04, KEY_W)
868 MATRIX_KEY(0x07, 0x05, KEY_I)
869 MATRIX_KEY(0x07, 0x06, KEY_U)
870 MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT)
871 MATRIX_KEY(0x07, 0x08, KEY_P)
872 MATRIX_KEY(0x07, 0x09, KEY_O)
873 MATRIX_KEY(0x07, 0x0b, KEY_UP)
874 MATRIX_KEY(0x07, 0x0c, KEY_LEFT)>;
875 };
876 };
877 };
878
879 pmc@0,7000e400 {
880 nvidia,invert-interrupt;
881 nvidia,suspend-mode = <0>;
882 #wake-cells = <3>;
883 nvidia,cpu-pwr-good-time = <500>;
884 nvidia,cpu-pwr-off-time = <300>;
885 nvidia,core-pwr-good-time = <641 3845>;
886 nvidia,core-pwr-off-time = <61036>;
887 nvidia,core-power-req-active-high;
888 nvidia,sys-clock-req-active-high;
889 nvidia,reset-gpio = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
890 };
891
892 /* WIFI/BT module */
893 sdhci@0,700b0000 {
894 status = "disabled";
895 };
896
897 /* external SD/MMC */
898 sdhci@0,700b0400 {
899 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
900 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
901 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
902 status = "okay";
903 bus-width = <4>;
904 vqmmc-supply = <&vddio_sdmmc3>;
905 };
906
907 /* EMMC 4.51 */
908 sdhci@0,700b0600 {
909 status = "okay";
910 bus-width = <8>;
911 non-removable;
912 };
913
914 usb@0,7d000000 {
915 status = "okay";
916 };
917
918 usb-phy@0,7d000000 {
919 status = "okay";
920 vbus-supply = <&vdd_usb1_vbus>;
921 };
922
923 usb@0,7d004000 {
924 status = "okay";
925 };
926
927 usb-phy@0,7d004000 {
928 status = "okay";
929 vbus-supply = <&vdd_run_cam>;
930 };
931
932 usb@0,7d008000 {
933 status = "okay";
934 };
935
936 usb-phy@0,7d008000 {
937 status = "okay";
938 vbus-supply = <&vdd_usb3_vbus>;
939 };
940
941 backlight: backlight {
942 compatible = "pwm-backlight";
943
944 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
945 power-supply = <&vdd_led>;
946 pwms = <&pwm 1 1000000>;
947
948 brightness-levels = <0 4 8 16 32 64 128 255>;
949 default-brightness-level = <6>;
950
951 backlight-boot-off;
952 };
953
954 clocks {
955 compatible = "simple-bus";
956 #address-cells = <1>;
957 #size-cells = <0>;
958
959 clk32k_in: clock@0 {
960 compatible = "fixed-clock";
961 reg=<0>;
962 #clock-cells = <0>;
963 clock-frequency = <32768>;
964 };
965 };
966
967 gpio-keys {
968 compatible = "gpio-keys";
969
970 lid {
971 label = "Lid";
972 gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
973 linux,input-type = <5>;
974 linux,code = <0>;
975 debounce-interval = <1>;
976 gpio-key,wakeup;
977 };
978
979 power {
980 label = "Power";
981 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
982 linux,code = <KEY_POWER>;
983 debounce-interval = <10>;
984 gpio-key,wakeup;
985 };
986 };
987
988 panel: panel {
989 compatible = "innolux,n116bge", "simple-panel";
990 backlight = <&backlight>;
991 ddc-i2c-bus = <&dpaux>;
992 };
993
994 regulators {
995 compatible = "simple-bus";
996 #address-cells = <1>;
997 #size-cells = <0>;
998
999 vdd_mux: regulator@0 {
1000 compatible = "regulator-fixed";
1001 reg = <0>;
1002 regulator-name = "+VDD_MUX";
1003 regulator-min-microvolt = <19000000>;
1004 regulator-max-microvolt = <19000000>;
1005 regulator-always-on;
1006 regulator-boot-on;
1007 };
1008
1009 vdd_5v0_sys: regulator@1 {
1010 compatible = "regulator-fixed";
1011 reg = <1>;
1012 regulator-name = "+5V_SYS";
1013 regulator-min-microvolt = <5000000>;
1014 regulator-max-microvolt = <5000000>;
1015 regulator-always-on;
1016 regulator-boot-on;
1017 vin-supply = <&vdd_mux>;
1018 };
1019
1020 vdd_3v3_sys: regulator@2 {
1021 compatible = "regulator-fixed";
1022 reg = <2>;
1023 regulator-name = "+3.3V_SYS";
1024 regulator-min-microvolt = <3300000>;
1025 regulator-max-microvolt = <3300000>;
1026 regulator-always-on;
1027 regulator-boot-on;
1028 vin-supply = <&vdd_mux>;
1029 };
1030
1031 vdd_3v3_run: regulator@3 {
1032 compatible = "regulator-fixed";
1033 reg = <3>;
1034 regulator-name = "+3.3V_RUN";
1035 regulator-min-microvolt = <3300000>;
1036 regulator-max-microvolt = <3300000>;
1037 regulator-always-on;
1038 regulator-boot-on;
1039 gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
1040 enable-active-high;
1041 vin-supply = <&vdd_3v3_sys>;
1042 };
1043
1044 vdd_3v3_hdmi: regulator@4 {
1045 compatible = "regulator-fixed";
1046 reg = <4>;
1047 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1048 regulator-min-microvolt = <3300000>;
1049 regulator-max-microvolt = <3300000>;
1050 vin-supply = <&vdd_3v3_run>;
1051 };
1052
1053 vdd_led: regulator@5 {
1054 compatible = "regulator-fixed";
1055 reg = <5>;
1056 regulator-name = "+VDD_LED";
1057 regulator-min-microvolt = <3300000>;
1058 regulator-max-microvolt = <3300000>;
1059 gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1060 enable-active-high;
1061 vin-supply = <&vdd_mux>;
1062 };
1063
1064 vdd_usb1_vbus: regulator@6 {
1065 compatible = "regulator-fixed";
1066 reg = <6>;
1067 regulator-name = "+5V_USB_HS";
1068 regulator-min-microvolt = <5000000>;
1069 regulator-max-microvolt = <5000000>;
1070 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1071 enable-active-high;
1072 gpio-open-drain;
1073 vin-supply = <&vdd_5v0_sys>;
1074 };
1075
1076 vdd_usb3_vbus: regulator@7 {
1077 compatible = "regulator-fixed";
1078 reg = <7>;
1079 regulator-name = "+5V_USB_SS";
1080 regulator-min-microvolt = <5000000>;
1081 regulator-max-microvolt = <5000000>;
1082 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1083 enable-active-high;
1084 gpio-open-drain;
1085 vin-supply = <&vdd_5v0_sys>;
1086 };
1087
1088 vdd_3v3_panel: regulator@8 {
1089 compatible = "regulator-fixed";
1090 reg = <8>;
1091 regulator-name = "+3.3V_PANEL";
1092 regulator-min-microvolt = <3300000>;
1093 regulator-max-microvolt = <3300000>;
1094 gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
1095 enable-active-high;
1096 vin-supply = <&vdd_3v3_sys>;
1097 };
1098
1099 vdd_hdmi_pll: regulator@9 {
1100 compatible = "regulator-fixed";
1101 reg = <9>;
1102 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE";
1103 regulator-min-microvolt = <1050000>;
1104 regulator-max-microvolt = <1050000>;
1105 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1106 vin-supply = <&vdd_1v05_run>;
1107 };
1108
1109 vdd_5v0_hdmi: regulator@10 {
1110 compatible = "regulator-fixed";
1111 reg = <10>;
1112 regulator-name = "+5V_HDMI_CON";
1113 regulator-min-microvolt = <5000000>;
1114 regulator-max-microvolt = <5000000>;
1115 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1116 enable-active-high;
1117 vin-supply = <&vdd_5v0_sys>;
1118 };
1119
1120 vdd_5v0_ts: regulator@11 {
1121 compatible = "regulator-fixed";
1122 reg = <11>;
1123 regulator-name = "+5V_VDD_TS";
1124 regulator-min-microvolt = <5000000>;
1125 regulator-max-microvolt = <5000000>;
1126 regulator-always-on;
1127 regulator-boot-on;
1128 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1129 enable-active-high;
1130 };
1131 };
1132};