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gerrit-public.fairphone.software / kernel / msm-4.9 / 3a370ca1dcf8c80aff7a0a21d6b0f50ca2a151e9 / . / drivers / net / sfc / phy.h
blob: 5bc26137257b3ea4909e924165c1298a5f2c7267 [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
Ben Hutchings906bb262009-11-29 15:16:19 +0000[diff] [blame]3 * Copyright 2007-2009 Solarflare Communications Inc.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#ifndef EFX_PHY_H
11#define EFX_PHY_H
12
13/****************************************************************************
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800[diff] [blame]14 * 10Xpress (SFX7101 and SFT9001) PHYs
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]15 */
Ben Hutchingse6fa2eb2008-12-12 22:00:17 -0800[diff] [blame]16extern struct efx_phy_operations falcon_sfx7101_phy_ops;
17extern struct efx_phy_operations falcon_sft9001_phy_ops;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]18
Ben Hutchings398468e2009-11-23 16:03:45 +0000[diff] [blame]19extern void tenxpress_set_id_led(struct efx_nic *efx, enum efx_led_mode mode);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]20
Ben Hutchings190dbcf2009-02-27 13:06:45 +0000[diff] [blame]21/* Wait for the PHY to boot. Return 0 on success, -EINVAL if the PHY failed
22 * to boot due to corrupt flash, or some other negative error code. */
23extern int sft9001_wait_boot(struct efx_nic *efx);
24
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]25/****************************************************************************
Ben Hutchingsb37b62f2009-10-23 08:33:42 +0000[diff] [blame]26 * AMCC/Quake QT202x PHYs
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]27 */
Ben Hutchingsb37b62f2009-10-23 08:33:42 +0000[diff] [blame]28extern struct efx_phy_operations falcon_qt202x_phy_ops;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]29
Ben Hutchingsd2d2c372009-02-27 13:07:33 +0000[diff] [blame]30/* These PHYs provide various H/W control states for LEDs */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]31#define QUAKE_LED_LINK_INVAL (0)
32#define QUAKE_LED_LINK_STAT (1)
33#define QUAKE_LED_LINK_ACT (2)
34#define QUAKE_LED_LINK_ACTSTAT (3)
35#define QUAKE_LED_OFF (4)
36#define QUAKE_LED_ON (5)
37#define QUAKE_LED_LINK_INPUT (6) /* Pin is an input. */
38/* What link the LED tracks */
39#define QUAKE_LED_TXLINK (0)
40#define QUAKE_LED_RXLINK (8)
41
Ben Hutchingsb37b62f2009-10-23 08:33:42 +0000[diff] [blame]42extern void falcon_qt202x_set_led(struct efx_nic *p, int led, int state);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]43
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000[diff] [blame]44/****************************************************************************
45 * Siena managed PHYs
46 */
47extern struct efx_phy_operations efx_mcdi_phy_ops;
48
49extern int efx_mcdi_mdio_read(struct efx_nic *efx, unsigned int bus,
50 unsigned int prtad, unsigned int devad,
51 u16 addr, u16 *value_out, u32 *status_out);
52extern int efx_mcdi_mdio_write(struct efx_nic *efx, unsigned int bus,
53 unsigned int prtad, unsigned int devad,
54 u16 addr, u16 value, u32 *status_out);
55extern void efx_mcdi_phy_decode_link(struct efx_nic *efx,
56 struct efx_link_state *link_state,
57 u32 speed, u32 flags, u32 fcntl);
58extern int efx_mcdi_phy_reconfigure(struct efx_nic *efx);
59extern void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa);
60
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]61#endif