blob: 3f537a04c6a633b10fb29e0cb390bcd3a54be976 [file] [log] [blame]
Jiancheng Xue6c9da382016-04-23 15:40:30 +08001config COMMON_CLK_HI3519
2 tristate "Hi3519 Clock Driver"
3 depends on ARCH_HISI || COMPILE_TEST
4 select RESET_HISI
5 default ARCH_HISI
6 help
7 Build the clock driver for hi3519.
8
Bintian Wang72ea4862015-05-29 10:08:38 +08009config COMMON_CLK_HI6220
10 bool "Hi6220 Clock Driver"
Leo Yan9f42a892015-09-02 10:57:47 +080011 depends on ARCH_HISI || COMPILE_TEST
Bintian Wang72ea4862015-05-29 10:08:38 +080012 default ARCH_HISI
13 help
14 Build the Hisilicon Hi6220 clock driver based on the common clock framework.
Leo Yan9f42a892015-09-02 10:57:47 +080015
Jiancheng Xue25824d52016-04-23 15:40:28 +080016config RESET_HISI
17 bool "HiSilicon Reset Controller Driver"
18 depends on ARCH_HISI || COMPILE_TEST
19 select RESET_CONTROLLER
20 help
21 Build reset controller driver for HiSilicon device chipsets.
22
Leo Yan9f42a892015-09-02 10:57:47 +080023config STUB_CLK_HI6220
24 bool "Hi6220 Stub Clock Driver"
25 depends on COMMON_CLK_HI6220 && MAILBOX
26 help
27 Build the Hisilicon Hi6220 stub clock driver.