blob: 4cdc18e72222dbdd8c3b09dedf33dfa945204e66 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/types.h>
39#include <linux/netdevice.h>
40#include <linux/etherdevice.h>
41#include <linux/slab.h>
42#include <linux/device.h>
43#include <linux/skbuff.h>
44#include <linux/if_vlan.h>
45#include <linux/if_bridge.h>
46#include <linux/workqueue.h>
47#include <linux/jiffies.h>
48#include <net/switchdev.h>
49
50#include "spectrum.h"
51#include "core.h"
52#include "reg.h"
53
Elad Raze4b6f692016-01-10 21:06:27 +010054static u16 mlxsw_sp_port_vid_to_fid_get(struct mlxsw_sp_port *mlxsw_sp_port,
55 u16 vid)
56{
57 u16 fid = vid;
58
59 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
60 u16 vfid = mlxsw_sp_vport_vfid_get(mlxsw_sp_port);
61
62 fid = mlxsw_sp_vfid_to_fid(vfid);
63 }
64
65 if (!fid)
66 fid = mlxsw_sp_port->pvid;
67
68 return fid;
69}
70
Ido Schimmel54a73202015-12-15 16:03:41 +010071static struct mlxsw_sp_port *
72mlxsw_sp_port_orig_get(struct net_device *dev,
73 struct mlxsw_sp_port *mlxsw_sp_port)
74{
75 struct mlxsw_sp_port *mlxsw_sp_vport;
76 u16 vid;
77
78 if (!is_vlan_dev(dev))
79 return mlxsw_sp_port;
80
81 vid = vlan_dev_vlan_id(dev);
82 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
83 WARN_ON(!mlxsw_sp_vport);
84
85 return mlxsw_sp_vport;
86}
87
Jiri Pirko56ade8f2015-10-16 14:01:37 +020088static int mlxsw_sp_port_attr_get(struct net_device *dev,
89 struct switchdev_attr *attr)
90{
91 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
92 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
93
Ido Schimmel54a73202015-12-15 16:03:41 +010094 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
95 if (!mlxsw_sp_port)
96 return -EINVAL;
97
Jiri Pirko56ade8f2015-10-16 14:01:37 +020098 switch (attr->id) {
99 case SWITCHDEV_ATTR_ID_PORT_PARENT_ID:
100 attr->u.ppid.id_len = sizeof(mlxsw_sp->base_mac);
101 memcpy(&attr->u.ppid.id, &mlxsw_sp->base_mac,
102 attr->u.ppid.id_len);
103 break;
104 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
105 attr->u.brport_flags =
106 (mlxsw_sp_port->learning ? BR_LEARNING : 0) |
Ido Schimmel02930382015-10-28 10:16:58 +0100107 (mlxsw_sp_port->learning_sync ? BR_LEARNING_SYNC : 0) |
108 (mlxsw_sp_port->uc_flood ? BR_FLOOD : 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200109 break;
110 default:
111 return -EOPNOTSUPP;
112 }
113
114 return 0;
115}
116
117static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
118 u8 state)
119{
120 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
121 enum mlxsw_reg_spms_state spms_state;
122 char *spms_pl;
123 u16 vid;
124 int err;
125
126 switch (state) {
127 case BR_STATE_DISABLED: /* fall-through */
128 case BR_STATE_FORWARDING:
129 spms_state = MLXSW_REG_SPMS_STATE_FORWARDING;
130 break;
131 case BR_STATE_LISTENING: /* fall-through */
132 case BR_STATE_LEARNING:
133 spms_state = MLXSW_REG_SPMS_STATE_LEARNING;
134 break;
135 case BR_STATE_BLOCKING:
136 spms_state = MLXSW_REG_SPMS_STATE_DISCARDING;
137 break;
138 default:
139 BUG();
140 }
141
142 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
143 if (!spms_pl)
144 return -ENOMEM;
145 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
Ido Schimmel54a73202015-12-15 16:03:41 +0100146
147 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
148 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200149 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
Ido Schimmel54a73202015-12-15 16:03:41 +0100150 } else {
151 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
152 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
153 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200154
155 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
156 kfree(spms_pl);
157 return err;
158}
159
160static int mlxsw_sp_port_attr_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
161 struct switchdev_trans *trans,
162 u8 state)
163{
164 if (switchdev_trans_ph_prepare(trans))
165 return 0;
166
167 mlxsw_sp_port->stp_state = state;
168 return mlxsw_sp_port_stp_state_set(mlxsw_sp_port, state);
169}
170
Ido Schimmel26f0e7f2015-12-15 16:03:44 +0100171static bool mlxsw_sp_vfid_is_vport_br(u16 vfid)
172{
173 return vfid >= MLXSW_SP_VFID_PORT_MAX;
174}
175
Ido Schimmel02930382015-10-28 10:16:58 +0100176static int __mlxsw_sp_port_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100177 u16 idx_begin, u16 idx_end, bool set,
Ido Schimmel02930382015-10-28 10:16:58 +0100178 bool only_uc)
179{
180 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100181 u16 local_port = mlxsw_sp_port->local_port;
182 enum mlxsw_flood_table_type table_type;
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100183 u16 range = idx_end - idx_begin + 1;
Ido Schimmel02930382015-10-28 10:16:58 +0100184 char *sftr_pl;
185 int err;
186
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100187 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
188 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +0100189 if (mlxsw_sp_vfid_is_vport_br(idx_begin))
190 local_port = mlxsw_sp_port->local_port;
191 else
192 local_port = MLXSW_PORT_CPU_PORT;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100193 } else {
194 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
195 }
196
Ido Schimmel02930382015-10-28 10:16:58 +0100197 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
198 if (!sftr_pl)
199 return -ENOMEM;
200
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100201 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100202 table_type, range, local_port, set);
Ido Schimmel02930382015-10-28 10:16:58 +0100203 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
204 if (err)
205 goto buffer_out;
206
207 /* Flooding control allows one to decide whether a given port will
208 * flood unicast traffic for which there is no FDB entry.
209 */
210 if (only_uc)
211 goto buffer_out;
212
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100213 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, idx_begin,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100214 table_type, range, local_port, set);
Ido Schimmel02930382015-10-28 10:16:58 +0100215 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
216
217buffer_out:
218 kfree(sftr_pl);
219 return err;
220}
221
222static int mlxsw_sp_port_uc_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
223 bool set)
224{
225 struct net_device *dev = mlxsw_sp_port->dev;
226 u16 vid, last_visited_vid;
227 int err;
228
Ido Schimmel54a73202015-12-15 16:03:41 +0100229 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
230 u16 vfid = mlxsw_sp_vport_vfid_get(mlxsw_sp_port);
231
232 return __mlxsw_sp_port_flood_set(mlxsw_sp_port, vfid, vfid,
233 set, true);
234 }
235
Ido Schimmel02930382015-10-28 10:16:58 +0100236 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
237 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, set,
238 true);
239 if (err) {
240 last_visited_vid = vid;
241 goto err_port_flood_set;
242 }
243 }
244
245 return 0;
246
247err_port_flood_set:
248 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
249 __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, !set, true);
250 netdev_err(dev, "Failed to configure unicast flooding\n");
251 return err;
252}
253
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100254int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 vfid,
Ido Schimmel19ae6122015-12-15 16:03:39 +0100255 bool set, bool only_uc)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100256{
257 /* In case of vFIDs, index into the flooding table is relative to
258 * the start of the vFIDs range.
259 */
Ido Schimmel19ae6122015-12-15 16:03:39 +0100260 return __mlxsw_sp_port_flood_set(mlxsw_sp_vport, vfid, vfid, set,
261 only_uc);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100262}
263
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200264static int mlxsw_sp_port_attr_br_flags_set(struct mlxsw_sp_port *mlxsw_sp_port,
265 struct switchdev_trans *trans,
266 unsigned long brport_flags)
267{
Ido Schimmel02930382015-10-28 10:16:58 +0100268 unsigned long uc_flood = mlxsw_sp_port->uc_flood ? BR_FLOOD : 0;
269 bool set;
270 int err;
271
Ido Schimmel6c72a3d2016-01-04 10:42:26 +0100272 if (!mlxsw_sp_port->bridged)
273 return -EINVAL;
274
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200275 if (switchdev_trans_ph_prepare(trans))
276 return 0;
277
Ido Schimmel02930382015-10-28 10:16:58 +0100278 if ((uc_flood ^ brport_flags) & BR_FLOOD) {
279 set = mlxsw_sp_port->uc_flood ? false : true;
280 err = mlxsw_sp_port_uc_flood_set(mlxsw_sp_port, set);
281 if (err)
282 return err;
283 }
284
285 mlxsw_sp_port->uc_flood = brport_flags & BR_FLOOD ? 1 : 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200286 mlxsw_sp_port->learning = brport_flags & BR_LEARNING ? 1 : 0;
287 mlxsw_sp_port->learning_sync = brport_flags & BR_LEARNING_SYNC ? 1 : 0;
Ido Schimmel02930382015-10-28 10:16:58 +0100288
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200289 return 0;
290}
291
292static int mlxsw_sp_ageing_set(struct mlxsw_sp *mlxsw_sp, u32 ageing_time)
293{
294 char sfdat_pl[MLXSW_REG_SFDAT_LEN];
295 int err;
296
297 mlxsw_reg_sfdat_pack(sfdat_pl, ageing_time);
298 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdat), sfdat_pl);
299 if (err)
300 return err;
301 mlxsw_sp->ageing_time = ageing_time;
302 return 0;
303}
304
305static int mlxsw_sp_port_attr_br_ageing_set(struct mlxsw_sp_port *mlxsw_sp_port,
306 struct switchdev_trans *trans,
Jiri Pirko135f9ec2015-10-28 10:17:02 +0100307 unsigned long ageing_clock_t)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200308{
309 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko135f9ec2015-10-28 10:17:02 +0100310 unsigned long ageing_jiffies = clock_t_to_jiffies(ageing_clock_t);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200311 u32 ageing_time = jiffies_to_msecs(ageing_jiffies) / 1000;
312
313 if (switchdev_trans_ph_prepare(trans))
314 return 0;
315
316 return mlxsw_sp_ageing_set(mlxsw_sp, ageing_time);
317}
318
Elad Raz26a4ea02016-01-06 13:01:10 +0100319static int mlxsw_sp_port_attr_br_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
320 struct switchdev_trans *trans,
321 struct net_device *orig_dev,
322 bool vlan_enabled)
323{
324 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
325
326 /* SWITCHDEV_TRANS_PREPARE phase */
327 if ((!vlan_enabled) && (mlxsw_sp->master_bridge.dev == orig_dev)) {
328 netdev_err(mlxsw_sp_port->dev, "Bridge must be vlan-aware\n");
329 return -EINVAL;
330 }
331
332 return 0;
333}
334
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200335static int mlxsw_sp_port_attr_set(struct net_device *dev,
336 const struct switchdev_attr *attr,
337 struct switchdev_trans *trans)
338{
339 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
340 int err = 0;
341
Ido Schimmel54a73202015-12-15 16:03:41 +0100342 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
343 if (!mlxsw_sp_port)
344 return -EINVAL;
345
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200346 switch (attr->id) {
347 case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
348 err = mlxsw_sp_port_attr_stp_state_set(mlxsw_sp_port, trans,
349 attr->u.stp_state);
350 break;
351 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
352 err = mlxsw_sp_port_attr_br_flags_set(mlxsw_sp_port, trans,
353 attr->u.brport_flags);
354 break;
355 case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME:
356 err = mlxsw_sp_port_attr_br_ageing_set(mlxsw_sp_port, trans,
357 attr->u.ageing_time);
358 break;
Elad Raz26a4ea02016-01-06 13:01:10 +0100359 case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING:
360 err = mlxsw_sp_port_attr_br_vlan_set(mlxsw_sp_port, trans,
361 attr->orig_dev,
362 attr->u.vlan_filtering);
363 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200364 default:
365 err = -EOPNOTSUPP;
366 break;
367 }
368
369 return err;
370}
371
372static int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
373{
374 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
375 char spvid_pl[MLXSW_REG_SPVID_LEN];
376
377 mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid);
378 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
379}
380
381static int mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid)
382{
383 char sfmr_pl[MLXSW_REG_SFMR_LEN];
384 int err;
385
386 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID, fid, fid);
387 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
388
389 if (err)
390 return err;
391
392 set_bit(fid, mlxsw_sp->active_fids);
393 return 0;
394}
395
396static void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, u16 fid)
397{
398 char sfmr_pl[MLXSW_REG_SFMR_LEN];
399
400 clear_bit(fid, mlxsw_sp->active_fids);
401
402 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_DESTROY_FID,
403 fid, fid);
404 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
405}
406
407static int mlxsw_sp_port_fid_map(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
408{
409 enum mlxsw_reg_svfa_mt mt;
410
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100411 if (!list_empty(&mlxsw_sp_port->vports_list))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200412 mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
413 else
414 mt = MLXSW_REG_SVFA_MT_VID_TO_FID;
415
416 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, fid, fid);
417}
418
419static int mlxsw_sp_port_fid_unmap(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
420{
421 enum mlxsw_reg_svfa_mt mt;
422
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100423 if (list_empty(&mlxsw_sp_port->vports_list))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200424 return 0;
425
426 mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
427 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, fid, fid);
428}
429
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200430static int mlxsw_sp_port_add_vids(struct net_device *dev, u16 vid_begin,
431 u16 vid_end)
432{
433 u16 vid;
434 int err;
435
436 for (vid = vid_begin; vid <= vid_end; vid++) {
437 err = mlxsw_sp_port_add_vid(dev, 0, vid);
438 if (err)
439 goto err_port_add_vid;
440 }
441 return 0;
442
443err_port_add_vid:
444 for (vid--; vid >= vid_begin; vid--)
445 mlxsw_sp_port_kill_vid(dev, 0, vid);
446 return err;
447}
448
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +0100449static int __mlxsw_sp_port_vlans_set(struct mlxsw_sp_port *mlxsw_sp_port,
450 u16 vid_begin, u16 vid_end, bool is_member,
451 bool untagged)
452{
453 u16 vid, vid_e;
454 int err;
455
456 for (vid = vid_begin; vid <= vid_end;
457 vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
458 vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
459 vid_end);
460
461 err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
462 is_member, untagged);
463 if (err)
464 return err;
465 }
466
467 return 0;
468}
469
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200470static int __mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
471 u16 vid_begin, u16 vid_end,
472 bool flag_untagged, bool flag_pvid)
473{
474 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
475 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmelb07a9662015-11-19 12:27:40 +0100476 u16 vid, last_visited_vid, old_pvid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200477 enum mlxsw_reg_svfa_mt mt;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200478 int err;
479
480 /* In case this is invoked with BRIDGE_FLAGS_SELF and port is
481 * not bridged, then packets ingressing through the port with
482 * the specified VIDs will be directed to CPU.
483 */
484 if (!mlxsw_sp_port->bridged)
485 return mlxsw_sp_port_add_vids(dev, vid_begin, vid_end);
486
487 for (vid = vid_begin; vid <= vid_end; vid++) {
488 if (!test_bit(vid, mlxsw_sp->active_fids)) {
489 err = mlxsw_sp_fid_create(mlxsw_sp, vid);
490 if (err) {
491 netdev_err(dev, "Failed to create FID=%d\n",
492 vid);
493 return err;
494 }
495
496 /* When creating a FID, we set a VID to FID mapping
497 * regardless of the port's mode.
498 */
499 mt = MLXSW_REG_SVFA_MT_VID_TO_FID;
500 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt,
501 true, vid, vid);
502 if (err) {
503 netdev_err(dev, "Failed to create FID=VID=%d mapping\n",
504 vid);
Ido Schimmelb07a9662015-11-19 12:27:40 +0100505 goto err_port_vid_to_fid_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200506 }
507 }
Ido Schimmelb07a9662015-11-19 12:27:40 +0100508 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200509
Ido Schimmelb07a9662015-11-19 12:27:40 +0100510 /* Set FID mapping according to port's mode */
511 for (vid = vid_begin; vid <= vid_end; vid++) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200512 err = mlxsw_sp_port_fid_map(mlxsw_sp_port, vid);
513 if (err) {
514 netdev_err(dev, "Failed to map FID=%d", vid);
Ido Schimmelb07a9662015-11-19 12:27:40 +0100515 last_visited_vid = --vid;
516 goto err_port_fid_map;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200517 }
Ido Schimmel1b3433a2015-10-28 10:16:57 +0100518 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200519
Ido Schimmel1b3433a2015-10-28 10:16:57 +0100520 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid_begin, vid_end,
521 true, false);
522 if (err) {
523 netdev_err(dev, "Failed to configure flooding\n");
Ido Schimmelb07a9662015-11-19 12:27:40 +0100524 goto err_port_flood_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200525 }
526
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +0100527 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
528 true, flag_untagged);
529 if (err) {
530 netdev_err(dev, "Unable to add VIDs %d-%d\n", vid_begin,
531 vid_end);
Ido Schimmelb07a9662015-11-19 12:27:40 +0100532 goto err_port_vlans_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200533 }
534
Ido Schimmelb07a9662015-11-19 12:27:40 +0100535 old_pvid = mlxsw_sp_port->pvid;
536 if (flag_pvid && old_pvid != vid_begin) {
537 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid_begin);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200538 if (err) {
Ido Schimmelb07a9662015-11-19 12:27:40 +0100539 netdev_err(dev, "Unable to add PVID %d\n", vid_begin);
540 goto err_port_pvid_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200541 }
Ido Schimmelb07a9662015-11-19 12:27:40 +0100542 mlxsw_sp_port->pvid = vid_begin;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200543 }
544
545 /* Changing activity bits only if HW operation succeded */
Elad Razfc1273a2016-01-06 13:01:11 +0100546 for (vid = vid_begin; vid <= vid_end; vid++) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200547 set_bit(vid, mlxsw_sp_port->active_vlans);
Elad Razfc1273a2016-01-06 13:01:11 +0100548 if (flag_untagged)
549 set_bit(vid, mlxsw_sp_port->untagged_vlans);
550 else
551 clear_bit(vid, mlxsw_sp_port->untagged_vlans);
552 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200553
Ido Schimmelb07a9662015-11-19 12:27:40 +0100554 /* STP state change must be done after we set active VLANs */
555 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_port,
556 mlxsw_sp_port->stp_state);
557 if (err) {
558 netdev_err(dev, "Failed to set STP state\n");
559 goto err_port_stp_state_set;
560 }
561
562 return 0;
563
564err_port_vid_to_fid_set:
565 mlxsw_sp_fid_destroy(mlxsw_sp, vid);
566 return err;
567
568err_port_stp_state_set:
569 for (vid = vid_begin; vid <= vid_end; vid++)
570 clear_bit(vid, mlxsw_sp_port->active_vlans);
571 if (old_pvid != mlxsw_sp_port->pvid)
572 mlxsw_sp_port_pvid_set(mlxsw_sp_port, old_pvid);
573err_port_pvid_set:
574 __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, false,
575 false);
576err_port_vlans_set:
577 __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid_begin, vid_end, false,
578 false);
579err_port_flood_set:
580 last_visited_vid = vid_end;
581err_port_fid_map:
582 for (vid = last_visited_vid; vid >= vid_begin; vid--)
583 mlxsw_sp_port_fid_unmap(mlxsw_sp_port, vid);
584 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200585}
586
587static int mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
588 const struct switchdev_obj_port_vlan *vlan,
589 struct switchdev_trans *trans)
590{
Elad Raze4a13052016-01-06 13:01:09 +0100591 bool flag_untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
592 bool flag_pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200593
594 if (switchdev_trans_ph_prepare(trans))
595 return 0;
596
597 return __mlxsw_sp_port_vlans_add(mlxsw_sp_port,
598 vlan->vid_begin, vlan->vid_end,
Elad Raze4a13052016-01-06 13:01:09 +0100599 flag_untagged, flag_pvid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200600}
601
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100602static enum mlxsw_reg_sfd_rec_policy mlxsw_sp_sfd_rec_policy(bool dynamic)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200603{
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100604 return dynamic ? MLXSW_REG_SFD_REC_POLICY_DYNAMIC_ENTRY_INGRESS :
605 MLXSW_REG_SFD_REC_POLICY_STATIC_ENTRY;
606}
607
608static enum mlxsw_reg_sfd_op mlxsw_sp_sfd_op(bool adding)
609{
610 return adding ? MLXSW_REG_SFD_OP_WRITE_EDIT :
611 MLXSW_REG_SFD_OP_WRITE_REMOVE;
612}
613
Jiri Pirko2fa9d452016-01-07 11:50:29 +0100614static int mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmel9de6a802015-12-15 16:03:40 +0100615 const char *mac, u16 fid, bool adding,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100616 bool dynamic)
617{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200618 char *sfd_pl;
619 int err;
620
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200621 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
622 if (!sfd_pl)
623 return -ENOMEM;
624
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100625 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
626 mlxsw_reg_sfd_uc_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
Ido Schimmel9de6a802015-12-15 16:03:40 +0100627 mac, fid, MLXSW_REG_SFD_REC_ACTION_NOP,
Jiri Pirko2fa9d452016-01-07 11:50:29 +0100628 local_port);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100629 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
630 kfree(sfd_pl);
631
632 return err;
633}
634
635static int mlxsw_sp_port_fdb_uc_lag_op(struct mlxsw_sp *mlxsw_sp, u16 lag_id,
Ido Schimmel64771e32015-12-15 16:03:46 +0100636 const char *mac, u16 fid, u16 lag_vid,
637 bool adding, bool dynamic)
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100638{
639 char *sfd_pl;
640 int err;
641
642 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
643 if (!sfd_pl)
644 return -ENOMEM;
645
646 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
647 mlxsw_reg_sfd_uc_lag_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
Ido Schimmel64771e32015-12-15 16:03:46 +0100648 mac, fid, MLXSW_REG_SFD_REC_ACTION_NOP,
649 lag_vid, lag_id);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100650 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200651 kfree(sfd_pl);
652
653 return err;
654}
655
656static int
657mlxsw_sp_port_fdb_static_add(struct mlxsw_sp_port *mlxsw_sp_port,
658 const struct switchdev_obj_port_fdb *fdb,
659 struct switchdev_trans *trans)
660{
Elad Raze4b6f692016-01-10 21:06:27 +0100661 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
Ido Schimmel64771e32015-12-15 16:03:46 +0100662 u16 lag_vid = 0;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100663
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200664 if (switchdev_trans_ph_prepare(trans))
665 return 0;
666
Ido Schimmel54a73202015-12-15 16:03:41 +0100667 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
Ido Schimmel64771e32015-12-15 16:03:46 +0100668 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
Ido Schimmel54a73202015-12-15 16:03:41 +0100669 }
670
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100671 if (!mlxsw_sp_port->lagged)
Jiri Pirko2fa9d452016-01-07 11:50:29 +0100672 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
673 mlxsw_sp_port->local_port,
Ido Schimmel9de6a802015-12-15 16:03:40 +0100674 fdb->addr, fid, true, false);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100675 else
676 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
677 mlxsw_sp_port->lag_id,
Ido Schimmel64771e32015-12-15 16:03:46 +0100678 fdb->addr, fid, lag_vid,
679 true, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200680}
681
Elad Raz3a49b4f2016-01-10 21:06:28 +0100682static int mlxsw_sp_port_mdb_op(struct mlxsw_sp *mlxsw_sp, const char *addr,
683 u16 fid, u16 mid, bool adding)
684{
685 char *sfd_pl;
686 int err;
687
688 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
689 if (!sfd_pl)
690 return -ENOMEM;
691
692 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
693 mlxsw_reg_sfd_mc_pack(sfd_pl, 0, addr, fid,
694 MLXSW_REG_SFD_REC_ACTION_NOP, mid);
695 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
696 kfree(sfd_pl);
697 return err;
698}
699
700static int mlxsw_sp_port_smid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mid,
701 bool add, bool clear_all_ports)
702{
703 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
704 char *smid_pl;
705 int err, i;
706
707 smid_pl = kmalloc(MLXSW_REG_SMID_LEN, GFP_KERNEL);
708 if (!smid_pl)
709 return -ENOMEM;
710
711 mlxsw_reg_smid_pack(smid_pl, mid, mlxsw_sp_port->local_port, add);
712 if (clear_all_ports) {
713 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
714 if (mlxsw_sp->ports[i])
715 mlxsw_reg_smid_port_mask_set(smid_pl, i, 1);
716 }
717 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl);
718 kfree(smid_pl);
719 return err;
720}
721
722static struct mlxsw_sp_mid *__mlxsw_sp_mc_get(struct mlxsw_sp *mlxsw_sp,
723 const unsigned char *addr,
724 u16 vid)
725{
726 struct mlxsw_sp_mid *mid;
727
728 list_for_each_entry(mid, &mlxsw_sp->br_mids.list, list) {
729 if (ether_addr_equal(mid->addr, addr) && mid->vid == vid)
730 return mid;
731 }
732 return NULL;
733}
734
735static struct mlxsw_sp_mid *__mlxsw_sp_mc_alloc(struct mlxsw_sp *mlxsw_sp,
736 const unsigned char *addr,
737 u16 vid)
738{
739 struct mlxsw_sp_mid *mid;
740 u16 mid_idx;
741
742 mid_idx = find_first_zero_bit(mlxsw_sp->br_mids.mapped,
743 MLXSW_SP_MID_MAX);
744 if (mid_idx == MLXSW_SP_MID_MAX)
745 return NULL;
746
747 mid = kzalloc(sizeof(*mid), GFP_KERNEL);
748 if (!mid)
749 return NULL;
750
751 set_bit(mid_idx, mlxsw_sp->br_mids.mapped);
752 ether_addr_copy(mid->addr, addr);
753 mid->vid = vid;
754 mid->mid = mid_idx;
755 mid->ref_count = 0;
756 list_add_tail(&mid->list, &mlxsw_sp->br_mids.list);
757
758 return mid;
759}
760
761static int __mlxsw_sp_mc_dec_ref(struct mlxsw_sp *mlxsw_sp,
762 struct mlxsw_sp_mid *mid)
763{
764 if (--mid->ref_count == 0) {
765 list_del(&mid->list);
766 clear_bit(mid->mid, mlxsw_sp->br_mids.mapped);
767 kfree(mid);
768 return 1;
769 }
770 return 0;
771}
772
773static int mlxsw_sp_port_mdb_add(struct mlxsw_sp_port *mlxsw_sp_port,
774 const struct switchdev_obj_port_mdb *mdb,
775 struct switchdev_trans *trans)
776{
777 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
778 struct net_device *dev = mlxsw_sp_port->dev;
779 struct mlxsw_sp_mid *mid;
780 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
781 int err = 0;
782
783 if (switchdev_trans_ph_prepare(trans))
784 return 0;
785
786 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
787 if (!mid) {
788 mid = __mlxsw_sp_mc_alloc(mlxsw_sp, mdb->addr, mdb->vid);
789 if (!mid) {
790 netdev_err(dev, "Unable to allocate MC group\n");
791 return -ENOMEM;
792 }
793 }
794 mid->ref_count++;
795
796 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, true,
797 mid->ref_count == 1);
798 if (err) {
799 netdev_err(dev, "Unable to set SMID\n");
800 goto err_out;
801 }
802
803 if (mid->ref_count == 1) {
804 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid->mid,
805 true);
806 if (err) {
807 netdev_err(dev, "Unable to set MC SFD\n");
808 goto err_out;
809 }
810 }
811
812 return 0;
813
814err_out:
815 __mlxsw_sp_mc_dec_ref(mlxsw_sp, mid);
816 return err;
817}
818
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200819static int mlxsw_sp_port_obj_add(struct net_device *dev,
820 const struct switchdev_obj *obj,
821 struct switchdev_trans *trans)
822{
823 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
824 int err = 0;
825
Ido Schimmel54a73202015-12-15 16:03:41 +0100826 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
827 if (!mlxsw_sp_port)
828 return -EINVAL;
829
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200830 switch (obj->id) {
831 case SWITCHDEV_OBJ_ID_PORT_VLAN:
Ido Schimmel54a73202015-12-15 16:03:41 +0100832 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
833 return 0;
834
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200835 err = mlxsw_sp_port_vlans_add(mlxsw_sp_port,
836 SWITCHDEV_OBJ_PORT_VLAN(obj),
837 trans);
838 break;
839 case SWITCHDEV_OBJ_ID_PORT_FDB:
840 err = mlxsw_sp_port_fdb_static_add(mlxsw_sp_port,
841 SWITCHDEV_OBJ_PORT_FDB(obj),
842 trans);
843 break;
Elad Raz3a49b4f2016-01-10 21:06:28 +0100844 case SWITCHDEV_OBJ_ID_PORT_MDB:
845 err = mlxsw_sp_port_mdb_add(mlxsw_sp_port,
846 SWITCHDEV_OBJ_PORT_MDB(obj),
847 trans);
848 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200849 default:
850 err = -EOPNOTSUPP;
851 break;
852 }
853
854 return err;
855}
856
857static int mlxsw_sp_port_kill_vids(struct net_device *dev, u16 vid_begin,
858 u16 vid_end)
859{
860 u16 vid;
861 int err;
862
863 for (vid = vid_begin; vid <= vid_end; vid++) {
864 err = mlxsw_sp_port_kill_vid(dev, 0, vid);
865 if (err)
866 return err;
867 }
868
869 return 0;
870}
871
872static int __mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
873 u16 vid_begin, u16 vid_end, bool init)
874{
875 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +0100876 u16 vid, pvid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200877 int err;
878
879 /* In case this is invoked with BRIDGE_FLAGS_SELF and port is
880 * not bridged, then prevent packets ingressing through the
881 * port with the specified VIDs from being trapped to CPU.
882 */
883 if (!init && !mlxsw_sp_port->bridged)
884 return mlxsw_sp_port_kill_vids(dev, vid_begin, vid_end);
885
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +0100886 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
887 false, false);
888 if (err) {
889 netdev_err(dev, "Unable to del VIDs %d-%d\n", vid_begin,
890 vid_end);
891 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200892 }
893
Ido Schimmel06c071f2015-11-19 12:27:38 +0100894 pvid = mlxsw_sp_port->pvid;
895 if (pvid >= vid_begin && pvid <= vid_end && pvid != 1) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200896 /* Default VLAN is always 1 */
Ido Schimmel06c071f2015-11-19 12:27:38 +0100897 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200898 if (err) {
Ido Schimmel06c071f2015-11-19 12:27:38 +0100899 netdev_err(dev, "Unable to del PVID %d\n", pvid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200900 return err;
901 }
Ido Schimmel06c071f2015-11-19 12:27:38 +0100902 mlxsw_sp_port->pvid = 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200903 }
904
905 if (init)
906 goto out;
907
Ido Schimmel1b3433a2015-10-28 10:16:57 +0100908 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid_begin, vid_end,
909 false, false);
910 if (err) {
911 netdev_err(dev, "Failed to clear flooding\n");
912 return err;
913 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200914
Ido Schimmel1b3433a2015-10-28 10:16:57 +0100915 for (vid = vid_begin; vid <= vid_end; vid++) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200916 /* Remove FID mapping in case of Virtual mode */
917 err = mlxsw_sp_port_fid_unmap(mlxsw_sp_port, vid);
918 if (err) {
919 netdev_err(dev, "Failed to unmap FID=%d", vid);
920 return err;
921 }
922 }
923
924out:
925 /* Changing activity bits only if HW operation succeded */
926 for (vid = vid_begin; vid <= vid_end; vid++)
927 clear_bit(vid, mlxsw_sp_port->active_vlans);
928
929 return 0;
930}
931
932static int mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
933 const struct switchdev_obj_port_vlan *vlan)
934{
935 return __mlxsw_sp_port_vlans_del(mlxsw_sp_port,
936 vlan->vid_begin, vlan->vid_end, false);
937}
938
939static int
940mlxsw_sp_port_fdb_static_del(struct mlxsw_sp_port *mlxsw_sp_port,
941 const struct switchdev_obj_port_fdb *fdb)
942{
Elad Raze4b6f692016-01-10 21:06:27 +0100943 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
Ido Schimmel64771e32015-12-15 16:03:46 +0100944 u16 lag_vid = 0;
Ido Schimmel9de6a802015-12-15 16:03:40 +0100945
Ido Schimmel54a73202015-12-15 16:03:41 +0100946 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
Ido Schimmel64771e32015-12-15 16:03:46 +0100947 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
Ido Schimmel54a73202015-12-15 16:03:41 +0100948 }
949
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100950 if (!mlxsw_sp_port->lagged)
Jiri Pirko2fa9d452016-01-07 11:50:29 +0100951 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
952 mlxsw_sp_port->local_port,
Ido Schimmel9de6a802015-12-15 16:03:40 +0100953 fdb->addr, fid,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100954 false, false);
955 else
956 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
957 mlxsw_sp_port->lag_id,
Ido Schimmel64771e32015-12-15 16:03:46 +0100958 fdb->addr, fid, lag_vid,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100959 false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200960}
961
Elad Raz3a49b4f2016-01-10 21:06:28 +0100962static int mlxsw_sp_port_mdb_del(struct mlxsw_sp_port *mlxsw_sp_port,
963 const struct switchdev_obj_port_mdb *mdb)
964{
965 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
966 struct net_device *dev = mlxsw_sp_port->dev;
967 struct mlxsw_sp_mid *mid;
968 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
969 u16 mid_idx;
970 int err = 0;
971
972 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
973 if (!mid) {
974 netdev_err(dev, "Unable to remove port from MC DB\n");
975 return -EINVAL;
976 }
977
978 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, false, false);
979 if (err)
980 netdev_err(dev, "Unable to remove port from SMID\n");
981
982 mid_idx = mid->mid;
983 if (__mlxsw_sp_mc_dec_ref(mlxsw_sp, mid)) {
984 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid_idx,
985 false);
986 if (err)
987 netdev_err(dev, "Unable to remove MC SFD\n");
988 }
989
990 return err;
991}
992
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200993static int mlxsw_sp_port_obj_del(struct net_device *dev,
994 const struct switchdev_obj *obj)
995{
996 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
997 int err = 0;
998
Ido Schimmel54a73202015-12-15 16:03:41 +0100999 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1000 if (!mlxsw_sp_port)
1001 return -EINVAL;
1002
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001003 switch (obj->id) {
1004 case SWITCHDEV_OBJ_ID_PORT_VLAN:
Ido Schimmel54a73202015-12-15 16:03:41 +01001005 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
1006 return 0;
1007
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001008 err = mlxsw_sp_port_vlans_del(mlxsw_sp_port,
1009 SWITCHDEV_OBJ_PORT_VLAN(obj));
1010 break;
1011 case SWITCHDEV_OBJ_ID_PORT_FDB:
1012 err = mlxsw_sp_port_fdb_static_del(mlxsw_sp_port,
1013 SWITCHDEV_OBJ_PORT_FDB(obj));
1014 break;
Elad Raz3a49b4f2016-01-10 21:06:28 +01001015 case SWITCHDEV_OBJ_ID_PORT_MDB:
1016 err = mlxsw_sp_port_mdb_del(mlxsw_sp_port,
1017 SWITCHDEV_OBJ_PORT_MDB(obj));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001018 default:
1019 err = -EOPNOTSUPP;
1020 break;
1021 }
1022
1023 return err;
1024}
1025
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001026static struct mlxsw_sp_port *mlxsw_sp_lag_rep_port(struct mlxsw_sp *mlxsw_sp,
1027 u16 lag_id)
1028{
1029 struct mlxsw_sp_port *mlxsw_sp_port;
1030 int i;
1031
1032 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
1033 mlxsw_sp_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
1034 if (mlxsw_sp_port)
1035 return mlxsw_sp_port;
1036 }
1037 return NULL;
1038}
1039
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001040static int mlxsw_sp_port_fdb_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1041 struct switchdev_obj_port_fdb *fdb,
1042 switchdev_obj_dump_cb_t *cb)
1043{
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001044 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel54a73202015-12-15 16:03:41 +01001045 u16 vport_vid = 0, vport_fid = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001046 char *sfd_pl;
1047 char mac[ETH_ALEN];
Ido Schimmel9de6a802015-12-15 16:03:40 +01001048 u16 fid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001049 u8 local_port;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001050 u16 lag_id;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001051 u8 num_rec;
1052 int stored_err = 0;
1053 int i;
1054 int err;
1055
1056 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
1057 if (!sfd_pl)
1058 return -ENOMEM;
1059
Ido Schimmel54a73202015-12-15 16:03:41 +01001060 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
1061 u16 tmp;
1062
1063 tmp = mlxsw_sp_vport_vfid_get(mlxsw_sp_port);
1064 vport_fid = mlxsw_sp_vfid_to_fid(tmp);
1065 vport_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1066 }
1067
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001068 mlxsw_reg_sfd_pack(sfd_pl, MLXSW_REG_SFD_OP_QUERY_DUMP, 0);
1069 do {
1070 mlxsw_reg_sfd_num_rec_set(sfd_pl, MLXSW_REG_SFD_REC_MAX_COUNT);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001071 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001072 if (err)
1073 goto out;
1074
1075 num_rec = mlxsw_reg_sfd_num_rec_get(sfd_pl);
1076
1077 /* Even in case of error, we have to run the dump to the end
1078 * so the session in firmware is finished.
1079 */
1080 if (stored_err)
1081 continue;
1082
1083 for (i = 0; i < num_rec; i++) {
1084 switch (mlxsw_reg_sfd_rec_type_get(sfd_pl, i)) {
1085 case MLXSW_REG_SFD_REC_TYPE_UNICAST:
Ido Schimmel9de6a802015-12-15 16:03:40 +01001086 mlxsw_reg_sfd_uc_unpack(sfd_pl, i, mac, &fid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001087 &local_port);
1088 if (local_port == mlxsw_sp_port->local_port) {
Ido Schimmel54a73202015-12-15 16:03:41 +01001089 if (vport_fid && vport_fid != fid)
1090 continue;
1091 else if (vport_fid)
1092 fdb->vid = vport_vid;
1093 else
1094 fdb->vid = fid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001095 ether_addr_copy(fdb->addr, mac);
1096 fdb->ndm_state = NUD_REACHABLE;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001097 err = cb(&fdb->obj);
1098 if (err)
1099 stored_err = err;
1100 }
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001101 break;
1102 case MLXSW_REG_SFD_REC_TYPE_UNICAST_LAG:
1103 mlxsw_reg_sfd_uc_lag_unpack(sfd_pl, i,
Ido Schimmel9de6a802015-12-15 16:03:40 +01001104 mac, &fid, &lag_id);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001105 if (mlxsw_sp_port ==
1106 mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id)) {
Ido Schimmel54a73202015-12-15 16:03:41 +01001107 if (vport_fid && vport_fid != fid)
1108 continue;
1109 else if (vport_fid)
1110 fdb->vid = vport_vid;
1111 else
1112 fdb->vid = fid;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001113 ether_addr_copy(fdb->addr, mac);
1114 fdb->ndm_state = NUD_REACHABLE;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001115 err = cb(&fdb->obj);
1116 if (err)
1117 stored_err = err;
1118 }
1119 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120 }
1121 }
1122 } while (num_rec == MLXSW_REG_SFD_REC_MAX_COUNT);
1123
1124out:
1125 kfree(sfd_pl);
1126 return stored_err ? stored_err : err;
1127}
1128
1129static int mlxsw_sp_port_vlan_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1130 struct switchdev_obj_port_vlan *vlan,
1131 switchdev_obj_dump_cb_t *cb)
1132{
1133 u16 vid;
1134 int err = 0;
1135
Ido Schimmel54a73202015-12-15 16:03:41 +01001136 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
1137 vlan->flags = 0;
1138 vlan->vid_begin = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1139 vlan->vid_end = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1140 return cb(&vlan->obj);
1141 }
1142
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001143 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1144 vlan->flags = 0;
1145 if (vid == mlxsw_sp_port->pvid)
1146 vlan->flags |= BRIDGE_VLAN_INFO_PVID;
Elad Razfc1273a2016-01-06 13:01:11 +01001147 if (test_bit(vid, mlxsw_sp_port->untagged_vlans))
1148 vlan->flags |= BRIDGE_VLAN_INFO_UNTAGGED;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001149 vlan->vid_begin = vid;
1150 vlan->vid_end = vid;
1151 err = cb(&vlan->obj);
1152 if (err)
1153 break;
1154 }
1155 return err;
1156}
1157
1158static int mlxsw_sp_port_obj_dump(struct net_device *dev,
1159 struct switchdev_obj *obj,
1160 switchdev_obj_dump_cb_t *cb)
1161{
1162 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1163 int err = 0;
1164
Ido Schimmel54a73202015-12-15 16:03:41 +01001165 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1166 if (!mlxsw_sp_port)
1167 return -EINVAL;
1168
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001169 switch (obj->id) {
1170 case SWITCHDEV_OBJ_ID_PORT_VLAN:
1171 err = mlxsw_sp_port_vlan_dump(mlxsw_sp_port,
1172 SWITCHDEV_OBJ_PORT_VLAN(obj), cb);
1173 break;
1174 case SWITCHDEV_OBJ_ID_PORT_FDB:
1175 err = mlxsw_sp_port_fdb_dump(mlxsw_sp_port,
1176 SWITCHDEV_OBJ_PORT_FDB(obj), cb);
1177 break;
1178 default:
1179 err = -EOPNOTSUPP;
1180 break;
1181 }
1182
1183 return err;
1184}
1185
Jiri Pirkoc7070fc2015-10-28 10:17:05 +01001186static const struct switchdev_ops mlxsw_sp_port_switchdev_ops = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001187 .switchdev_port_attr_get = mlxsw_sp_port_attr_get,
1188 .switchdev_port_attr_set = mlxsw_sp_port_attr_set,
1189 .switchdev_port_obj_add = mlxsw_sp_port_obj_add,
1190 .switchdev_port_obj_del = mlxsw_sp_port_obj_del,
1191 .switchdev_port_obj_dump = mlxsw_sp_port_obj_dump,
1192};
1193
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001194static void mlxsw_sp_fdb_call_notifiers(bool learning, bool learning_sync,
1195 bool adding, char *mac, u16 vid,
1196 struct net_device *dev)
1197{
1198 struct switchdev_notifier_fdb_info info;
1199 unsigned long notifier_type;
1200
1201 if (learning && learning_sync) {
1202 info.addr = mac;
1203 info.vid = vid;
1204 notifier_type = adding ? SWITCHDEV_FDB_ADD : SWITCHDEV_FDB_DEL;
1205 call_switchdev_notifiers(notifier_type, dev, &info.info);
1206 }
1207}
1208
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001209static void mlxsw_sp_fdb_notify_mac_process(struct mlxsw_sp *mlxsw_sp,
1210 char *sfn_pl, int rec_index,
1211 bool adding)
1212{
1213 struct mlxsw_sp_port *mlxsw_sp_port;
1214 char mac[ETH_ALEN];
1215 u8 local_port;
Ido Schimmel9de6a802015-12-15 16:03:40 +01001216 u16 vid, fid;
Jiri Pirko12f15012016-01-07 11:50:30 +01001217 bool do_notification = true;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001218 int err;
1219
Ido Schimmel9de6a802015-12-15 16:03:40 +01001220 mlxsw_reg_sfn_mac_unpack(sfn_pl, rec_index, mac, &fid, &local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001221 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1222 if (!mlxsw_sp_port) {
1223 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Incorrect local port in FDB notification\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001224 goto just_remove;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001225 }
1226
Ido Schimmelaac78a42015-12-15 16:03:42 +01001227 if (mlxsw_sp_fid_is_vfid(fid)) {
1228 u16 vfid = mlxsw_sp_fid_to_vfid(fid);
1229 struct mlxsw_sp_port *mlxsw_sp_vport;
1230
1231 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_vfid(mlxsw_sp_port,
1232 vfid);
1233 if (!mlxsw_sp_vport) {
1234 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001235 goto just_remove;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001236 }
Ido Schimmelaac78a42015-12-15 16:03:42 +01001237 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
1238 /* Override the physical port with the vPort. */
1239 mlxsw_sp_port = mlxsw_sp_vport;
1240 } else {
1241 vid = fid;
1242 }
1243
Jiri Pirko12f15012016-01-07 11:50:30 +01001244 adding = adding && mlxsw_sp_port->learning;
1245
1246do_fdb_op:
Jiri Pirko2fa9d452016-01-07 11:50:29 +01001247 err = mlxsw_sp_port_fdb_uc_op(mlxsw_sp, local_port, mac, fid,
Jiri Pirko12f15012016-01-07 11:50:30 +01001248 adding, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001249 if (err) {
1250 if (net_ratelimit())
1251 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1252 return;
1253 }
1254
Jiri Pirko12f15012016-01-07 11:50:30 +01001255 if (!do_notification)
1256 return;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001257 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning,
1258 mlxsw_sp_port->learning_sync,
1259 adding, mac, vid, mlxsw_sp_port->dev);
Jiri Pirko12f15012016-01-07 11:50:30 +01001260 return;
1261
1262just_remove:
1263 adding = false;
1264 do_notification = false;
1265 goto do_fdb_op;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001266}
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001267
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001268static void mlxsw_sp_fdb_notify_mac_lag_process(struct mlxsw_sp *mlxsw_sp,
1269 char *sfn_pl, int rec_index,
1270 bool adding)
1271{
1272 struct mlxsw_sp_port *mlxsw_sp_port;
1273 char mac[ETH_ALEN];
Ido Schimmel64771e32015-12-15 16:03:46 +01001274 u16 lag_vid = 0;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001275 u16 lag_id;
Ido Schimmel9de6a802015-12-15 16:03:40 +01001276 u16 vid, fid;
Jiri Pirko12f15012016-01-07 11:50:30 +01001277 bool do_notification = true;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001278 int err;
1279
Ido Schimmel9de6a802015-12-15 16:03:40 +01001280 mlxsw_reg_sfn_mac_lag_unpack(sfn_pl, rec_index, mac, &fid, &lag_id);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001281 mlxsw_sp_port = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
1282 if (!mlxsw_sp_port) {
1283 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Cannot find port representor for LAG\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001284 goto just_remove;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001285 }
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001286
Ido Schimmelaac78a42015-12-15 16:03:42 +01001287 if (mlxsw_sp_fid_is_vfid(fid)) {
1288 u16 vfid = mlxsw_sp_fid_to_vfid(fid);
1289 struct mlxsw_sp_port *mlxsw_sp_vport;
1290
1291 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_vfid(mlxsw_sp_port,
1292 vfid);
1293 if (!mlxsw_sp_vport) {
1294 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001295 goto just_remove;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001296 }
1297
1298 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel64771e32015-12-15 16:03:46 +01001299 lag_vid = vid;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001300 /* Override the physical port with the vPort. */
1301 mlxsw_sp_port = mlxsw_sp_vport;
1302 } else {
1303 vid = fid;
1304 }
1305
Jiri Pirko12f15012016-01-07 11:50:30 +01001306 adding = adding && mlxsw_sp_port->learning;
1307
1308do_fdb_op:
Ido Schimmel64771e32015-12-15 16:03:46 +01001309 err = mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp, lag_id, mac, fid, lag_vid,
Jiri Pirko12f15012016-01-07 11:50:30 +01001310 adding, true);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001311 if (err) {
1312 if (net_ratelimit())
1313 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1314 return;
1315 }
1316
Jiri Pirko12f15012016-01-07 11:50:30 +01001317 if (!do_notification)
1318 return;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001319 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning,
1320 mlxsw_sp_port->learning_sync,
1321 adding, mac, vid,
1322 mlxsw_sp_lag_get(mlxsw_sp, lag_id)->dev);
Jiri Pirko12f15012016-01-07 11:50:30 +01001323 return;
1324
1325just_remove:
1326 adding = false;
1327 do_notification = false;
1328 goto do_fdb_op;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001329}
1330
1331static void mlxsw_sp_fdb_notify_rec_process(struct mlxsw_sp *mlxsw_sp,
1332 char *sfn_pl, int rec_index)
1333{
1334 switch (mlxsw_reg_sfn_rec_type_get(sfn_pl, rec_index)) {
1335 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC:
1336 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1337 rec_index, true);
1338 break;
1339 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC:
1340 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1341 rec_index, false);
1342 break;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001343 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC_LAG:
1344 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1345 rec_index, true);
1346 break;
1347 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC_LAG:
1348 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1349 rec_index, false);
1350 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001351 }
1352}
1353
1354static void mlxsw_sp_fdb_notify_work_schedule(struct mlxsw_sp *mlxsw_sp)
1355{
1356 schedule_delayed_work(&mlxsw_sp->fdb_notify.dw,
1357 msecs_to_jiffies(mlxsw_sp->fdb_notify.interval));
1358}
1359
1360static void mlxsw_sp_fdb_notify_work(struct work_struct *work)
1361{
1362 struct mlxsw_sp *mlxsw_sp;
1363 char *sfn_pl;
1364 u8 num_rec;
1365 int i;
1366 int err;
1367
1368 sfn_pl = kmalloc(MLXSW_REG_SFN_LEN, GFP_KERNEL);
1369 if (!sfn_pl)
1370 return;
1371
1372 mlxsw_sp = container_of(work, struct mlxsw_sp, fdb_notify.dw.work);
1373
1374 do {
1375 mlxsw_reg_sfn_pack(sfn_pl);
1376 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfn), sfn_pl);
1377 if (err) {
1378 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Failed to get FDB notifications\n");
1379 break;
1380 }
1381 num_rec = mlxsw_reg_sfn_num_rec_get(sfn_pl);
1382 for (i = 0; i < num_rec; i++)
1383 mlxsw_sp_fdb_notify_rec_process(mlxsw_sp, sfn_pl, i);
1384
1385 } while (num_rec);
1386
1387 kfree(sfn_pl);
1388 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1389}
1390
1391static int mlxsw_sp_fdb_init(struct mlxsw_sp *mlxsw_sp)
1392{
1393 int err;
1394
1395 err = mlxsw_sp_ageing_set(mlxsw_sp, MLXSW_SP_DEFAULT_AGEING_TIME);
1396 if (err) {
1397 dev_err(mlxsw_sp->bus_info->dev, "Failed to set default ageing time\n");
1398 return err;
1399 }
1400 INIT_DELAYED_WORK(&mlxsw_sp->fdb_notify.dw, mlxsw_sp_fdb_notify_work);
1401 mlxsw_sp->fdb_notify.interval = MLXSW_SP_DEFAULT_LEARNING_INTERVAL;
1402 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1403 return 0;
1404}
1405
1406static void mlxsw_sp_fdb_fini(struct mlxsw_sp *mlxsw_sp)
1407{
1408 cancel_delayed_work_sync(&mlxsw_sp->fdb_notify.dw);
1409}
1410
1411static void mlxsw_sp_fids_fini(struct mlxsw_sp *mlxsw_sp)
1412{
1413 u16 fid;
1414
1415 for_each_set_bit(fid, mlxsw_sp->active_fids, VLAN_N_VID)
1416 mlxsw_sp_fid_destroy(mlxsw_sp, fid);
1417}
1418
1419int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp)
1420{
1421 return mlxsw_sp_fdb_init(mlxsw_sp);
1422}
1423
1424void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp)
1425{
1426 mlxsw_sp_fdb_fini(mlxsw_sp);
1427 mlxsw_sp_fids_fini(mlxsw_sp);
1428}
1429
1430int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port)
1431{
1432 struct net_device *dev = mlxsw_sp_port->dev;
1433 int err;
1434
1435 /* Allow only untagged packets to ingress and tag them internally
1436 * with VID 1.
1437 */
1438 mlxsw_sp_port->pvid = 1;
Elad Raz29edf442016-01-06 13:01:08 +01001439 err = __mlxsw_sp_port_vlans_del(mlxsw_sp_port, 0, VLAN_N_VID - 1,
1440 true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001441 if (err) {
1442 netdev_err(dev, "Unable to init VLANs\n");
1443 return err;
1444 }
1445
1446 /* Add implicit VLAN interface in the device, so that untagged
1447 * packets will be classified to the default vFID.
1448 */
1449 err = mlxsw_sp_port_add_vid(dev, 0, 1);
1450 if (err)
1451 netdev_err(dev, "Failed to configure default vFID\n");
1452
1453 return err;
1454}
1455
1456void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port)
1457{
1458 mlxsw_sp_port->dev->switchdev_ops = &mlxsw_sp_port_switchdev_ops;
1459}
1460
1461void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port)
1462{
1463}