Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1 | /* |
| 2 | * phy_302_calibration.c |
| 3 | * |
| 4 | * Copyright (C) 2002, 2005 Winbond Electronics Corp. |
| 5 | * |
| 6 | * modification history |
| 7 | * --------------------------------------------------------------------------- |
| 8 | * 0.01.001, 2003-04-16, Kevin created |
| 9 | * |
| 10 | */ |
| 11 | |
| 12 | /****************** INCLUDE FILES SECTION ***********************************/ |
Pekka Enberg | 7e797ab | 2009-01-07 17:32:58 +0200 | [diff] [blame] | 13 | #include "sysdef.h" |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 14 | #include "phy_calibration.h" |
Pekka Enberg | 80aba53 | 2008-10-30 13:04:29 +0200 | [diff] [blame] | 15 | #include "wbhal_f.h" |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 16 | |
| 17 | |
| 18 | /****************** DEBUG CONSTANT AND MACRO SECTION ************************/ |
| 19 | |
| 20 | /****************** LOCAL CONSTANT AND MACRO SECTION ************************/ |
| 21 | #define LOOP_TIMES 20 |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 22 | #define US 1000/* MICROSECOND*/ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 23 | |
| 24 | #define AG_CONST 0.6072529350 |
| 25 | #define FIXED(X) ((s32)((X) * 32768.0)) |
| 26 | #define DEG2RAD(X) 0.017453 * (X) |
| 27 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 28 | static const s32 Angles[] = { |
| 29 | FIXED(DEG2RAD(45.0)), FIXED(DEG2RAD(26.565)), FIXED(DEG2RAD(14.0362)), |
| 30 | FIXED(DEG2RAD(7.12502)), FIXED(DEG2RAD(3.57633)), FIXED(DEG2RAD(1.78991)), |
| 31 | FIXED(DEG2RAD(0.895174)), FIXED(DEG2RAD(0.447614)), FIXED(DEG2RAD(0.223811)), |
| 32 | FIXED(DEG2RAD(0.111906)), FIXED(DEG2RAD(0.055953)), FIXED(DEG2RAD(0.027977)) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 33 | }; |
| 34 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 35 | /****************** LOCAL FUNCTION DECLARATION SECTION ********************** |
| 36 | |
| 37 | /* |
| 38 | * void _phy_rf_write_delay(struct hw_data *phw_data); |
| 39 | * void phy_init_rf(struct hw_data *phw_data); |
| 40 | */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 41 | |
| 42 | /****************** FUNCTION DEFINITION SECTION *****************************/ |
| 43 | |
| 44 | s32 _s13_to_s32(u32 data) |
| 45 | { |
| 46 | u32 val; |
| 47 | |
| 48 | val = (data & 0x0FFF); |
| 49 | |
| 50 | if ((data & BIT(12)) != 0) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 51 | val |= 0xFFFFF000; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 52 | |
| 53 | return ((s32) val); |
| 54 | } |
| 55 | |
| 56 | u32 _s32_to_s13(s32 data) |
| 57 | { |
| 58 | u32 val; |
| 59 | |
| 60 | if (data > 4095) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 61 | data = 4095; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 62 | else if (data < -4096) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 63 | data = -4096; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 64 | |
| 65 | val = data & 0x1FFF; |
| 66 | |
| 67 | return val; |
| 68 | } |
| 69 | |
| 70 | /****************************************************************************/ |
| 71 | s32 _s4_to_s32(u32 data) |
| 72 | { |
| 73 | s32 val; |
| 74 | |
| 75 | val = (data & 0x0007); |
| 76 | |
| 77 | if ((data & BIT(3)) != 0) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 78 | val |= 0xFFFFFFF8; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 79 | |
| 80 | return val; |
| 81 | } |
| 82 | |
| 83 | u32 _s32_to_s4(s32 data) |
| 84 | { |
| 85 | u32 val; |
| 86 | |
| 87 | if (data > 7) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 88 | data = 7; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 89 | else if (data < -8) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 90 | data = -8; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 91 | |
| 92 | val = data & 0x000F; |
| 93 | |
| 94 | return val; |
| 95 | } |
| 96 | |
| 97 | /****************************************************************************/ |
| 98 | s32 _s5_to_s32(u32 data) |
| 99 | { |
| 100 | s32 val; |
| 101 | |
| 102 | val = (data & 0x000F); |
| 103 | |
| 104 | if ((data & BIT(4)) != 0) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 105 | val |= 0xFFFFFFF0; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 106 | |
| 107 | return val; |
| 108 | } |
| 109 | |
| 110 | u32 _s32_to_s5(s32 data) |
| 111 | { |
| 112 | u32 val; |
| 113 | |
| 114 | if (data > 15) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 115 | data = 15; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 116 | else if (data < -16) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 117 | data = -16; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 118 | |
| 119 | val = data & 0x001F; |
| 120 | |
| 121 | return val; |
| 122 | } |
| 123 | |
| 124 | /****************************************************************************/ |
| 125 | s32 _s6_to_s32(u32 data) |
| 126 | { |
| 127 | s32 val; |
| 128 | |
| 129 | val = (data & 0x001F); |
| 130 | |
| 131 | if ((data & BIT(5)) != 0) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 132 | val |= 0xFFFFFFE0; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 133 | |
| 134 | return val; |
| 135 | } |
| 136 | |
| 137 | u32 _s32_to_s6(s32 data) |
| 138 | { |
| 139 | u32 val; |
| 140 | |
| 141 | if (data > 31) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 142 | data = 31; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 143 | else if (data < -32) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 144 | data = -32; |
| 145 | } |
| 146 | |
| 147 | val = data & 0x003F; |
| 148 | |
| 149 | return val; |
| 150 | } |
| 151 | |
| 152 | /****************************************************************************/ |
| 153 | s32 _s9_to_s32(u32 data) |
| 154 | { |
| 155 | s32 val; |
| 156 | |
| 157 | val = data & 0x00FF; |
| 158 | |
| 159 | if ((data & BIT(8)) != 0) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 160 | val |= 0xFFFFFF00; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 161 | |
| 162 | return val; |
| 163 | } |
| 164 | |
| 165 | u32 _s32_to_s9(s32 data) |
| 166 | { |
| 167 | u32 val; |
| 168 | |
| 169 | if (data > 255) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 170 | data = 255; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 171 | else if (data < -256) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 172 | data = -256; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 173 | |
| 174 | val = data & 0x01FF; |
| 175 | |
| 176 | return val; |
| 177 | } |
| 178 | |
| 179 | /****************************************************************************/ |
| 180 | s32 _floor(s32 n) |
| 181 | { |
| 182 | if (n > 0) |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 183 | n += 5; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 184 | else |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 185 | n -= 5; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 186 | |
| 187 | return (n/10); |
| 188 | } |
| 189 | |
| 190 | /****************************************************************************/ |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 191 | /* |
| 192 | * The following code is sqare-root function. |
| 193 | * sqsum is the input and the output is sq_rt; |
| 194 | * The maximum of sqsum = 2^27 -1; |
| 195 | */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 196 | u32 _sqrt(u32 sqsum) |
| 197 | { |
| 198 | u32 sq_rt; |
| 199 | |
| 200 | int g0, g1, g2, g3, g4; |
| 201 | int seed; |
| 202 | int next; |
| 203 | int step; |
| 204 | |
| 205 | g4 = sqsum / 100000000; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 206 | g3 = (sqsum - g4*100000000) / 1000000; |
| 207 | g2 = (sqsum - g4*100000000 - g3*1000000) / 10000; |
| 208 | g1 = (sqsum - g4*100000000 - g3*1000000 - g2*10000) / 100; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 209 | g0 = (sqsum - g4*100000000 - g3*1000000 - g2*10000 - g1*100); |
| 210 | |
| 211 | next = g4; |
| 212 | step = 0; |
| 213 | seed = 0; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 214 | while (((seed+1)*(step+1)) <= next) { |
| 215 | step++; |
| 216 | seed++; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 217 | } |
| 218 | |
| 219 | sq_rt = seed * 10000; |
| 220 | next = (next-(seed*step))*100 + g3; |
| 221 | |
| 222 | step = 0; |
| 223 | seed = 2 * seed * 10; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 224 | while (((seed+1)*(step+1)) <= next) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 225 | step++; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 226 | seed++; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 227 | } |
| 228 | |
| 229 | sq_rt = sq_rt + step * 1000; |
| 230 | next = (next - seed * step) * 100 + g2; |
| 231 | seed = (seed + step) * 10; |
| 232 | step = 0; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 233 | while (((seed+1)*(step+1)) <= next) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 234 | step++; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 235 | seed++; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | sq_rt = sq_rt + step * 100; |
| 239 | next = (next - seed * step) * 100 + g1; |
| 240 | seed = (seed + step) * 10; |
| 241 | step = 0; |
| 242 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 243 | while (((seed+1)*(step+1)) <= next) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 244 | step++; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 245 | seed++; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 246 | } |
| 247 | |
| 248 | sq_rt = sq_rt + step * 10; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 249 | next = (next - seed * step) * 100 + g0; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 250 | seed = (seed + step) * 10; |
| 251 | step = 0; |
| 252 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 253 | while (((seed+1)*(step+1)) <= next) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 254 | step++; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 255 | seed++; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 256 | } |
| 257 | |
| 258 | sq_rt = sq_rt + step; |
| 259 | |
| 260 | return sq_rt; |
| 261 | } |
| 262 | |
| 263 | /****************************************************************************/ |
| 264 | void _sin_cos(s32 angle, s32 *sin, s32 *cos) |
| 265 | { |
Sankar P | 20dbe69 | 2010-03-20 02:11:02 +0530 | [diff] [blame] | 266 | s32 X, Y, TargetAngle, CurrAngle; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 267 | unsigned Step; |
| 268 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 269 | X = FIXED(AG_CONST); /* AG_CONST * cos(0) */ |
| 270 | Y = 0; /* AG_CONST * sin(0) */ |
| 271 | TargetAngle = abs(angle); |
| 272 | CurrAngle = 0; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 273 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 274 | for (Step = 0; Step < 12; Step++) { |
Sankar P | 20dbe69 | 2010-03-20 02:11:02 +0530 | [diff] [blame] | 275 | s32 NewX; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 276 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 277 | if (TargetAngle > CurrAngle) { |
| 278 | NewX = X - (Y >> Step); |
| 279 | Y = (X >> Step) + Y; |
| 280 | X = NewX; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 281 | CurrAngle += Angles[Step]; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 282 | } else { |
| 283 | NewX = X + (Y >> Step); |
| 284 | Y = -(X >> Step) + Y; |
| 285 | X = NewX; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 286 | CurrAngle -= Angles[Step]; |
| 287 | } |
| 288 | } |
| 289 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 290 | if (angle > 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 291 | *cos = X; |
| 292 | *sin = Y; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 293 | } else { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 294 | *cos = X; |
| 295 | *sin = -Y; |
| 296 | } |
| 297 | } |
| 298 | |
Pekka Enberg | dd68e1b | 2009-04-08 11:51:22 +0300 | [diff] [blame] | 299 | static unsigned char hal_get_dxx_reg(struct hw_data *pHwData, u16 number, u32 * pValue) |
| 300 | { |
| 301 | if (number < 0x1000) |
| 302 | number += 0x1000; |
| 303 | return Wb35Reg_ReadSync(pHwData, number, pValue); |
| 304 | } |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 305 | #define hw_get_dxx_reg(_A, _B, _C) hal_get_dxx_reg(_A, _B, (u32 *)_C) |
Pekka Enberg | dd68e1b | 2009-04-08 11:51:22 +0300 | [diff] [blame] | 306 | |
| 307 | static unsigned char hal_set_dxx_reg(struct hw_data *pHwData, u16 number, u32 value) |
| 308 | { |
| 309 | unsigned char ret; |
| 310 | |
| 311 | if (number < 0x1000) |
| 312 | number += 0x1000; |
| 313 | ret = Wb35Reg_WriteSync(pHwData, number, value); |
| 314 | return ret; |
| 315 | } |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 316 | #define hw_set_dxx_reg(_A, _B, _C) hal_set_dxx_reg(_A, _B, (u32)_C) |
Pekka Enberg | dd68e1b | 2009-04-08 11:51:22 +0300 | [diff] [blame] | 317 | |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 318 | |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 319 | void _reset_rx_cal(struct hw_data *phw_data) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 320 | { |
| 321 | u32 val; |
| 322 | |
| 323 | hw_get_dxx_reg(phw_data, 0x54, &val); |
| 324 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 325 | if (phw_data->revision == 0x2002) /* 1st-cut */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 326 | val &= 0xFFFF0000; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 327 | else /* 2nd-cut */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 328 | val &= 0x000003FF; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 329 | |
| 330 | hw_set_dxx_reg(phw_data, 0x54, val); |
| 331 | } |
| 332 | |
| 333 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 334 | /**************for winbond calibration*********/ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 335 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 336 | |
| 337 | |
| 338 | /**********************************************/ |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 339 | void _rxadc_dc_offset_cancellation_winbond(struct hw_data *phw_data, u32 frequency) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 340 | { |
| 341 | u32 reg_agc_ctrl3; |
| 342 | u32 reg_a_acq_ctrl; |
| 343 | u32 reg_b_acq_ctrl; |
| 344 | u32 val; |
| 345 | |
| 346 | PHY_DEBUG(("[CAL] -> [1]_rxadc_dc_offset_cancellation()\n")); |
| 347 | phy_init_rf(phw_data); |
| 348 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 349 | /* set calibration channel */ |
| 350 | if ((RF_WB_242 == phw_data->phy_type) || |
| 351 | (RF_WB_242_1 == phw_data->phy_type)) /* 20060619.5 Add */{ |
| 352 | if ((frequency >= 2412) && (frequency <= 2484)) { |
| 353 | /* w89rf242 change frequency to 2390Mhz */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 354 | PHY_DEBUG(("[CAL] W89RF242/11G/Channel=2390Mhz\n")); |
| 355 | phy_set_rf_data(phw_data, 3, (3<<24)|0x025586); |
| 356 | |
| 357 | } |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 358 | } else { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 359 | |
| 360 | } |
| 361 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 362 | /* reset cancel_dc_i[9:5] and cancel_dc_q[4:0] in register DC_Cancel */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 363 | hw_get_dxx_reg(phw_data, 0x5C, &val); |
| 364 | val &= ~(0x03FF); |
| 365 | hw_set_dxx_reg(phw_data, 0x5C, val); |
| 366 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 367 | /* reset the TX and RX IQ calibration data */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 368 | hw_set_dxx_reg(phw_data, 0x3C, 0); |
| 369 | hw_set_dxx_reg(phw_data, 0x54, 0); |
| 370 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 371 | hw_set_dxx_reg(phw_data, 0x58, 0x30303030); /* IQ_Alpha Changed */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 372 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 373 | /* a. Disable AGC */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 374 | hw_get_dxx_reg(phw_data, REG_AGC_CTRL3, ®_agc_ctrl3); |
| 375 | reg_agc_ctrl3 &= ~BIT(2); |
| 376 | reg_agc_ctrl3 |= (MASK_LNA_FIX_GAIN|MASK_AGC_FIX); |
| 377 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL3, reg_agc_ctrl3); |
| 378 | |
| 379 | hw_get_dxx_reg(phw_data, REG_AGC_CTRL5, &val); |
| 380 | val |= MASK_AGC_FIX_GAIN; |
| 381 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL5, val); |
| 382 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 383 | /* b. Turn off BB RX */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 384 | hw_get_dxx_reg(phw_data, REG_A_ACQ_CTRL, ®_a_acq_ctrl); |
| 385 | reg_a_acq_ctrl |= MASK_AMER_OFF_REG; |
| 386 | hw_set_dxx_reg(phw_data, REG_A_ACQ_CTRL, reg_a_acq_ctrl); |
| 387 | |
| 388 | hw_get_dxx_reg(phw_data, REG_B_ACQ_CTRL, ®_b_acq_ctrl); |
| 389 | reg_b_acq_ctrl |= MASK_BMER_OFF_REG; |
| 390 | hw_set_dxx_reg(phw_data, REG_B_ACQ_CTRL, reg_b_acq_ctrl); |
| 391 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 392 | /* c. Make sure MAC is in receiving mode |
| 393 | * d. Turn ON ADC calibration |
| 394 | * - ADC calibrator is triggered by this signal rising from 0 to 1 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 395 | hw_get_dxx_reg(phw_data, REG_MODE_CTRL, &val); |
| 396 | val &= ~MASK_ADC_DC_CAL_STR; |
| 397 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, val); |
| 398 | |
| 399 | val |= MASK_ADC_DC_CAL_STR; |
| 400 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, val); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 401 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 402 | /* e. The result are shown in "adc_dc_cal_i[8:0] and adc_dc_cal_q[8:0]" */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 403 | #ifdef _DEBUG |
| 404 | hw_get_dxx_reg(phw_data, REG_OFFSET_READ, &val); |
| 405 | PHY_DEBUG(("[CAL] REG_OFFSET_READ = 0x%08X\n", val)); |
| 406 | |
| 407 | PHY_DEBUG(("[CAL] ** adc_dc_cal_i = %d (0x%04X)\n", |
| 408 | _s9_to_s32(val&0x000001FF), val&0x000001FF)); |
| 409 | PHY_DEBUG(("[CAL] ** adc_dc_cal_q = %d (0x%04X)\n", |
| 410 | _s9_to_s32((val&0x0003FE00)>>9), (val&0x0003FE00)>>9)); |
| 411 | #endif |
| 412 | |
| 413 | hw_get_dxx_reg(phw_data, REG_MODE_CTRL, &val); |
| 414 | val &= ~MASK_ADC_DC_CAL_STR; |
| 415 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, val); |
| 416 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 417 | /* f. Turn on BB RX */ |
| 418 | /* hw_get_dxx_reg(phw_data, REG_A_ACQ_CTRL, ®_a_acq_ctrl); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 419 | reg_a_acq_ctrl &= ~MASK_AMER_OFF_REG; |
| 420 | hw_set_dxx_reg(phw_data, REG_A_ACQ_CTRL, reg_a_acq_ctrl); |
| 421 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 422 | /* hw_get_dxx_reg(phw_data, REG_B_ACQ_CTRL, ®_b_acq_ctrl); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 423 | reg_b_acq_ctrl &= ~MASK_BMER_OFF_REG; |
| 424 | hw_set_dxx_reg(phw_data, REG_B_ACQ_CTRL, reg_b_acq_ctrl); |
| 425 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 426 | /* g. Enable AGC */ |
| 427 | /* hw_get_dxx_reg(phw_data, REG_AGC_CTRL3, &val); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 428 | reg_agc_ctrl3 |= BIT(2); |
| 429 | reg_agc_ctrl3 &= ~(MASK_LNA_FIX_GAIN|MASK_AGC_FIX); |
| 430 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL3, reg_agc_ctrl3); |
| 431 | } |
| 432 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 433 | /****************************************************************/ |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 434 | void _txidac_dc_offset_cancellation_winbond(struct hw_data *phw_data) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 435 | { |
| 436 | u32 reg_agc_ctrl3; |
| 437 | u32 reg_mode_ctrl; |
| 438 | u32 reg_dc_cancel; |
| 439 | s32 iqcal_image_i; |
| 440 | s32 iqcal_image_q; |
| 441 | u32 sqsum; |
| 442 | s32 mag_0; |
| 443 | s32 mag_1; |
| 444 | s32 fix_cancel_dc_i = 0; |
| 445 | u32 val; |
| 446 | int loop; |
| 447 | |
| 448 | PHY_DEBUG(("[CAL] -> [2]_txidac_dc_offset_cancellation()\n")); |
| 449 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 450 | /* a. Set to "TX calibration mode" */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 451 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 452 | /* 0x01 0xEE3FC2 ; 3B8FF ; Calibration (6a). enable TX IQ calibration loop circuits */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 453 | phy_set_rf_data(phw_data, 1, (1<<24)|0xEE3FC2); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 454 | /* 0x0B 0x1905D6 ; 06417 ; Calibration (6b). enable TX I/Q cal loop squaring circuit */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 455 | phy_set_rf_data(phw_data, 11, (11<<24)|0x1901D6); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 456 | /* 0x05 0x24C60A ; 09318 ; Calibration (6c). setting TX-VGA gain: TXGCH=2 & GPK=110 --> to be optimized */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 457 | phy_set_rf_data(phw_data, 5, (5<<24)|0x24C48A); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 458 | /* 0x06 0x06880C ; 01A20 ; Calibration (6d). RXGCH=00; RXGCL=100 000 (RXVGA=32) --> to be optimized */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 459 | phy_set_rf_data(phw_data, 6, (6<<24)|0x06890C); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 460 | /* 0x00 0xFDF1C0 ; 3F7C7 ; Calibration (6e). turn on IQ imbalance/Test mode */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 461 | phy_set_rf_data(phw_data, 0, (0<<24)|0xFDF1C0); |
| 462 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 463 | hw_set_dxx_reg(phw_data, 0x58, 0x30303030); /* IQ_Alpha Changed */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 464 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 465 | /* a. Disable AGC */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 466 | hw_get_dxx_reg(phw_data, REG_AGC_CTRL3, ®_agc_ctrl3); |
| 467 | reg_agc_ctrl3 &= ~BIT(2); |
| 468 | reg_agc_ctrl3 |= (MASK_LNA_FIX_GAIN|MASK_AGC_FIX); |
| 469 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL3, reg_agc_ctrl3); |
| 470 | |
| 471 | hw_get_dxx_reg(phw_data, REG_AGC_CTRL5, &val); |
| 472 | val |= MASK_AGC_FIX_GAIN; |
| 473 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL5, val); |
| 474 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 475 | /* b. set iqcal_mode[1:0] to 0x2 and set iqcal_tone[3:2] to 0 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 476 | hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl); |
| 477 | |
| 478 | PHY_DEBUG(("[CAL] MODE_CTRL (read) = 0x%08X\n", reg_mode_ctrl)); |
| 479 | reg_mode_ctrl &= ~(MASK_IQCAL_TONE_SEL|MASK_IQCAL_MODE); |
| 480 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 481 | /* mode=2, tone=0 */ |
| 482 | /* reg_mode_ctrl |= (MASK_CALIB_START|2); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 483 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 484 | /* mode=2, tone=1 */ |
| 485 | /* reg_mode_ctrl |= (MASK_CALIB_START|2|(1<<2)); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 486 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 487 | /* mode=2, tone=2 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 488 | reg_mode_ctrl |= (MASK_CALIB_START|2|(2<<2)); |
| 489 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 490 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 491 | |
| 492 | hw_get_dxx_reg(phw_data, 0x5C, ®_dc_cancel); |
| 493 | PHY_DEBUG(("[CAL] DC_CANCEL (read) = 0x%08X\n", reg_dc_cancel)); |
| 494 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 495 | for (loop = 0; loop < LOOP_TIMES; loop++) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 496 | PHY_DEBUG(("[CAL] [%d.] ==================================\n", loop)); |
| 497 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 498 | /* c. reset cancel_dc_i[9:5] and cancel_dc_q[4:0] in register DC_Cancel */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 499 | reg_dc_cancel &= ~(0x03FF); |
| 500 | PHY_DEBUG(("[CAL] DC_CANCEL (write) = 0x%08X\n", reg_dc_cancel)); |
| 501 | hw_set_dxx_reg(phw_data, 0x5C, reg_dc_cancel); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 502 | |
| 503 | hw_get_dxx_reg(phw_data, REG_CALIB_READ2, &val); |
| 504 | PHY_DEBUG(("[CAL] CALIB_READ2 = 0x%08X\n", val)); |
| 505 | |
| 506 | iqcal_image_i = _s13_to_s32(val & 0x00001FFF); |
| 507 | iqcal_image_q = _s13_to_s32((val & 0x03FFE000) >> 13); |
| 508 | sqsum = iqcal_image_i*iqcal_image_i + iqcal_image_q*iqcal_image_q; |
| 509 | mag_0 = (s32) _sqrt(sqsum); |
| 510 | PHY_DEBUG(("[CAL] mag_0=%d (iqcal_image_i=%d, iqcal_image_q=%d)\n", |
| 511 | mag_0, iqcal_image_i, iqcal_image_q)); |
| 512 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 513 | /* d. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 514 | reg_dc_cancel |= (1 << CANCEL_DC_I_SHIFT); |
| 515 | PHY_DEBUG(("[CAL] DC_CANCEL (write) = 0x%08X\n", reg_dc_cancel)); |
| 516 | hw_set_dxx_reg(phw_data, 0x5C, reg_dc_cancel); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 517 | |
| 518 | hw_get_dxx_reg(phw_data, REG_CALIB_READ2, &val); |
| 519 | PHY_DEBUG(("[CAL] CALIB_READ2 = 0x%08X\n", val)); |
| 520 | |
| 521 | iqcal_image_i = _s13_to_s32(val & 0x00001FFF); |
| 522 | iqcal_image_q = _s13_to_s32((val & 0x03FFE000) >> 13); |
| 523 | sqsum = iqcal_image_i*iqcal_image_i + iqcal_image_q*iqcal_image_q; |
| 524 | mag_1 = (s32) _sqrt(sqsum); |
| 525 | PHY_DEBUG(("[CAL] mag_1=%d (iqcal_image_i=%d, iqcal_image_q=%d)\n", |
| 526 | mag_1, iqcal_image_i, iqcal_image_q)); |
| 527 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 528 | /* e. Calculate the correct DC offset cancellation value for I */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 529 | if (mag_0 != mag_1) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 530 | fix_cancel_dc_i = (mag_0*10000) / (mag_0*10000 - mag_1*10000); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 531 | else { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 532 | if (mag_0 == mag_1) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 533 | PHY_DEBUG(("[CAL] ***** mag_0 = mag_1 !!\n")); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 534 | fix_cancel_dc_i = 0; |
| 535 | } |
| 536 | |
| 537 | PHY_DEBUG(("[CAL] ** fix_cancel_dc_i = %d (0x%04X)\n", |
| 538 | fix_cancel_dc_i, _s32_to_s5(fix_cancel_dc_i))); |
| 539 | |
| 540 | if ((abs(mag_1-mag_0)*6) > mag_0) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 541 | break; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 542 | } |
| 543 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 544 | if (loop >= 19) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 545 | fix_cancel_dc_i = 0; |
| 546 | |
| 547 | reg_dc_cancel &= ~(0x03FF); |
| 548 | reg_dc_cancel |= (_s32_to_s5(fix_cancel_dc_i) << CANCEL_DC_I_SHIFT); |
| 549 | hw_set_dxx_reg(phw_data, 0x5C, reg_dc_cancel); |
| 550 | PHY_DEBUG(("[CAL] DC_CANCEL (write) = 0x%08X\n", reg_dc_cancel)); |
| 551 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 552 | /* g. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 553 | reg_mode_ctrl &= ~MASK_CALIB_START; |
| 554 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 555 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 556 | } |
| 557 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 558 | /*****************************************************/ |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 559 | void _txqdac_dc_offset_cacellation_winbond(struct hw_data *phw_data) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 560 | { |
| 561 | u32 reg_agc_ctrl3; |
| 562 | u32 reg_mode_ctrl; |
| 563 | u32 reg_dc_cancel; |
| 564 | s32 iqcal_image_i; |
| 565 | s32 iqcal_image_q; |
| 566 | u32 sqsum; |
| 567 | s32 mag_0; |
| 568 | s32 mag_1; |
| 569 | s32 fix_cancel_dc_q = 0; |
| 570 | u32 val; |
| 571 | int loop; |
| 572 | |
| 573 | PHY_DEBUG(("[CAL] -> [3]_txqdac_dc_offset_cacellation()\n")); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 574 | /*0x01 0xEE3FC2 ; 3B8FF ; Calibration (6a). enable TX IQ calibration loop circuits */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 575 | phy_set_rf_data(phw_data, 1, (1<<24)|0xEE3FC2); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 576 | /* 0x0B 0x1905D6 ; 06417 ; Calibration (6b). enable TX I/Q cal loop squaring circuit */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 577 | phy_set_rf_data(phw_data, 11, (11<<24)|0x1901D6); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 578 | /* 0x05 0x24C60A ; 09318 ; Calibration (6c). setting TX-VGA gain: TXGCH=2 & GPK=110 --> to be optimized */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 579 | phy_set_rf_data(phw_data, 5, (5<<24)|0x24C48A); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 580 | /* 0x06 0x06880C ; 01A20 ; Calibration (6d). RXGCH=00; RXGCL=100 000 (RXVGA=32) --> to be optimized */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 581 | phy_set_rf_data(phw_data, 6, (6<<24)|0x06890C); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 582 | /* 0x00 0xFDF1C0 ; 3F7C7 ; Calibration (6e). turn on IQ imbalance/Test mode */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 583 | phy_set_rf_data(phw_data, 0, (0<<24)|0xFDF1C0); |
| 584 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 585 | hw_set_dxx_reg(phw_data, 0x58, 0x30303030); /* IQ_Alpha Changed */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 586 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 587 | /* a. Disable AGC */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 588 | hw_get_dxx_reg(phw_data, REG_AGC_CTRL3, ®_agc_ctrl3); |
| 589 | reg_agc_ctrl3 &= ~BIT(2); |
| 590 | reg_agc_ctrl3 |= (MASK_LNA_FIX_GAIN|MASK_AGC_FIX); |
| 591 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL3, reg_agc_ctrl3); |
| 592 | |
| 593 | hw_get_dxx_reg(phw_data, REG_AGC_CTRL5, &val); |
| 594 | val |= MASK_AGC_FIX_GAIN; |
| 595 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL5, val); |
| 596 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 597 | /* a. set iqcal_mode[1:0] to 0x3 and set iqcal_tone[3:2] to 0 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 598 | hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl); |
| 599 | PHY_DEBUG(("[CAL] MODE_CTRL (read) = 0x%08X\n", reg_mode_ctrl)); |
| 600 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 601 | /* reg_mode_ctrl &= ~(MASK_IQCAL_TONE_SEL|MASK_IQCAL_MODE); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 602 | reg_mode_ctrl &= ~(MASK_IQCAL_MODE); |
| 603 | reg_mode_ctrl |= (MASK_CALIB_START|3); |
| 604 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 605 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 606 | |
| 607 | hw_get_dxx_reg(phw_data, 0x5C, ®_dc_cancel); |
| 608 | PHY_DEBUG(("[CAL] DC_CANCEL (read) = 0x%08X\n", reg_dc_cancel)); |
| 609 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 610 | for (loop = 0; loop < LOOP_TIMES; loop++) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 611 | PHY_DEBUG(("[CAL] [%d.] ==================================\n", loop)); |
| 612 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 613 | /* b. reset cancel_dc_q[4:0] in register DC_Cancel */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 614 | reg_dc_cancel &= ~(0x001F); |
| 615 | PHY_DEBUG(("[CAL] DC_CANCEL (write) = 0x%08X\n", reg_dc_cancel)); |
| 616 | hw_set_dxx_reg(phw_data, 0x5C, reg_dc_cancel); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 617 | |
| 618 | hw_get_dxx_reg(phw_data, REG_CALIB_READ2, &val); |
| 619 | PHY_DEBUG(("[CAL] CALIB_READ2 = 0x%08X\n", val)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 620 | |
| 621 | iqcal_image_i = _s13_to_s32(val & 0x00001FFF); |
| 622 | iqcal_image_q = _s13_to_s32((val & 0x03FFE000) >> 13); |
| 623 | sqsum = iqcal_image_i*iqcal_image_i + iqcal_image_q*iqcal_image_q; |
| 624 | mag_0 = _sqrt(sqsum); |
| 625 | PHY_DEBUG(("[CAL] mag_0=%d (iqcal_image_i=%d, iqcal_image_q=%d)\n", |
| 626 | mag_0, iqcal_image_i, iqcal_image_q)); |
| 627 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 628 | /* c. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 629 | reg_dc_cancel |= (1 << CANCEL_DC_Q_SHIFT); |
| 630 | PHY_DEBUG(("[CAL] DC_CANCEL (write) = 0x%08X\n", reg_dc_cancel)); |
| 631 | hw_set_dxx_reg(phw_data, 0x5C, reg_dc_cancel); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 632 | |
| 633 | hw_get_dxx_reg(phw_data, REG_CALIB_READ2, &val); |
| 634 | PHY_DEBUG(("[CAL] CALIB_READ2 = 0x%08X\n", val)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 635 | |
| 636 | iqcal_image_i = _s13_to_s32(val & 0x00001FFF); |
| 637 | iqcal_image_q = _s13_to_s32((val & 0x03FFE000) >> 13); |
| 638 | sqsum = iqcal_image_i*iqcal_image_i + iqcal_image_q*iqcal_image_q; |
| 639 | mag_1 = _sqrt(sqsum); |
| 640 | PHY_DEBUG(("[CAL] mag_1=%d (iqcal_image_i=%d, iqcal_image_q=%d)\n", |
| 641 | mag_1, iqcal_image_i, iqcal_image_q)); |
| 642 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 643 | /* d. Calculate the correct DC offset cancellation value for I */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 644 | if (mag_0 != mag_1) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 645 | fix_cancel_dc_q = (mag_0*10000) / (mag_0*10000 - mag_1*10000); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 646 | else { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 647 | if (mag_0 == mag_1) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 648 | PHY_DEBUG(("[CAL] ***** mag_0 = mag_1 !!\n")); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 649 | fix_cancel_dc_q = 0; |
| 650 | } |
| 651 | |
| 652 | PHY_DEBUG(("[CAL] ** fix_cancel_dc_q = %d (0x%04X)\n", |
| 653 | fix_cancel_dc_q, _s32_to_s5(fix_cancel_dc_q))); |
| 654 | |
| 655 | if ((abs(mag_1-mag_0)*6) > mag_0) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 656 | break; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 657 | } |
| 658 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 659 | if (loop >= 19) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 660 | fix_cancel_dc_q = 0; |
| 661 | |
| 662 | reg_dc_cancel &= ~(0x001F); |
| 663 | reg_dc_cancel |= (_s32_to_s5(fix_cancel_dc_q) << CANCEL_DC_Q_SHIFT); |
| 664 | hw_set_dxx_reg(phw_data, 0x5C, reg_dc_cancel); |
| 665 | PHY_DEBUG(("[CAL] DC_CANCEL (write) = 0x%08X\n", reg_dc_cancel)); |
| 666 | |
| 667 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 668 | /* f. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 669 | reg_mode_ctrl &= ~MASK_CALIB_START; |
| 670 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 671 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 672 | } |
| 673 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 674 | /* 20060612.1.a 20060718.1 Modify */ |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 675 | u8 _tx_iq_calibration_loop_winbond(struct hw_data *phw_data, |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 676 | s32 a_2_threshold, |
| 677 | s32 b_2_threshold) |
| 678 | { |
| 679 | u32 reg_mode_ctrl; |
| 680 | s32 iq_mag_0_tx; |
| 681 | s32 iqcal_tone_i0; |
| 682 | s32 iqcal_tone_q0; |
| 683 | s32 iqcal_tone_i; |
| 684 | s32 iqcal_tone_q; |
| 685 | u32 sqsum; |
| 686 | s32 rot_i_b; |
| 687 | s32 rot_q_b; |
| 688 | s32 tx_cal_flt_b[4]; |
| 689 | s32 tx_cal[4]; |
| 690 | s32 tx_cal_reg[4]; |
| 691 | s32 a_2, b_2; |
| 692 | s32 sin_b, sin_2b; |
| 693 | s32 cos_b, cos_2b; |
| 694 | s32 divisor; |
| 695 | s32 temp1, temp2; |
| 696 | u32 val; |
| 697 | u16 loop; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 698 | s32 iqcal_tone_i_avg, iqcal_tone_q_avg; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 699 | u8 verify_count; |
| 700 | int capture_time; |
| 701 | |
| 702 | PHY_DEBUG(("[CAL] -> _tx_iq_calibration_loop()\n")); |
| 703 | PHY_DEBUG(("[CAL] ** a_2_threshold = %d\n", a_2_threshold)); |
| 704 | PHY_DEBUG(("[CAL] ** b_2_threshold = %d\n", b_2_threshold)); |
| 705 | |
| 706 | verify_count = 0; |
| 707 | |
| 708 | hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl); |
| 709 | PHY_DEBUG(("[CAL] MODE_CTRL (read) = 0x%08X\n", reg_mode_ctrl)); |
| 710 | |
| 711 | loop = LOOP_TIMES; |
| 712 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 713 | while (loop > 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 714 | PHY_DEBUG(("[CAL] [%d.] <_tx_iq_calibration_loop>\n", (LOOP_TIMES-loop+1))); |
| 715 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 716 | iqcal_tone_i_avg = 0; |
| 717 | iqcal_tone_q_avg = 0; |
| 718 | if (!hw_set_dxx_reg(phw_data, 0x3C, 0x00)) /* 20060718.1 modify */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 719 | return 0; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 720 | for (capture_time = 0; capture_time < 10; capture_time++) { |
| 721 | /* |
| 722 | * a. Set iqcal_mode[1:0] to 0x2 and set "calib_start" to 0x1 to |
| 723 | * enable "IQ alibration Mode II" |
| 724 | */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 725 | reg_mode_ctrl &= ~(MASK_IQCAL_TONE_SEL|MASK_IQCAL_MODE); |
| 726 | reg_mode_ctrl &= ~MASK_IQCAL_MODE; |
| 727 | reg_mode_ctrl |= (MASK_CALIB_START|0x02); |
| 728 | reg_mode_ctrl |= (MASK_CALIB_START|0x02|2<<2); |
| 729 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 730 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 731 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 732 | /* b. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 733 | hw_get_dxx_reg(phw_data, REG_CALIB_READ1, &val); |
| 734 | PHY_DEBUG(("[CAL] CALIB_READ1 = 0x%08X\n", val)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 735 | |
| 736 | iqcal_tone_i0 = _s13_to_s32(val & 0x00001FFF); |
| 737 | iqcal_tone_q0 = _s13_to_s32((val & 0x03FFE000) >> 13); |
| 738 | PHY_DEBUG(("[CAL] ** iqcal_tone_i0=%d, iqcal_tone_q0=%d\n", |
| 739 | iqcal_tone_i0, iqcal_tone_q0)); |
| 740 | |
| 741 | sqsum = iqcal_tone_i0*iqcal_tone_i0 + |
| 742 | iqcal_tone_q0*iqcal_tone_q0; |
| 743 | iq_mag_0_tx = (s32) _sqrt(sqsum); |
| 744 | PHY_DEBUG(("[CAL] ** iq_mag_0_tx=%d\n", iq_mag_0_tx)); |
| 745 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 746 | /* c. Set "calib_start" to 0x0 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 747 | reg_mode_ctrl &= ~MASK_CALIB_START; |
| 748 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 749 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 750 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 751 | /* |
| 752 | * d. Set iqcal_mode[1:0] to 0x3 and set "calib_start" to 0x1 to |
| 753 | * enable "IQ alibration Mode II" |
| 754 | */ |
| 755 | /* hw_get_dxx_reg(phw_data, REG_MODE_CTRL, &val); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 756 | hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl); |
| 757 | reg_mode_ctrl &= ~MASK_IQCAL_MODE; |
| 758 | reg_mode_ctrl |= (MASK_CALIB_START|0x03); |
| 759 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 760 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 761 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 762 | /* e. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 763 | hw_get_dxx_reg(phw_data, REG_CALIB_READ1, &val); |
| 764 | PHY_DEBUG(("[CAL] CALIB_READ1 = 0x%08X\n", val)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 765 | |
| 766 | iqcal_tone_i = _s13_to_s32(val & 0x00001FFF); |
| 767 | iqcal_tone_q = _s13_to_s32((val & 0x03FFE000) >> 13); |
| 768 | PHY_DEBUG(("[CAL] ** iqcal_tone_i = %d, iqcal_tone_q = %d\n", |
| 769 | iqcal_tone_i, iqcal_tone_q)); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 770 | if (capture_time == 0) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 771 | continue; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 772 | else { |
| 773 | iqcal_tone_i_avg = (iqcal_tone_i_avg*(capture_time-1) + iqcal_tone_i)/capture_time; |
| 774 | iqcal_tone_q_avg = (iqcal_tone_q_avg*(capture_time-1) + iqcal_tone_q)/capture_time; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 775 | } |
| 776 | } |
| 777 | |
| 778 | iqcal_tone_i = iqcal_tone_i_avg; |
| 779 | iqcal_tone_q = iqcal_tone_q_avg; |
| 780 | |
| 781 | |
| 782 | rot_i_b = (iqcal_tone_i * iqcal_tone_i0 + |
| 783 | iqcal_tone_q * iqcal_tone_q0) / 1024; |
| 784 | rot_q_b = (iqcal_tone_i * iqcal_tone_q0 * (-1) + |
| 785 | iqcal_tone_q * iqcal_tone_i0) / 1024; |
| 786 | PHY_DEBUG(("[CAL] ** rot_i_b = %d, rot_q_b = %d\n", |
| 787 | rot_i_b, rot_q_b)); |
| 788 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 789 | /* f. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 790 | divisor = ((iq_mag_0_tx * iq_mag_0_tx * 2)/1024 - rot_i_b) * 2; |
| 791 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 792 | if (divisor == 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 793 | PHY_DEBUG(("[CAL] ** <_tx_iq_calibration_loop> ERROR *******\n")); |
| 794 | PHY_DEBUG(("[CAL] ** divisor=0 to calculate EPS and THETA !!\n")); |
| 795 | PHY_DEBUG(("[CAL] ******************************************\n")); |
| 796 | break; |
| 797 | } |
| 798 | |
| 799 | a_2 = (rot_i_b * 32768) / divisor; |
| 800 | b_2 = (rot_q_b * (-32768)) / divisor; |
| 801 | PHY_DEBUG(("[CAL] ***** EPSILON/2 = %d\n", a_2)); |
| 802 | PHY_DEBUG(("[CAL] ***** THETA/2 = %d\n", b_2)); |
| 803 | |
| 804 | phw_data->iq_rsdl_gain_tx_d2 = a_2; |
| 805 | phw_data->iq_rsdl_phase_tx_d2 = b_2; |
| 806 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 807 | /* if ((abs(a_2) < 150) && (abs(b_2) < 100)) */ |
| 808 | /* if ((abs(a_2) < 200) && (abs(b_2) < 200)) */ |
| 809 | if ((abs(a_2) < a_2_threshold) && (abs(b_2) < b_2_threshold)) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 810 | verify_count++; |
| 811 | |
| 812 | PHY_DEBUG(("[CAL] ** <_tx_iq_calibration_loop> *************\n")); |
| 813 | PHY_DEBUG(("[CAL] ** VERIFY OK # %d !!\n", verify_count)); |
| 814 | PHY_DEBUG(("[CAL] ******************************************\n")); |
| 815 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 816 | if (verify_count > 2) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 817 | PHY_DEBUG(("[CAL] ** <_tx_iq_calibration_loop> *********\n")); |
| 818 | PHY_DEBUG(("[CAL] ** TX_IQ_CALIBRATION (EPS,THETA) OK !!\n")); |
| 819 | PHY_DEBUG(("[CAL] **************************************\n")); |
| 820 | return 0; |
| 821 | } |
| 822 | |
| 823 | continue; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 824 | } else |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 825 | verify_count = 0; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 826 | |
| 827 | _sin_cos(b_2, &sin_b, &cos_b); |
| 828 | _sin_cos(b_2*2, &sin_2b, &cos_2b); |
| 829 | PHY_DEBUG(("[CAL] ** sin(b/2)=%d, cos(b/2)=%d\n", sin_b, cos_b)); |
| 830 | PHY_DEBUG(("[CAL] ** sin(b)=%d, cos(b)=%d\n", sin_2b, cos_2b)); |
| 831 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 832 | if (cos_2b == 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 833 | PHY_DEBUG(("[CAL] ** <_tx_iq_calibration_loop> ERROR *******\n")); |
| 834 | PHY_DEBUG(("[CAL] ** cos(b)=0 !!\n")); |
| 835 | PHY_DEBUG(("[CAL] ******************************************\n")); |
| 836 | break; |
| 837 | } |
| 838 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 839 | /* 1280 * 32768 = 41943040 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 840 | temp1 = (41943040/cos_2b)*cos_b; |
| 841 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 842 | /* temp2 = (41943040/cos_2b)*sin_b*(-1); */ |
| 843 | if (phw_data->revision == 0x2002) /* 1st-cut */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 844 | temp2 = (41943040/cos_2b)*sin_b*(-1); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 845 | else /* 2nd-cut */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 846 | temp2 = (41943040*4/cos_2b)*sin_b*(-1); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 847 | |
| 848 | tx_cal_flt_b[0] = _floor(temp1/(32768+a_2)); |
| 849 | tx_cal_flt_b[1] = _floor(temp2/(32768+a_2)); |
| 850 | tx_cal_flt_b[2] = _floor(temp2/(32768-a_2)); |
| 851 | tx_cal_flt_b[3] = _floor(temp1/(32768-a_2)); |
| 852 | PHY_DEBUG(("[CAL] ** tx_cal_flt_b[0] = %d\n", tx_cal_flt_b[0])); |
| 853 | PHY_DEBUG(("[CAL] tx_cal_flt_b[1] = %d\n", tx_cal_flt_b[1])); |
| 854 | PHY_DEBUG(("[CAL] tx_cal_flt_b[2] = %d\n", tx_cal_flt_b[2])); |
| 855 | PHY_DEBUG(("[CAL] tx_cal_flt_b[3] = %d\n", tx_cal_flt_b[3])); |
| 856 | |
| 857 | tx_cal[2] = tx_cal_flt_b[2]; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 858 | tx_cal[2] = tx_cal[2] + 3; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 859 | tx_cal[1] = tx_cal[2]; |
| 860 | tx_cal[3] = tx_cal_flt_b[3] - 128; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 861 | tx_cal[0] = -tx_cal[3] + 1; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 862 | |
| 863 | PHY_DEBUG(("[CAL] tx_cal[0] = %d\n", tx_cal[0])); |
| 864 | PHY_DEBUG(("[CAL] tx_cal[1] = %d\n", tx_cal[1])); |
| 865 | PHY_DEBUG(("[CAL] tx_cal[2] = %d\n", tx_cal[2])); |
| 866 | PHY_DEBUG(("[CAL] tx_cal[3] = %d\n", tx_cal[3])); |
| 867 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 868 | /* if ((tx_cal[0] == 0) && (tx_cal[1] == 0) && |
| 869 | (tx_cal[2] == 0) && (tx_cal[3] == 0)) |
| 870 | { */ |
| 871 | /* PHY_DEBUG(("[CAL] ** <_tx_iq_calibration_loop> *************\n")); |
| 872 | * PHY_DEBUG(("[CAL] ** TX_IQ_CALIBRATION COMPLETE !!\n")); |
| 873 | * PHY_DEBUG(("[CAL] ******************************************\n")); |
| 874 | * return 0; |
| 875 | } */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 876 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 877 | /* g. */ |
| 878 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 879 | hw_get_dxx_reg(phw_data, 0x54, &val); |
| 880 | PHY_DEBUG(("[CAL] ** 0x54 = 0x%08X\n", val)); |
| 881 | tx_cal_reg[0] = _s4_to_s32((val & 0xF0000000) >> 28); |
| 882 | tx_cal_reg[1] = _s4_to_s32((val & 0x0F000000) >> 24); |
| 883 | tx_cal_reg[2] = _s4_to_s32((val & 0x00F00000) >> 20); |
| 884 | tx_cal_reg[3] = _s4_to_s32((val & 0x000F0000) >> 16); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 885 | } else /* 2nd-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 886 | hw_get_dxx_reg(phw_data, 0x3C, &val); |
| 887 | PHY_DEBUG(("[CAL] ** 0x3C = 0x%08X\n", val)); |
| 888 | tx_cal_reg[0] = _s5_to_s32((val & 0xF8000000) >> 27); |
| 889 | tx_cal_reg[1] = _s6_to_s32((val & 0x07E00000) >> 21); |
| 890 | tx_cal_reg[2] = _s6_to_s32((val & 0x001F8000) >> 15); |
| 891 | tx_cal_reg[3] = _s5_to_s32((val & 0x00007C00) >> 10); |
| 892 | |
| 893 | } |
| 894 | |
| 895 | PHY_DEBUG(("[CAL] ** tx_cal_reg[0] = %d\n", tx_cal_reg[0])); |
| 896 | PHY_DEBUG(("[CAL] tx_cal_reg[1] = %d\n", tx_cal_reg[1])); |
| 897 | PHY_DEBUG(("[CAL] tx_cal_reg[2] = %d\n", tx_cal_reg[2])); |
| 898 | PHY_DEBUG(("[CAL] tx_cal_reg[3] = %d\n", tx_cal_reg[3])); |
| 899 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 900 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
| 901 | if (((tx_cal_reg[0] == 7) || (tx_cal_reg[0] == (-8))) && |
| 902 | ((tx_cal_reg[3] == 7) || (tx_cal_reg[3] == (-8)))) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 903 | PHY_DEBUG(("[CAL] ** <_tx_iq_calibration_loop> *********\n")); |
| 904 | PHY_DEBUG(("[CAL] ** TX_IQ_CALIBRATION SATUATION !!\n")); |
| 905 | PHY_DEBUG(("[CAL] **************************************\n")); |
| 906 | break; |
| 907 | } |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 908 | } else /* 2nd-cut */{ |
| 909 | if (((tx_cal_reg[0] == 31) || (tx_cal_reg[0] == (-32))) && |
| 910 | ((tx_cal_reg[3] == 31) || (tx_cal_reg[3] == (-32)))) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 911 | PHY_DEBUG(("[CAL] ** <_tx_iq_calibration_loop> *********\n")); |
| 912 | PHY_DEBUG(("[CAL] ** TX_IQ_CALIBRATION SATUATION !!\n")); |
| 913 | PHY_DEBUG(("[CAL] **************************************\n")); |
| 914 | break; |
| 915 | } |
| 916 | } |
| 917 | |
| 918 | tx_cal[0] = tx_cal[0] + tx_cal_reg[0]; |
| 919 | tx_cal[1] = tx_cal[1] + tx_cal_reg[1]; |
| 920 | tx_cal[2] = tx_cal[2] + tx_cal_reg[2]; |
| 921 | tx_cal[3] = tx_cal[3] + tx_cal_reg[3]; |
| 922 | PHY_DEBUG(("[CAL] ** apply tx_cal[0] = %d\n", tx_cal[0])); |
| 923 | PHY_DEBUG(("[CAL] apply tx_cal[1] = %d\n", tx_cal[1])); |
| 924 | PHY_DEBUG(("[CAL] apply tx_cal[2] = %d\n", tx_cal[2])); |
| 925 | PHY_DEBUG(("[CAL] apply tx_cal[3] = %d\n", tx_cal[3])); |
| 926 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 927 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 928 | val &= 0x0000FFFF; |
| 929 | val |= ((_s32_to_s4(tx_cal[0]) << 28)| |
| 930 | (_s32_to_s4(tx_cal[1]) << 24)| |
| 931 | (_s32_to_s4(tx_cal[2]) << 20)| |
| 932 | (_s32_to_s4(tx_cal[3]) << 16)); |
| 933 | hw_set_dxx_reg(phw_data, 0x54, val); |
| 934 | PHY_DEBUG(("[CAL] ** CALIB_DATA = 0x%08X\n", val)); |
| 935 | return 0; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 936 | } else /* 2nd-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 937 | val &= 0x000003FF; |
| 938 | val |= ((_s32_to_s5(tx_cal[0]) << 27)| |
| 939 | (_s32_to_s6(tx_cal[1]) << 21)| |
| 940 | (_s32_to_s6(tx_cal[2]) << 15)| |
| 941 | (_s32_to_s5(tx_cal[3]) << 10)); |
| 942 | hw_set_dxx_reg(phw_data, 0x3C, val); |
| 943 | PHY_DEBUG(("[CAL] ** TX_IQ_CALIBRATION = 0x%08X\n", val)); |
| 944 | return 0; |
| 945 | } |
| 946 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 947 | /* i. Set "calib_start" to 0x0 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 948 | reg_mode_ctrl &= ~MASK_CALIB_START; |
| 949 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 950 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
| 951 | |
| 952 | loop--; |
| 953 | } |
| 954 | |
| 955 | return 1; |
| 956 | } |
| 957 | |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 958 | void _tx_iq_calibration_winbond(struct hw_data *phw_data) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 959 | { |
| 960 | u32 reg_agc_ctrl3; |
| 961 | #ifdef _DEBUG |
| 962 | s32 tx_cal_reg[4]; |
| 963 | |
| 964 | #endif |
| 965 | u32 reg_mode_ctrl; |
| 966 | u32 val; |
| 967 | u8 result; |
| 968 | |
| 969 | PHY_DEBUG(("[CAL] -> [4]_tx_iq_calibration()\n")); |
| 970 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 971 | /* 0x01 0xEE3FC2 ; 3B8FF ; Calibration (6a). enable TX IQ calibration loop circuits */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 972 | phy_set_rf_data(phw_data, 1, (1<<24)|0xEE3FC2); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 973 | /* 0x0B 0x1905D6 ; 06417 ; Calibration (6b). enable TX I/Q cal loop squaring circuit */ |
| 974 | phy_set_rf_data(phw_data, 11, (11<<24)|0x19BDD6); /* 20060612.1.a 0x1905D6); */ |
| 975 | /* 0x05 0x24C60A ; 09318 ; Calibration (6c). setting TX-VGA gain: TXGCH=2 & GPK=110 --> to be optimized */ |
| 976 | phy_set_rf_data(phw_data, 5, (5<<24)|0x24C60A); /* 0x24C60A (high temperature) */ |
| 977 | /* 0x06 0x06880C ; 01A20 ; Calibration (6d). RXGCH=00; RXGCL=100 000 (RXVGA=32) --> to be optimized */ |
| 978 | phy_set_rf_data(phw_data, 6, (6<<24)|0x34880C); /* 20060612.1.a 0x06890C); */ |
| 979 | /* 0x00 0xFDF1C0 ; 3F7C7 ; Calibration (6e). turn on IQ imbalance/Test mode */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 980 | phy_set_rf_data(phw_data, 0, (0<<24)|0xFDF1C0); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 981 | /* ; [BB-chip]: Calibration (6f).Send test pattern */ |
| 982 | /* ; [BB-chip]: Calibration (6g). Search RXGCL optimal value */ |
| 983 | /* ; [BB-chip]: Calibration (6h). Caculate TX-path IQ imbalance and setting TX path IQ compensation table */ |
| 984 | /* phy_set_rf_data(phw_data, 3, (3<<24)|0x025586); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 985 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 986 | msleep(30); /* 20060612.1.a 30ms delay. Add the follow 2 lines */ |
| 987 | /* To adjust TXVGA to fit iq_mag_0 range from 1250 ~ 1750 */ |
| 988 | adjust_TXVGA_for_iq_mag(phw_data); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 989 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 990 | /* a. Disable AGC */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 991 | hw_get_dxx_reg(phw_data, REG_AGC_CTRL3, ®_agc_ctrl3); |
| 992 | reg_agc_ctrl3 &= ~BIT(2); |
| 993 | reg_agc_ctrl3 |= (MASK_LNA_FIX_GAIN|MASK_AGC_FIX); |
| 994 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL3, reg_agc_ctrl3); |
| 995 | |
| 996 | hw_get_dxx_reg(phw_data, REG_AGC_CTRL5, &val); |
| 997 | val |= MASK_AGC_FIX_GAIN; |
| 998 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL5, val); |
| 999 | |
| 1000 | result = _tx_iq_calibration_loop_winbond(phw_data, 150, 100); |
| 1001 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1002 | if (result > 0) { |
| 1003 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1004 | hw_get_dxx_reg(phw_data, 0x54, &val); |
| 1005 | val &= 0x0000FFFF; |
| 1006 | hw_set_dxx_reg(phw_data, 0x54, val); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1007 | } else /* 2nd-cut*/{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1008 | hw_get_dxx_reg(phw_data, 0x3C, &val); |
| 1009 | val &= 0x000003FF; |
| 1010 | hw_set_dxx_reg(phw_data, 0x3C, val); |
| 1011 | } |
| 1012 | |
| 1013 | result = _tx_iq_calibration_loop_winbond(phw_data, 300, 200); |
| 1014 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1015 | if (result > 0) { |
| 1016 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1017 | hw_get_dxx_reg(phw_data, 0x54, &val); |
| 1018 | val &= 0x0000FFFF; |
| 1019 | hw_set_dxx_reg(phw_data, 0x54, val); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1020 | } else /* 2nd-cut*/{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1021 | hw_get_dxx_reg(phw_data, 0x3C, &val); |
| 1022 | val &= 0x000003FF; |
| 1023 | hw_set_dxx_reg(phw_data, 0x3C, val); |
| 1024 | } |
| 1025 | |
| 1026 | result = _tx_iq_calibration_loop_winbond(phw_data, 500, 400); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1027 | if (result > 0) { |
| 1028 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1029 | hw_get_dxx_reg(phw_data, 0x54, &val); |
| 1030 | val &= 0x0000FFFF; |
| 1031 | hw_set_dxx_reg(phw_data, 0x54, val); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1032 | } else /* 2nd-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1033 | hw_get_dxx_reg(phw_data, 0x3C, &val); |
| 1034 | val &= 0x000003FF; |
| 1035 | hw_set_dxx_reg(phw_data, 0x3C, val); |
| 1036 | } |
| 1037 | |
| 1038 | |
| 1039 | result = _tx_iq_calibration_loop_winbond(phw_data, 700, 500); |
| 1040 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1041 | if (result > 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1042 | PHY_DEBUG(("[CAL] ** <_tx_iq_calibration> **************\n")); |
| 1043 | PHY_DEBUG(("[CAL] ** TX_IQ_CALIBRATION FAILURE !!\n")); |
| 1044 | PHY_DEBUG(("[CAL] **************************************\n")); |
| 1045 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1046 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1047 | hw_get_dxx_reg(phw_data, 0x54, &val); |
| 1048 | val &= 0x0000FFFF; |
| 1049 | hw_set_dxx_reg(phw_data, 0x54, val); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1050 | } else /* 2nd-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1051 | hw_get_dxx_reg(phw_data, 0x3C, &val); |
| 1052 | val &= 0x000003FF; |
| 1053 | hw_set_dxx_reg(phw_data, 0x3C, val); |
| 1054 | } |
| 1055 | } |
| 1056 | } |
| 1057 | } |
| 1058 | } |
| 1059 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1060 | /* i. Set "calib_start" to 0x0 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1061 | hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl); |
| 1062 | reg_mode_ctrl &= ~MASK_CALIB_START; |
| 1063 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 1064 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
| 1065 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1066 | /* g. Enable AGC */ |
| 1067 | /* hw_get_dxx_reg(phw_data, REG_AGC_CTRL3, &val); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1068 | reg_agc_ctrl3 |= BIT(2); |
| 1069 | reg_agc_ctrl3 &= ~(MASK_LNA_FIX_GAIN|MASK_AGC_FIX); |
| 1070 | hw_set_dxx_reg(phw_data, REG_AGC_CTRL3, reg_agc_ctrl3); |
| 1071 | |
| 1072 | #ifdef _DEBUG |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1073 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1074 | hw_get_dxx_reg(phw_data, 0x54, &val); |
| 1075 | PHY_DEBUG(("[CAL] ** 0x54 = 0x%08X\n", val)); |
| 1076 | tx_cal_reg[0] = _s4_to_s32((val & 0xF0000000) >> 28); |
| 1077 | tx_cal_reg[1] = _s4_to_s32((val & 0x0F000000) >> 24); |
| 1078 | tx_cal_reg[2] = _s4_to_s32((val & 0x00F00000) >> 20); |
| 1079 | tx_cal_reg[3] = _s4_to_s32((val & 0x000F0000) >> 16); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1080 | } else /* 2nd-cut */ { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1081 | hw_get_dxx_reg(phw_data, 0x3C, &val); |
| 1082 | PHY_DEBUG(("[CAL] ** 0x3C = 0x%08X\n", val)); |
| 1083 | tx_cal_reg[0] = _s5_to_s32((val & 0xF8000000) >> 27); |
| 1084 | tx_cal_reg[1] = _s6_to_s32((val & 0x07E00000) >> 21); |
| 1085 | tx_cal_reg[2] = _s6_to_s32((val & 0x001F8000) >> 15); |
| 1086 | tx_cal_reg[3] = _s5_to_s32((val & 0x00007C00) >> 10); |
| 1087 | |
| 1088 | } |
| 1089 | |
| 1090 | PHY_DEBUG(("[CAL] ** tx_cal_reg[0] = %d\n", tx_cal_reg[0])); |
| 1091 | PHY_DEBUG(("[CAL] tx_cal_reg[1] = %d\n", tx_cal_reg[1])); |
| 1092 | PHY_DEBUG(("[CAL] tx_cal_reg[2] = %d\n", tx_cal_reg[2])); |
| 1093 | PHY_DEBUG(("[CAL] tx_cal_reg[3] = %d\n", tx_cal_reg[3])); |
| 1094 | #endif |
| 1095 | |
| 1096 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1097 | /* |
| 1098 | * for test - BEN |
| 1099 | * RF Control Override |
| 1100 | */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1101 | } |
| 1102 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1103 | /*****************************************************/ |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 1104 | u8 _rx_iq_calibration_loop_winbond(struct hw_data *phw_data, u16 factor, u32 frequency) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1105 | { |
| 1106 | u32 reg_mode_ctrl; |
| 1107 | s32 iqcal_tone_i; |
| 1108 | s32 iqcal_tone_q; |
| 1109 | s32 iqcal_image_i; |
| 1110 | s32 iqcal_image_q; |
| 1111 | s32 rot_tone_i_b; |
| 1112 | s32 rot_tone_q_b; |
| 1113 | s32 rot_image_i_b; |
| 1114 | s32 rot_image_q_b; |
| 1115 | s32 rx_cal_flt_b[4]; |
| 1116 | s32 rx_cal[4]; |
| 1117 | s32 rx_cal_reg[4]; |
| 1118 | s32 a_2, b_2; |
| 1119 | s32 sin_b, sin_2b; |
| 1120 | s32 cos_b, cos_2b; |
| 1121 | s32 temp1, temp2; |
| 1122 | u32 val; |
| 1123 | u16 loop; |
| 1124 | |
| 1125 | u32 pwr_tone; |
| 1126 | u32 pwr_image; |
| 1127 | u8 verify_count; |
| 1128 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1129 | s32 iqcal_tone_i_avg, iqcal_tone_q_avg; |
| 1130 | s32 iqcal_image_i_avg, iqcal_image_q_avg; |
| 1131 | u16 capture_time; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1132 | |
| 1133 | PHY_DEBUG(("[CAL] -> [5]_rx_iq_calibration_loop()\n")); |
| 1134 | PHY_DEBUG(("[CAL] ** factor = %d\n", factor)); |
| 1135 | |
| 1136 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1137 | /* RF Control Override */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1138 | hw_get_cxx_reg(phw_data, 0x80, &val); |
| 1139 | val |= BIT(19); |
| 1140 | hw_set_cxx_reg(phw_data, 0x80, val); |
| 1141 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1142 | /* RF_Ctrl */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1143 | hw_get_cxx_reg(phw_data, 0xE4, &val); |
| 1144 | val |= BIT(0); |
| 1145 | hw_set_cxx_reg(phw_data, 0xE4, val); |
| 1146 | PHY_DEBUG(("[CAL] ** RF_CTRL(0xE4) = 0x%08X", val)); |
| 1147 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1148 | hw_set_dxx_reg(phw_data, 0x58, 0x44444444); /* IQ_Alpha */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1149 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1150 | /* b. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1151 | |
| 1152 | hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl); |
| 1153 | PHY_DEBUG(("[CAL] MODE_CTRL (read) = 0x%08X\n", reg_mode_ctrl)); |
| 1154 | |
| 1155 | verify_count = 0; |
| 1156 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1157 | /* for (loop = 0; loop < 1; loop++) */ |
| 1158 | /* for (loop = 0; loop < LOOP_TIMES; loop++) */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1159 | loop = LOOP_TIMES; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1160 | while (loop > 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1161 | PHY_DEBUG(("[CAL] [%d.] <_rx_iq_calibration_loop>\n", (LOOP_TIMES-loop+1))); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1162 | iqcal_tone_i_avg = 0; |
| 1163 | iqcal_tone_q_avg = 0; |
| 1164 | iqcal_image_i_avg = 0; |
| 1165 | iqcal_image_q_avg = 0; |
| 1166 | capture_time = 0; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1167 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1168 | for (capture_time = 0; capture_time < 10; capture_time++) { |
| 1169 | /* i. Set "calib_start" to 0x0 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1170 | reg_mode_ctrl &= ~MASK_CALIB_START; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1171 | if (!hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl))/*20060718.1 modify */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1172 | return 0; |
| 1173 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1174 | |
| 1175 | reg_mode_ctrl &= ~MASK_IQCAL_MODE; |
| 1176 | reg_mode_ctrl |= (MASK_CALIB_START|0x1); |
| 1177 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 1178 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1179 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1180 | /* c. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1181 | hw_get_dxx_reg(phw_data, REG_CALIB_READ1, &val); |
| 1182 | PHY_DEBUG(("[CAL] CALIB_READ1 = 0x%08X\n", val)); |
| 1183 | |
| 1184 | iqcal_tone_i = _s13_to_s32(val & 0x00001FFF); |
| 1185 | iqcal_tone_q = _s13_to_s32((val & 0x03FFE000) >> 13); |
| 1186 | PHY_DEBUG(("[CAL] ** iqcal_tone_i = %d, iqcal_tone_q = %d\n", |
| 1187 | iqcal_tone_i, iqcal_tone_q)); |
| 1188 | |
| 1189 | hw_get_dxx_reg(phw_data, REG_CALIB_READ2, &val); |
| 1190 | PHY_DEBUG(("[CAL] CALIB_READ2 = 0x%08X\n", val)); |
| 1191 | |
| 1192 | iqcal_image_i = _s13_to_s32(val & 0x00001FFF); |
| 1193 | iqcal_image_q = _s13_to_s32((val & 0x03FFE000) >> 13); |
| 1194 | PHY_DEBUG(("[CAL] ** iqcal_image_i = %d, iqcal_image_q = %d\n", |
| 1195 | iqcal_image_i, iqcal_image_q)); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1196 | if (capture_time == 0) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1197 | continue; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1198 | else { |
| 1199 | iqcal_image_i_avg = (iqcal_image_i_avg*(capture_time-1) + iqcal_image_i)/capture_time; |
| 1200 | iqcal_image_q_avg = (iqcal_image_q_avg*(capture_time-1) + iqcal_image_q)/capture_time; |
| 1201 | iqcal_tone_i_avg = (iqcal_tone_i_avg*(capture_time-1) + iqcal_tone_i)/capture_time; |
| 1202 | iqcal_tone_q_avg = (iqcal_tone_q_avg*(capture_time-1) + iqcal_tone_q)/capture_time; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1203 | } |
| 1204 | } |
| 1205 | |
| 1206 | |
| 1207 | iqcal_image_i = iqcal_image_i_avg; |
| 1208 | iqcal_image_q = iqcal_image_q_avg; |
| 1209 | iqcal_tone_i = iqcal_tone_i_avg; |
| 1210 | iqcal_tone_q = iqcal_tone_q_avg; |
| 1211 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1212 | /* d. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1213 | rot_tone_i_b = (iqcal_tone_i * iqcal_tone_i + |
| 1214 | iqcal_tone_q * iqcal_tone_q) / 1024; |
| 1215 | rot_tone_q_b = (iqcal_tone_i * iqcal_tone_q * (-1) + |
| 1216 | iqcal_tone_q * iqcal_tone_i) / 1024; |
| 1217 | rot_image_i_b = (iqcal_image_i * iqcal_tone_i - |
| 1218 | iqcal_image_q * iqcal_tone_q) / 1024; |
| 1219 | rot_image_q_b = (iqcal_image_i * iqcal_tone_q + |
| 1220 | iqcal_image_q * iqcal_tone_i) / 1024; |
| 1221 | |
| 1222 | PHY_DEBUG(("[CAL] ** rot_tone_i_b = %d\n", rot_tone_i_b)); |
| 1223 | PHY_DEBUG(("[CAL] ** rot_tone_q_b = %d\n", rot_tone_q_b)); |
| 1224 | PHY_DEBUG(("[CAL] ** rot_image_i_b = %d\n", rot_image_i_b)); |
| 1225 | PHY_DEBUG(("[CAL] ** rot_image_q_b = %d\n", rot_image_q_b)); |
| 1226 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1227 | /* f. */ |
| 1228 | if (rot_tone_i_b == 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1229 | PHY_DEBUG(("[CAL] ** <_rx_iq_calibration_loop> ERROR *******\n")); |
| 1230 | PHY_DEBUG(("[CAL] ** rot_tone_i_b=0 to calculate EPS and THETA !!\n")); |
| 1231 | PHY_DEBUG(("[CAL] ******************************************\n")); |
| 1232 | break; |
| 1233 | } |
| 1234 | |
| 1235 | a_2 = (rot_image_i_b * 32768) / rot_tone_i_b - |
| 1236 | phw_data->iq_rsdl_gain_tx_d2; |
| 1237 | b_2 = (rot_image_q_b * 32768) / rot_tone_i_b - |
| 1238 | phw_data->iq_rsdl_phase_tx_d2; |
| 1239 | |
| 1240 | PHY_DEBUG(("[CAL] ** iq_rsdl_gain_tx_d2 = %d\n", phw_data->iq_rsdl_gain_tx_d2)); |
| 1241 | PHY_DEBUG(("[CAL] ** iq_rsdl_phase_tx_d2= %d\n", phw_data->iq_rsdl_phase_tx_d2)); |
| 1242 | PHY_DEBUG(("[CAL] ***** EPSILON/2 = %d\n", a_2)); |
| 1243 | PHY_DEBUG(("[CAL] ***** THETA/2 = %d\n", b_2)); |
| 1244 | |
| 1245 | _sin_cos(b_2, &sin_b, &cos_b); |
| 1246 | _sin_cos(b_2*2, &sin_2b, &cos_2b); |
| 1247 | PHY_DEBUG(("[CAL] ** sin(b/2)=%d, cos(b/2)=%d\n", sin_b, cos_b)); |
| 1248 | PHY_DEBUG(("[CAL] ** sin(b)=%d, cos(b)=%d\n", sin_2b, cos_2b)); |
| 1249 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1250 | if (cos_2b == 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1251 | PHY_DEBUG(("[CAL] ** <_rx_iq_calibration_loop> ERROR *******\n")); |
| 1252 | PHY_DEBUG(("[CAL] ** cos(b)=0 !!\n")); |
| 1253 | PHY_DEBUG(("[CAL] ******************************************\n")); |
| 1254 | break; |
| 1255 | } |
| 1256 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1257 | /* 1280 * 32768 = 41943040 */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1258 | temp1 = (41943040/cos_2b)*cos_b; |
| 1259 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1260 | /* temp2 = (41943040/cos_2b)*sin_b*(-1); */ |
| 1261 | if (phw_data->revision == 0x2002)/* 1st-cut */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1262 | temp2 = (41943040/cos_2b)*sin_b*(-1); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1263 | else/* 2nd-cut */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1264 | temp2 = (41943040*4/cos_2b)*sin_b*(-1); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1265 | |
| 1266 | rx_cal_flt_b[0] = _floor(temp1/(32768+a_2)); |
| 1267 | rx_cal_flt_b[1] = _floor(temp2/(32768-a_2)); |
| 1268 | rx_cal_flt_b[2] = _floor(temp2/(32768+a_2)); |
| 1269 | rx_cal_flt_b[3] = _floor(temp1/(32768-a_2)); |
| 1270 | |
| 1271 | PHY_DEBUG(("[CAL] ** rx_cal_flt_b[0] = %d\n", rx_cal_flt_b[0])); |
| 1272 | PHY_DEBUG(("[CAL] rx_cal_flt_b[1] = %d\n", rx_cal_flt_b[1])); |
| 1273 | PHY_DEBUG(("[CAL] rx_cal_flt_b[2] = %d\n", rx_cal_flt_b[2])); |
| 1274 | PHY_DEBUG(("[CAL] rx_cal_flt_b[3] = %d\n", rx_cal_flt_b[3])); |
| 1275 | |
| 1276 | rx_cal[0] = rx_cal_flt_b[0] - 128; |
| 1277 | rx_cal[1] = rx_cal_flt_b[1]; |
| 1278 | rx_cal[2] = rx_cal_flt_b[2]; |
| 1279 | rx_cal[3] = rx_cal_flt_b[3] - 128; |
| 1280 | PHY_DEBUG(("[CAL] ** rx_cal[0] = %d\n", rx_cal[0])); |
| 1281 | PHY_DEBUG(("[CAL] rx_cal[1] = %d\n", rx_cal[1])); |
| 1282 | PHY_DEBUG(("[CAL] rx_cal[2] = %d\n", rx_cal[2])); |
| 1283 | PHY_DEBUG(("[CAL] rx_cal[3] = %d\n", rx_cal[3])); |
| 1284 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1285 | /* e. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1286 | pwr_tone = (iqcal_tone_i*iqcal_tone_i + iqcal_tone_q*iqcal_tone_q); |
| 1287 | pwr_image = (iqcal_image_i*iqcal_image_i + iqcal_image_q*iqcal_image_q)*factor; |
| 1288 | |
| 1289 | PHY_DEBUG(("[CAL] ** pwr_tone = %d\n", pwr_tone)); |
| 1290 | PHY_DEBUG(("[CAL] ** pwr_image = %d\n", pwr_image)); |
| 1291 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1292 | if (pwr_tone > pwr_image) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1293 | verify_count++; |
| 1294 | |
| 1295 | PHY_DEBUG(("[CAL] ** <_rx_iq_calibration_loop> *************\n")); |
| 1296 | PHY_DEBUG(("[CAL] ** VERIFY OK # %d !!\n", verify_count)); |
| 1297 | PHY_DEBUG(("[CAL] ******************************************\n")); |
| 1298 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1299 | if (verify_count > 2) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1300 | PHY_DEBUG(("[CAL] ** <_rx_iq_calibration_loop> *********\n")); |
| 1301 | PHY_DEBUG(("[CAL] ** RX_IQ_CALIBRATION OK !!\n")); |
| 1302 | PHY_DEBUG(("[CAL] **************************************\n")); |
| 1303 | return 0; |
| 1304 | } |
| 1305 | |
| 1306 | continue; |
| 1307 | } |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1308 | /* g. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1309 | hw_get_dxx_reg(phw_data, 0x54, &val); |
| 1310 | PHY_DEBUG(("[CAL] ** 0x54 = 0x%08X\n", val)); |
| 1311 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1312 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1313 | rx_cal_reg[0] = _s4_to_s32((val & 0x0000F000) >> 12); |
| 1314 | rx_cal_reg[1] = _s4_to_s32((val & 0x00000F00) >> 8); |
| 1315 | rx_cal_reg[2] = _s4_to_s32((val & 0x000000F0) >> 4); |
| 1316 | rx_cal_reg[3] = _s4_to_s32((val & 0x0000000F)); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1317 | } else /* 2nd-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1318 | rx_cal_reg[0] = _s5_to_s32((val & 0xF8000000) >> 27); |
| 1319 | rx_cal_reg[1] = _s6_to_s32((val & 0x07E00000) >> 21); |
| 1320 | rx_cal_reg[2] = _s6_to_s32((val & 0x001F8000) >> 15); |
| 1321 | rx_cal_reg[3] = _s5_to_s32((val & 0x00007C00) >> 10); |
| 1322 | } |
| 1323 | |
| 1324 | PHY_DEBUG(("[CAL] ** rx_cal_reg[0] = %d\n", rx_cal_reg[0])); |
| 1325 | PHY_DEBUG(("[CAL] rx_cal_reg[1] = %d\n", rx_cal_reg[1])); |
| 1326 | PHY_DEBUG(("[CAL] rx_cal_reg[2] = %d\n", rx_cal_reg[2])); |
| 1327 | PHY_DEBUG(("[CAL] rx_cal_reg[3] = %d\n", rx_cal_reg[3])); |
| 1328 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1329 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
| 1330 | if (((rx_cal_reg[0] == 7) || (rx_cal_reg[0] == (-8))) && |
| 1331 | ((rx_cal_reg[3] == 7) || (rx_cal_reg[3] == (-8)))) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1332 | PHY_DEBUG(("[CAL] ** <_rx_iq_calibration_loop> *********\n")); |
| 1333 | PHY_DEBUG(("[CAL] ** RX_IQ_CALIBRATION SATUATION !!\n")); |
| 1334 | PHY_DEBUG(("[CAL] **************************************\n")); |
| 1335 | break; |
| 1336 | } |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1337 | } else /* 2nd-cut */{ |
| 1338 | if (((rx_cal_reg[0] == 31) || (rx_cal_reg[0] == (-32))) && |
| 1339 | ((rx_cal_reg[3] == 31) || (rx_cal_reg[3] == (-32)))) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1340 | PHY_DEBUG(("[CAL] ** <_rx_iq_calibration_loop> *********\n")); |
| 1341 | PHY_DEBUG(("[CAL] ** RX_IQ_CALIBRATION SATUATION !!\n")); |
| 1342 | PHY_DEBUG(("[CAL] **************************************\n")); |
| 1343 | break; |
| 1344 | } |
| 1345 | } |
| 1346 | |
| 1347 | rx_cal[0] = rx_cal[0] + rx_cal_reg[0]; |
| 1348 | rx_cal[1] = rx_cal[1] + rx_cal_reg[1]; |
| 1349 | rx_cal[2] = rx_cal[2] + rx_cal_reg[2]; |
| 1350 | rx_cal[3] = rx_cal[3] + rx_cal_reg[3]; |
| 1351 | PHY_DEBUG(("[CAL] ** apply rx_cal[0] = %d\n", rx_cal[0])); |
| 1352 | PHY_DEBUG(("[CAL] apply rx_cal[1] = %d\n", rx_cal[1])); |
| 1353 | PHY_DEBUG(("[CAL] apply rx_cal[2] = %d\n", rx_cal[2])); |
| 1354 | PHY_DEBUG(("[CAL] apply rx_cal[3] = %d\n", rx_cal[3])); |
| 1355 | |
| 1356 | hw_get_dxx_reg(phw_data, 0x54, &val); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1357 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1358 | val &= 0x0000FFFF; |
| 1359 | val |= ((_s32_to_s4(rx_cal[0]) << 12)| |
| 1360 | (_s32_to_s4(rx_cal[1]) << 8)| |
| 1361 | (_s32_to_s4(rx_cal[2]) << 4)| |
| 1362 | (_s32_to_s4(rx_cal[3]))); |
| 1363 | hw_set_dxx_reg(phw_data, 0x54, val); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1364 | } else /* 2nd-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1365 | val &= 0x000003FF; |
| 1366 | val |= ((_s32_to_s5(rx_cal[0]) << 27)| |
| 1367 | (_s32_to_s6(rx_cal[1]) << 21)| |
| 1368 | (_s32_to_s6(rx_cal[2]) << 15)| |
| 1369 | (_s32_to_s5(rx_cal[3]) << 10)); |
| 1370 | hw_set_dxx_reg(phw_data, 0x54, val); |
| 1371 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1372 | if (loop == 3) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1373 | return 0; |
| 1374 | } |
| 1375 | PHY_DEBUG(("[CAL] ** CALIB_DATA = 0x%08X\n", val)); |
| 1376 | |
| 1377 | loop--; |
| 1378 | } |
| 1379 | |
| 1380 | return 1; |
| 1381 | } |
| 1382 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1383 | /*************************************************/ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1384 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1385 | /***************************************************************/ |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 1386 | void _rx_iq_calibration_winbond(struct hw_data *phw_data, u32 frequency) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1387 | { |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1388 | /* figo 20050523 marked this flag for can't compile for relesase */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1389 | #ifdef _DEBUG |
| 1390 | s32 rx_cal_reg[4]; |
| 1391 | u32 val; |
| 1392 | #endif |
| 1393 | |
| 1394 | u8 result; |
| 1395 | |
| 1396 | PHY_DEBUG(("[CAL] -> [5]_rx_iq_calibration()\n")); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1397 | /* a. Set RFIC to "RX calibration mode" */ |
| 1398 | /* ; ----- Calibration (7). RX path IQ imbalance calibration loop */ |
| 1399 | /* 0x01 0xFFBFC2 ; 3FEFF ; Calibration (7a). enable RX IQ calibration loop circuits */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1400 | phy_set_rf_data(phw_data, 1, (1<<24)|0xEFBFC2); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1401 | /* 0x0B 0x1A01D6 ; 06817 ; Calibration (7b). enable RX I/Q cal loop SW1 circuits */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1402 | phy_set_rf_data(phw_data, 11, (11<<24)|0x1A05D6); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1403 | /* 0x05 0x24848A ; 09212 ; Calibration (7c). setting TX-VGA gain (TXGCH) to 2 --> to be optimized */ |
| 1404 | phy_set_rf_data(phw_data, 5, (5<<24) | phw_data->txvga_setting_for_cal); |
| 1405 | /* 0x06 0x06840C ; 01A10 ; Calibration (7d). RXGCH=00; RXGCL=010 000 (RXVGA) --> to be optimized */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1406 | phy_set_rf_data(phw_data, 6, (6<<24)|0x06834C); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1407 | /* 0x00 0xFFF1C0 ; 3F7C7 ; Calibration (7e). turn on IQ imbalance/Test mode */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1408 | phy_set_rf_data(phw_data, 0, (0<<24)|0xFFF1C0); |
| 1409 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1410 | /* ; [BB-chip]: Calibration (7f). Send test pattern */ |
| 1411 | /* ; [BB-chip]: Calibration (7g). Search RXGCL optimal value */ |
| 1412 | /* ; [BB-chip]: Calibration (7h). Caculate RX-path IQ imbalance and setting RX path IQ compensation table */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1413 | |
| 1414 | result = _rx_iq_calibration_loop_winbond(phw_data, 12589, frequency); |
| 1415 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1416 | if (result > 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1417 | _reset_rx_cal(phw_data); |
| 1418 | result = _rx_iq_calibration_loop_winbond(phw_data, 7943, frequency); |
| 1419 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1420 | if (result > 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1421 | _reset_rx_cal(phw_data); |
| 1422 | result = _rx_iq_calibration_loop_winbond(phw_data, 5011, frequency); |
| 1423 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1424 | if (result > 0) { |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1425 | PHY_DEBUG(("[CAL] ** <_rx_iq_calibration> **************\n")); |
| 1426 | PHY_DEBUG(("[CAL] ** RX_IQ_CALIBRATION FAILURE !!\n")); |
| 1427 | PHY_DEBUG(("[CAL] **************************************\n")); |
| 1428 | _reset_rx_cal(phw_data); |
| 1429 | } |
| 1430 | } |
| 1431 | } |
| 1432 | |
| 1433 | #ifdef _DEBUG |
| 1434 | hw_get_dxx_reg(phw_data, 0x54, &val); |
| 1435 | PHY_DEBUG(("[CAL] ** 0x54 = 0x%08X\n", val)); |
| 1436 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1437 | if (phw_data->revision == 0x2002) /* 1st-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1438 | rx_cal_reg[0] = _s4_to_s32((val & 0x0000F000) >> 12); |
| 1439 | rx_cal_reg[1] = _s4_to_s32((val & 0x00000F00) >> 8); |
| 1440 | rx_cal_reg[2] = _s4_to_s32((val & 0x000000F0) >> 4); |
| 1441 | rx_cal_reg[3] = _s4_to_s32((val & 0x0000000F)); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1442 | } else /* 2nd-cut */{ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1443 | rx_cal_reg[0] = _s5_to_s32((val & 0xF8000000) >> 27); |
| 1444 | rx_cal_reg[1] = _s6_to_s32((val & 0x07E00000) >> 21); |
| 1445 | rx_cal_reg[2] = _s6_to_s32((val & 0x001F8000) >> 15); |
| 1446 | rx_cal_reg[3] = _s5_to_s32((val & 0x00007C00) >> 10); |
| 1447 | } |
| 1448 | |
| 1449 | PHY_DEBUG(("[CAL] ** rx_cal_reg[0] = %d\n", rx_cal_reg[0])); |
| 1450 | PHY_DEBUG(("[CAL] rx_cal_reg[1] = %d\n", rx_cal_reg[1])); |
| 1451 | PHY_DEBUG(("[CAL] rx_cal_reg[2] = %d\n", rx_cal_reg[2])); |
| 1452 | PHY_DEBUG(("[CAL] rx_cal_reg[3] = %d\n", rx_cal_reg[3])); |
| 1453 | #endif |
| 1454 | |
| 1455 | } |
| 1456 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1457 | /*******************************************************/ |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 1458 | void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1459 | { |
| 1460 | u32 reg_mode_ctrl; |
| 1461 | u32 iq_alpha; |
| 1462 | |
| 1463 | PHY_DEBUG(("[CAL] -> phy_calibration_winbond()\n")); |
| 1464 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1465 | /* 20040701 1.1.25.1000 kevin */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1466 | hw_get_cxx_reg(phw_data, 0x80, &mac_ctrl); |
| 1467 | hw_get_cxx_reg(phw_data, 0xE4, &rf_ctrl); |
| 1468 | hw_get_dxx_reg(phw_data, 0x58, &iq_alpha); |
| 1469 | |
| 1470 | |
| 1471 | |
| 1472 | _rxadc_dc_offset_cancellation_winbond(phw_data, frequency); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1473 | /* _txidac_dc_offset_cancellation_winbond(phw_data); */ |
| 1474 | /* _txqdac_dc_offset_cacellation_winbond(phw_data); */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1475 | |
| 1476 | _tx_iq_calibration_winbond(phw_data); |
| 1477 | _rx_iq_calibration_winbond(phw_data, frequency); |
| 1478 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1479 | /*********************************************************************/ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1480 | hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1481 | reg_mode_ctrl &= ~(MASK_IQCAL_TONE_SEL|MASK_IQCAL_MODE|MASK_CALIB_START); /* set when finish */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1482 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 1483 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
| 1484 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1485 | /* i. Set RFIC to "Normal mode" */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1486 | hw_set_cxx_reg(phw_data, 0x80, mac_ctrl); |
| 1487 | hw_set_cxx_reg(phw_data, 0xE4, rf_ctrl); |
| 1488 | hw_set_dxx_reg(phw_data, 0x58, iq_alpha); |
| 1489 | |
| 1490 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1491 | /*********************************************************************/ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1492 | phy_init_rf(phw_data); |
| 1493 | |
| 1494 | } |
| 1495 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1496 | /******************/ |
| 1497 | void phy_set_rf_data(struct hw_data *pHwData, u32 index, u32 value) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1498 | { |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1499 | u32 ltmpi = 0; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1500 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1501 | switch (pHwData->phy_type) { |
| 1502 | case RF_MAXIM_2825: |
| 1503 | case RF_MAXIM_V1: /* 11g Winbond 2nd BB(with Phy board (v1) + Maxim 331) */ |
| 1504 | ltmp = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(value, 18); |
| 1505 | break; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1506 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1507 | case RF_MAXIM_2827: |
| 1508 | ltmp = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(value, 18); |
| 1509 | break; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1510 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1511 | case RF_MAXIM_2828: |
| 1512 | ltmp = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(value, 18); |
| 1513 | break; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1514 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1515 | case RF_MAXIM_2829: |
| 1516 | ltmp = (1 << 31) | (0 << 30) | (18 << 24) | BitReverse(value, 18); |
| 1517 | break; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1518 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1519 | case RF_AIROHA_2230: |
| 1520 | case RF_AIROHA_2230S: /* 20060420 Add this */ |
| 1521 | ltmp = (1 << 31) | (0 << 30) | (20 << 24) | BitReverse(value, 20); |
| 1522 | break; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1523 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1524 | case RF_AIROHA_7230: |
| 1525 | ltmp = (1 << 31) | (0 << 30) | (24 << 24) | (value&0xffffff); |
| 1526 | break; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1527 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1528 | case RF_WB_242: |
| 1529 | case RF_WB_242_1:/* 20060619.5 Add */ |
| 1530 | ltmp = (1 << 31) | (0 << 30) | (24 << 24) | BitReverse(value, 24); |
| 1531 | break; |
| 1532 | } |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1533 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1534 | Wb35Reg_WriteSync(pHwData, 0x0864, ltmp); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1535 | } |
| 1536 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1537 | /* 20060717 modify as Bruce's mail */ |
Pekka Enberg | 8e41b4b | 2009-01-12 18:02:47 +0200 | [diff] [blame] | 1538 | unsigned char adjust_TXVGA_for_iq_mag(struct hw_data *phw_data) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1539 | { |
| 1540 | int init_txvga = 0; |
| 1541 | u32 reg_mode_ctrl; |
| 1542 | u32 val; |
| 1543 | s32 iqcal_tone_i0; |
| 1544 | s32 iqcal_tone_q0; |
| 1545 | u32 sqsum; |
| 1546 | s32 iq_mag_0_tx; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1547 | u8 reg_state; |
| 1548 | int current_txvga; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1549 | |
| 1550 | |
| 1551 | reg_state = 0; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1552 | for (init_txvga = 0; init_txvga < 10; init_txvga++) { |
| 1553 | current_txvga = (0x24C40A|(init_txvga<<6)); |
| 1554 | phy_set_rf_data(phw_data, 5, ((5<<24)|current_txvga)); |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1555 | phw_data->txvga_setting_for_cal = current_txvga; |
| 1556 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1557 | msleep(30);/* 20060612.1.a */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1558 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1559 | if (!hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl))/* 20060718.1 modify */ |
Pekka Enberg | 279b6cc | 2008-10-27 22:46:39 +0200 | [diff] [blame] | 1560 | return false; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1561 | |
| 1562 | PHY_DEBUG(("[CAL] MODE_CTRL (read) = 0x%08X\n", reg_mode_ctrl)); |
| 1563 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1564 | /* |
| 1565 | * a. Set iqcal_mode[1:0] to 0x2 and set "calib_start" to 0x1 to |
| 1566 | * enable "IQ alibration Mode II" |
| 1567 | */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1568 | reg_mode_ctrl &= ~(MASK_IQCAL_TONE_SEL|MASK_IQCAL_MODE); |
| 1569 | reg_mode_ctrl &= ~MASK_IQCAL_MODE; |
| 1570 | reg_mode_ctrl |= (MASK_CALIB_START|0x02); |
| 1571 | reg_mode_ctrl |= (MASK_CALIB_START|0x02|2<<2); |
| 1572 | hw_set_dxx_reg(phw_data, REG_MODE_CTRL, reg_mode_ctrl); |
| 1573 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
| 1574 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1575 | udelay(1);/* 20060612.1.a */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1576 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1577 | udelay(300);/* 20060612.1.a */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1578 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1579 | /* b. */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1580 | hw_get_dxx_reg(phw_data, REG_CALIB_READ1, &val); |
| 1581 | |
| 1582 | PHY_DEBUG(("[CAL] CALIB_READ1 = 0x%08X\n", val)); |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1583 | udelay(300);/* 20060612.1.a */ |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1584 | |
| 1585 | iqcal_tone_i0 = _s13_to_s32(val & 0x00001FFF); |
| 1586 | iqcal_tone_q0 = _s13_to_s32((val & 0x03FFE000) >> 13); |
| 1587 | PHY_DEBUG(("[CAL] ** iqcal_tone_i0=%d, iqcal_tone_q0=%d\n", |
| 1588 | iqcal_tone_i0, iqcal_tone_q0)); |
| 1589 | |
| 1590 | sqsum = iqcal_tone_i0*iqcal_tone_i0 + iqcal_tone_q0*iqcal_tone_q0; |
| 1591 | iq_mag_0_tx = (s32) _sqrt(sqsum); |
| 1592 | PHY_DEBUG(("[CAL] ** auto_adjust_txvga_for_iq_mag_0_tx=%d\n", iq_mag_0_tx)); |
| 1593 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1594 | if (iq_mag_0_tx >= 700 && iq_mag_0_tx <= 1750) |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1595 | break; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1596 | else if (iq_mag_0_tx > 1750) { |
| 1597 | init_txvga = -2; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1598 | continue; |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1599 | } else |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1600 | continue; |
| 1601 | |
| 1602 | } |
| 1603 | |
Timofey Trofimov | 3a4d1b9 | 2010-05-25 18:19:54 +0400 | [diff] [blame^] | 1604 | if (iq_mag_0_tx >= 700 && iq_mag_0_tx <= 1750) |
Pekka Enberg | 279b6cc | 2008-10-27 22:46:39 +0200 | [diff] [blame] | 1605 | return true; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1606 | else |
Pekka Enberg | 279b6cc | 2008-10-27 22:46:39 +0200 | [diff] [blame] | 1607 | return false; |
Pavel Machek | 66101de | 2008-10-01 14:36:56 +0200 | [diff] [blame] | 1608 | } |