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Antoine Tenart70f19372015-05-18 11:19:18 +02001/*
2 * Marvell Berlin2 ADC driver
3 *
4 * Copyright (C) 2015 Marvell Technology Group Ltd.
5 *
6 * Antoine Tenart <antoine.tenart@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/iio/iio.h>
14#include <linux/iio/driver.h>
15#include <linux/iio/machine.h>
16#include <linux/interrupt.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21#include <linux/mfd/syscon.h>
22#include <linux/regmap.h>
23#include <linux/sched.h>
24#include <linux/wait.h>
25
26#define BERLIN2_SM_CTRL 0x14
27#define BERLIN2_SM_CTRL_SM_SOC_INT BIT(1)
28#define BERLIN2_SM_CTRL_SOC_SM_INT BIT(2)
Hartmut Knaack57cb0672015-07-28 00:38:57 +020029#define BERLIN2_SM_CTRL_ADC_SEL(x) ((x) << 5) /* 0-15 */
Hartmut Knaack4b308e82015-07-28 00:38:59 +020030#define BERLIN2_SM_CTRL_ADC_SEL_MASK GENMASK(8, 5)
Antoine Tenart70f19372015-05-18 11:19:18 +020031#define BERLIN2_SM_CTRL_ADC_POWER BIT(9)
32#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV2 (0x0 << 10)
33#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV3 (0x1 << 10)
34#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV4 (0x2 << 10)
35#define BERLIN2_SM_CTRL_ADC_CLKSEL_DIV8 (0x3 << 10)
Hartmut Knaack4b308e82015-07-28 00:38:59 +020036#define BERLIN2_SM_CTRL_ADC_CLKSEL_MASK GENMASK(11, 10)
Antoine Tenart70f19372015-05-18 11:19:18 +020037#define BERLIN2_SM_CTRL_ADC_START BIT(12)
38#define BERLIN2_SM_CTRL_ADC_RESET BIT(13)
39#define BERLIN2_SM_CTRL_ADC_BANDGAP_RDY BIT(14)
40#define BERLIN2_SM_CTRL_ADC_CONT_SINGLE (0x0 << 15)
41#define BERLIN2_SM_CTRL_ADC_CONT_CONTINUOUS (0x1 << 15)
42#define BERLIN2_SM_CTRL_ADC_BUFFER_EN BIT(16)
43#define BERLIN2_SM_CTRL_ADC_VREF_EXT (0x0 << 17)
44#define BERLIN2_SM_CTRL_ADC_VREF_INT (0x1 << 17)
45#define BERLIN2_SM_CTRL_ADC_ROTATE BIT(19)
46#define BERLIN2_SM_CTRL_TSEN_EN BIT(20)
47#define BERLIN2_SM_CTRL_TSEN_CLK_SEL_125 (0x0 << 21) /* 1.25 MHz */
48#define BERLIN2_SM_CTRL_TSEN_CLK_SEL_250 (0x1 << 21) /* 2.5 MHz */
49#define BERLIN2_SM_CTRL_TSEN_MODE_0_125 (0x0 << 22) /* 0-125 C */
50#define BERLIN2_SM_CTRL_TSEN_MODE_10_50 (0x1 << 22) /* 10-50 C */
51#define BERLIN2_SM_CTRL_TSEN_RESET BIT(29)
52#define BERLIN2_SM_ADC_DATA 0x20
Hartmut Knaack4b308e82015-07-28 00:38:59 +020053#define BERLIN2_SM_ADC_MASK GENMASK(9, 0)
Antoine Tenart70f19372015-05-18 11:19:18 +020054#define BERLIN2_SM_ADC_STATUS 0x1c
55#define BERLIN2_SM_ADC_STATUS_DATA_RDY(x) BIT(x) /* 0-15 */
Hartmut Knaack57cb0672015-07-28 00:38:57 +020056#define BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK GENMASK(15, 0)
Antoine Tenart70f19372015-05-18 11:19:18 +020057#define BERLIN2_SM_ADC_STATUS_INT_EN(x) (BIT(x) << 16) /* 0-15 */
Hartmut Knaack57cb0672015-07-28 00:38:57 +020058#define BERLIN2_SM_ADC_STATUS_INT_EN_MASK GENMASK(31, 16)
Antoine Tenart70f19372015-05-18 11:19:18 +020059#define BERLIN2_SM_TSEN_STATUS 0x24
60#define BERLIN2_SM_TSEN_STATUS_DATA_RDY BIT(0)
61#define BERLIN2_SM_TSEN_STATUS_INT_EN BIT(1)
62#define BERLIN2_SM_TSEN_DATA 0x28
Hartmut Knaack57cb0672015-07-28 00:38:57 +020063#define BERLIN2_SM_TSEN_MASK GENMASK(9, 0)
Antoine Tenart70f19372015-05-18 11:19:18 +020064#define BERLIN2_SM_TSEN_CTRL 0x74
65#define BERLIN2_SM_TSEN_CTRL_START BIT(8)
66#define BERLIN2_SM_TSEN_CTRL_SETTLING_4 (0x0 << 21) /* 4 us */
67#define BERLIN2_SM_TSEN_CTRL_SETTLING_12 (0x1 << 21) /* 12 us */
Hartmut Knaack4b308e82015-07-28 00:38:59 +020068#define BERLIN2_SM_TSEN_CTRL_SETTLING_MASK BIT(21)
Antoine Tenart70f19372015-05-18 11:19:18 +020069#define BERLIN2_SM_TSEN_CTRL_TRIM(x) ((x) << 22)
Hartmut Knaack4b308e82015-07-28 00:38:59 +020070#define BERLIN2_SM_TSEN_CTRL_TRIM_MASK GENMASK(25, 22)
Antoine Tenart70f19372015-05-18 11:19:18 +020071
72struct berlin2_adc_priv {
73 struct regmap *regmap;
74 struct mutex lock;
75 wait_queue_head_t wq;
76 bool data_available;
77 int data;
78};
79
80#define BERLIN2_ADC_CHANNEL(n, t) \
81 { \
82 .channel = n, \
83 .datasheet_name = "channel"#n, \
84 .type = t, \
85 .indexed = 1, \
86 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
87 }
88
Hartmut Knaack688febb2015-07-28 00:39:00 +020089static const struct iio_chan_spec berlin2_adc_channels[] = {
Antoine Tenart70f19372015-05-18 11:19:18 +020090 BERLIN2_ADC_CHANNEL(0, IIO_VOLTAGE), /* external input */
91 BERLIN2_ADC_CHANNEL(1, IIO_VOLTAGE), /* external input */
92 BERLIN2_ADC_CHANNEL(2, IIO_VOLTAGE), /* external input */
93 BERLIN2_ADC_CHANNEL(3, IIO_VOLTAGE), /* external input */
94 BERLIN2_ADC_CHANNEL(4, IIO_VOLTAGE), /* reserved */
95 BERLIN2_ADC_CHANNEL(5, IIO_VOLTAGE), /* reserved */
96 { /* temperature sensor */
97 .channel = 6,
98 .datasheet_name = "channel6",
99 .type = IIO_TEMP,
100 .indexed = 0,
101 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
102 },
103 BERLIN2_ADC_CHANNEL(7, IIO_VOLTAGE), /* reserved */
104 IIO_CHAN_SOFT_TIMESTAMP(8), /* timestamp */
105};
Antoine Tenart70f19372015-05-18 11:19:18 +0200106
107static int berlin2_adc_read(struct iio_dev *indio_dev, int channel)
108{
109 struct berlin2_adc_priv *priv = iio_priv(indio_dev);
110 int data, ret;
111
112 mutex_lock(&priv->lock);
113
Hartmut Knaack3ac06522015-07-28 00:39:03 +0200114 /* Enable the interrupts */
115 regmap_write(priv->regmap, BERLIN2_SM_ADC_STATUS,
116 BERLIN2_SM_ADC_STATUS_INT_EN(channel));
117
Antoine Tenart70f19372015-05-18 11:19:18 +0200118 /* Configure the ADC */
119 regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
120 BERLIN2_SM_CTRL_ADC_RESET | BERLIN2_SM_CTRL_ADC_SEL_MASK
121 | BERLIN2_SM_CTRL_ADC_START,
122 BERLIN2_SM_CTRL_ADC_SEL(channel) | BERLIN2_SM_CTRL_ADC_START);
123
124 ret = wait_event_interruptible_timeout(priv->wq, priv->data_available,
125 msecs_to_jiffies(1000));
126
127 /* Disable the interrupts */
128 regmap_update_bits(priv->regmap, BERLIN2_SM_ADC_STATUS,
129 BERLIN2_SM_ADC_STATUS_INT_EN(channel), 0);
130
131 if (ret == 0)
132 ret = -ETIMEDOUT;
133 if (ret < 0) {
134 mutex_unlock(&priv->lock);
135 return ret;
136 }
137
138 regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
139 BERLIN2_SM_CTRL_ADC_START, 0);
140
141 data = priv->data;
142 priv->data_available = false;
143
144 mutex_unlock(&priv->lock);
145
146 return data;
147}
148
149static int berlin2_adc_tsen_read(struct iio_dev *indio_dev)
150{
151 struct berlin2_adc_priv *priv = iio_priv(indio_dev);
152 int data, ret;
153
154 mutex_lock(&priv->lock);
155
Hartmut Knaack3ac06522015-07-28 00:39:03 +0200156 /* Enable interrupts */
157 regmap_write(priv->regmap, BERLIN2_SM_TSEN_STATUS,
158 BERLIN2_SM_TSEN_STATUS_INT_EN);
159
Antoine Tenart70f19372015-05-18 11:19:18 +0200160 /* Configure the ADC */
161 regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
162 BERLIN2_SM_CTRL_TSEN_RESET | BERLIN2_SM_CTRL_ADC_ROTATE,
163 BERLIN2_SM_CTRL_ADC_ROTATE);
164
165 /* Configure the temperature sensor */
166 regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_CTRL,
167 BERLIN2_SM_TSEN_CTRL_TRIM_MASK | BERLIN2_SM_TSEN_CTRL_SETTLING_MASK
168 | BERLIN2_SM_TSEN_CTRL_START,
169 BERLIN2_SM_TSEN_CTRL_TRIM(3) | BERLIN2_SM_TSEN_CTRL_SETTLING_12
170 | BERLIN2_SM_TSEN_CTRL_START);
171
172 ret = wait_event_interruptible_timeout(priv->wq, priv->data_available,
173 msecs_to_jiffies(1000));
174
175 /* Disable interrupts */
176 regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_STATUS,
177 BERLIN2_SM_TSEN_STATUS_INT_EN, 0);
178
179 if (ret == 0)
180 ret = -ETIMEDOUT;
181 if (ret < 0) {
182 mutex_unlock(&priv->lock);
183 return ret;
184 }
185
186 regmap_update_bits(priv->regmap, BERLIN2_SM_TSEN_CTRL,
187 BERLIN2_SM_TSEN_CTRL_START, 0);
188
189 data = priv->data;
190 priv->data_available = false;
191
192 mutex_unlock(&priv->lock);
193
194 return data;
195}
196
197static int berlin2_adc_read_raw(struct iio_dev *indio_dev,
198 struct iio_chan_spec const *chan, int *val, int *val2,
199 long mask)
200{
Antoine Tenart70f19372015-05-18 11:19:18 +0200201 int temp;
202
203 switch (mask) {
204 case IIO_CHAN_INFO_RAW:
205 if (chan->type != IIO_VOLTAGE)
206 return -EINVAL;
207
Antoine Tenart70f19372015-05-18 11:19:18 +0200208 *val = berlin2_adc_read(indio_dev, chan->channel);
209 if (*val < 0)
210 return *val;
211
212 return IIO_VAL_INT;
213 case IIO_CHAN_INFO_PROCESSED:
214 if (chan->type != IIO_TEMP)
215 return -EINVAL;
216
Antoine Tenart70f19372015-05-18 11:19:18 +0200217 temp = berlin2_adc_tsen_read(indio_dev);
218 if (temp < 0)
219 return temp;
220
221 if (temp > 2047)
Hartmut Knaack609e9d82015-07-28 00:39:01 +0200222 temp -= 4096;
Antoine Tenart70f19372015-05-18 11:19:18 +0200223
224 /* Convert to milli Celsius */
225 *val = ((temp * 100000) / 264 - 270000);
226 return IIO_VAL_INT;
227 default:
228 break;
229 }
230
231 return -EINVAL;
232}
233
234static irqreturn_t berlin2_adc_irq(int irq, void *private)
235{
236 struct berlin2_adc_priv *priv = iio_priv(private);
237 unsigned val;
238
239 regmap_read(priv->regmap, BERLIN2_SM_ADC_STATUS, &val);
240 if (val & BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK) {
241 regmap_read(priv->regmap, BERLIN2_SM_ADC_DATA, &priv->data);
242 priv->data &= BERLIN2_SM_ADC_MASK;
243
244 val &= ~BERLIN2_SM_ADC_STATUS_DATA_RDY_MASK;
245 regmap_write(priv->regmap, BERLIN2_SM_ADC_STATUS, val);
246
247 priv->data_available = true;
248 wake_up_interruptible(&priv->wq);
249 }
250
251 return IRQ_HANDLED;
252}
253
254static irqreturn_t berlin2_adc_tsen_irq(int irq, void *private)
255{
256 struct berlin2_adc_priv *priv = iio_priv(private);
257 unsigned val;
258
259 regmap_read(priv->regmap, BERLIN2_SM_TSEN_STATUS, &val);
260 if (val & BERLIN2_SM_TSEN_STATUS_DATA_RDY) {
261 regmap_read(priv->regmap, BERLIN2_SM_TSEN_DATA, &priv->data);
262 priv->data &= BERLIN2_SM_TSEN_MASK;
263
264 val &= ~BERLIN2_SM_TSEN_STATUS_DATA_RDY;
265 regmap_write(priv->regmap, BERLIN2_SM_TSEN_STATUS, val);
266
267 priv->data_available = true;
268 wake_up_interruptible(&priv->wq);
269 }
270
271 return IRQ_HANDLED;
272}
273
274static const struct iio_info berlin2_adc_info = {
275 .driver_module = THIS_MODULE,
276 .read_raw = berlin2_adc_read_raw,
277};
278
279static int berlin2_adc_probe(struct platform_device *pdev)
280{
281 struct iio_dev *indio_dev;
282 struct berlin2_adc_priv *priv;
283 struct device_node *parent_np = of_get_parent(pdev->dev.of_node);
284 int irq, tsen_irq;
285 int ret;
286
Hartmut Knaack609e9d82015-07-28 00:39:01 +0200287 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
Antoine Tenart70f19372015-05-18 11:19:18 +0200288 if (!indio_dev)
289 return -ENOMEM;
290
291 priv = iio_priv(indio_dev);
292 platform_set_drvdata(pdev, indio_dev);
293
294 priv->regmap = syscon_node_to_regmap(parent_np);
295 of_node_put(parent_np);
296 if (IS_ERR(priv->regmap))
297 return PTR_ERR(priv->regmap);
298
299 irq = platform_get_irq_byname(pdev, "adc");
300 if (irq < 0)
Hartmut Knaack19d56642015-07-28 00:38:58 +0200301 return irq;
Antoine Tenart70f19372015-05-18 11:19:18 +0200302
303 tsen_irq = platform_get_irq_byname(pdev, "tsen");
304 if (tsen_irq < 0)
Hartmut Knaack19d56642015-07-28 00:38:58 +0200305 return tsen_irq;
Antoine Tenart70f19372015-05-18 11:19:18 +0200306
307 ret = devm_request_irq(&pdev->dev, irq, berlin2_adc_irq, 0,
308 pdev->dev.driver->name, indio_dev);
309 if (ret)
310 return ret;
311
312 ret = devm_request_irq(&pdev->dev, tsen_irq, berlin2_adc_tsen_irq,
313 0, pdev->dev.driver->name, indio_dev);
314 if (ret)
315 return ret;
316
317 init_waitqueue_head(&priv->wq);
318 mutex_init(&priv->lock);
319
320 indio_dev->dev.parent = &pdev->dev;
321 indio_dev->name = dev_name(&pdev->dev);
322 indio_dev->modes = INDIO_DIRECT_MODE;
323 indio_dev->info = &berlin2_adc_info;
324
Antoine Tenart70f19372015-05-18 11:19:18 +0200325 indio_dev->channels = berlin2_adc_channels;
Hartmut Knaack546384c2015-07-28 00:39:02 +0200326 indio_dev->num_channels = ARRAY_SIZE(berlin2_adc_channels);
Antoine Tenart70f19372015-05-18 11:19:18 +0200327
328 /* Power up the ADC */
329 regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
330 BERLIN2_SM_CTRL_ADC_POWER, BERLIN2_SM_CTRL_ADC_POWER);
331
332 ret = iio_device_register(indio_dev);
333 if (ret) {
334 /* Power down the ADC */
335 regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
336 BERLIN2_SM_CTRL_ADC_POWER, 0);
337 return ret;
338 }
339
340 return 0;
341}
342
343static int berlin2_adc_remove(struct platform_device *pdev)
344{
345 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
346 struct berlin2_adc_priv *priv = iio_priv(indio_dev);
347
348 iio_device_unregister(indio_dev);
349
350 /* Power down the ADC */
351 regmap_update_bits(priv->regmap, BERLIN2_SM_CTRL,
352 BERLIN2_SM_CTRL_ADC_POWER, 0);
353
354 return 0;
355}
356
357static const struct of_device_id berlin2_adc_match[] = {
358 { .compatible = "marvell,berlin2-adc", },
359 { },
360};
361MODULE_DEVICE_TABLE(of, berlin2_adc_match);
362
363static struct platform_driver berlin2_adc_driver = {
364 .driver = {
365 .name = "berlin2-adc",
366 .of_match_table = berlin2_adc_match,
367 },
368 .probe = berlin2_adc_probe,
369 .remove = berlin2_adc_remove,
370};
371module_platform_driver(berlin2_adc_driver);
372
373MODULE_AUTHOR("Antoine Tenart <antoine.tenart@free-electrons.com>");
374MODULE_DESCRIPTION("Marvell Berlin2 ADC driver");
375MODULE_LICENSE("GPL v2");