blob: 0422e580038ac14719741c7c53e5b243f919b374 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Public Include File for DRV6000 users
3 * (ie. NxtWave Communications - NXT6000 demodulator driver)
4 *
5 * Copyright (C) 2001 NxtWave Communications, Inc.
6 *
7 */
8
9/* Nxt6000 Register Addresses and Bit Masks */
10
11/* Maximum Register Number */
12#define MAXNXT6000REG (0x9A)
13
14/* 0x1B A_VIT_BER_0 aka 0x3A */
15#define A_VIT_BER_0 (0x1B)
16
17/* 0x1D A_VIT_BER_TIMER_0 aka 0x38 */
18#define A_VIT_BER_TIMER_0 (0x1D)
19
20/* 0x21 RS_COR_STAT */
21#define RS_COR_STAT (0x21)
22#define RSCORESTATUS (0x03)
23
24/* 0x22 RS_COR_INTEN */
25#define RS_COR_INTEN (0x22)
26
27/* 0x23 RS_COR_INSTAT */
28#define RS_COR_INSTAT (0x23)
29#define INSTAT_ERROR (0x04)
30#define LOCK_LOSS_BITS (0x03)
31
32/* 0x24 RS_COR_SYNC_PARAM */
33#define RS_COR_SYNC_PARAM (0x24)
34#define SYNC_PARAM (0x03)
35
36/* 0x25 BER_CTRL */
37#define BER_CTRL (0x25)
38#define BER_ENABLE (0x02)
39#define BER_RESET (0x01)
40
41/* 0x26 BER_PAY */
42#define BER_PAY (0x26)
43
44/* 0x27 BER_PKT_L */
45#define BER_PKT_L (0x27)
46#define BER_PKTOVERFLOW (0x80)
47
48/* 0x30 VIT_COR_CTL */
49#define VIT_COR_CTL (0x30)
50#define BER_CONTROL (0x02)
51#define VIT_COR_MASK (0x82)
52#define VIT_COR_RESYNC (0x80)
53
54
55/* 0x32 VIT_SYNC_STATUS */
56#define VIT_SYNC_STATUS (0x32)
57#define VITINSYNC (0x80)
58
59/* 0x33 VIT_COR_INTEN */
60#define VIT_COR_INTEN (0x33)
61#define GLOBAL_ENABLE (0x80)
62
63/* 0x34 VIT_COR_INTSTAT */
64#define VIT_COR_INTSTAT (0x34)
65#define BER_DONE (0x08)
66#define BER_OVERFLOW (0x10)
67
Johannes Stezenbach3a4a5712005-05-16 21:54:29 -070068/* 0x38 VIT_BERTIME_2 */
69#define VIT_BERTIME_2 (0x38)
70
71/* 0x39 VIT_BERTIME_1 */
72#define VIT_BERTIME_1 (0x39)
73
74/* 0x3A VIT_BERTIME_0 */
75#define VIT_BERTIME_0 (0x3a)
76
Linus Torvalds1da177e2005-04-16 15:20:36 -070077 /* 0x38 OFDM_BERTimer *//* Use the alias registers */
78#define A_VIT_BER_TIMER_0 (0x1D)
79
80 /* 0x3A VIT_BER_TIMER_0 *//* Use the alias registers */
81#define A_VIT_BER_0 (0x1B)
82
Johannes Stezenbach3a4a5712005-05-16 21:54:29 -070083/* 0x3B VIT_BER_1 */
84#define VIT_BER_1 (0x3b)
85
86/* 0x3C VIT_BER_0 */
87#define VIT_BER_0 (0x3c)
88
Linus Torvalds1da177e2005-04-16 15:20:36 -070089/* 0x40 OFDM_COR_CTL */
90#define OFDM_COR_CTL (0x40)
91#define COREACT (0x20)
92#define HOLDSM (0x10)
93#define WAIT_AGC (0x02)
94#define WAIT_SYR (0x03)
95
96/* 0x41 OFDM_COR_STAT */
97#define OFDM_COR_STAT (0x41)
98#define COR_STATUS (0x0F)
99#define MONITOR_TPS (0x06)
100#define TPSLOCKED (0x40)
101#define AGCLOCKED (0x10)
102
103/* 0x42 OFDM_COR_INTEN */
104#define OFDM_COR_INTEN (0x42)
105#define TPSRCVBAD (0x04)
106#define TPSRCVCHANGED (0x02)
107#define TPSRCVUPDATE (0x01)
108
109/* 0x43 OFDM_COR_INSTAT */
110#define OFDM_COR_INSTAT (0x43)
111
112/* 0x44 OFDM_COR_MODEGUARD */
113#define OFDM_COR_MODEGUARD (0x44)
114#define FORCEMODE (0x08)
115#define FORCEMODE8K (0x04)
116
117/* 0x45 OFDM_AGC_CTL */
118#define OFDM_AGC_CTL (0x45)
119#define INITIAL_AGC_BW (0x08)
120#define AGCNEG (0x02)
121#define AGCLAST (0x10)
122
123/* 0x48 OFDM_AGC_TARGET */
124#define OFDM_AGC_TARGET (0x48)
125#define OFDM_AGC_TARGET_DEFAULT (0x28)
126#define OFDM_AGC_TARGET_IMPULSE (0x38)
127
128/* 0x49 OFDM_AGC_GAIN_1 */
129#define OFDM_AGC_GAIN_1 (0x49)
130
131/* 0x4B OFDM_ITB_CTL */
132#define OFDM_ITB_CTL (0x4B)
133#define ITBINV (0x01)
134
Johannes Stezenbach3a4a5712005-05-16 21:54:29 -0700135/* 0x49 AGC_GAIN_1 */
136#define AGC_GAIN_1 (0x49)
137
138/* 0x4A AGC_GAIN_2 */
139#define AGC_GAIN_2 (0x4A)
140
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141/* 0x4C OFDM_ITB_FREQ_1 */
142#define OFDM_ITB_FREQ_1 (0x4C)
143
144/* 0x4D OFDM_ITB_FREQ_2 */
145#define OFDM_ITB_FREQ_2 (0x4D)
146
147/* 0x4E OFDM_CAS_CTL */
148#define OFDM_CAS_CTL (0x4E)
149#define ACSDIS (0x40)
150#define CCSEN (0x80)
151
152/* 0x4F CAS_FREQ */
153#define CAS_FREQ (0x4F)
154
155/* 0x51 OFDM_SYR_CTL */
156#define OFDM_SYR_CTL (0x51)
157#define SIXTH_ENABLE (0x80)
158#define SYR_TRACKING_DISABLE (0x01)
159
160/* 0x52 OFDM_SYR_STAT */
161#define OFDM_SYR_STAT (0x52)
162#define GI14_2K_SYR_LOCK (0x13)
163#define GI14_8K_SYR_LOCK (0x17)
164#define GI14_SYR_LOCK (0x10)
165
166/* 0x55 OFDM_SYR_OFFSET_1 */
167#define OFDM_SYR_OFFSET_1 (0x55)
168
169/* 0x56 OFDM_SYR_OFFSET_2 */
170#define OFDM_SYR_OFFSET_2 (0x56)
171
172/* 0x58 OFDM_SCR_CTL */
173#define OFDM_SCR_CTL (0x58)
174#define SYR_ADJ_DECAY_MASK (0x70)
175#define SYR_ADJ_DECAY (0x30)
176
177/* 0x59 OFDM_PPM_CTL_1 */
178#define OFDM_PPM_CTL_1 (0x59)
179#define PPMMAX_MASK (0x30)
180#define PPM256 (0x30)
181
182/* 0x5B OFDM_TRL_NOMINALRATE_1 */
183#define OFDM_TRL_NOMINALRATE_1 (0x5B)
184
185/* 0x5C OFDM_TRL_NOMINALRATE_2 */
186#define OFDM_TRL_NOMINALRATE_2 (0x5C)
187
188/* 0x5D OFDM_TRL_TIME_1 */
189#define OFDM_TRL_TIME_1 (0x5D)
190
191/* 0x60 OFDM_CRL_FREQ_1 */
192#define OFDM_CRL_FREQ_1 (0x60)
193
194/* 0x63 OFDM_CHC_CTL_1 */
195#define OFDM_CHC_CTL_1 (0x63)
196#define MANMEAN1 (0xF0);
197#define CHCFIR (0x01)
198
199/* 0x64 OFDM_CHC_SNR */
200#define OFDM_CHC_SNR (0x64)
201
202/* 0x65 OFDM_BDI_CTL */
203#define OFDM_BDI_CTL (0x65)
204#define LP_SELECT (0x02)
205
206/* 0x67 OFDM_TPS_RCVD_1 */
207#define OFDM_TPS_RCVD_1 (0x67)
208#define TPSFRAME (0x03)
209
210/* 0x68 OFDM_TPS_RCVD_2 */
211#define OFDM_TPS_RCVD_2 (0x68)
212
213/* 0x69 OFDM_TPS_RCVD_3 */
214#define OFDM_TPS_RCVD_3 (0x69)
215
216/* 0x6A OFDM_TPS_RCVD_4 */
217#define OFDM_TPS_RCVD_4 (0x6A)
218
219/* 0x6B OFDM_TPS_RESERVED_1 */
220#define OFDM_TPS_RESERVED_1 (0x6B)
221
222/* 0x6C OFDM_TPS_RESERVED_2 */
223#define OFDM_TPS_RESERVED_2 (0x6C)
224
225/* 0x73 OFDM_MSC_REV */
226#define OFDM_MSC_REV (0x73)
227
228/* 0x76 OFDM_SNR_CARRIER_2 */
229#define OFDM_SNR_CARRIER_2 (0x76)
230#define MEAN_MASK (0x80)
231#define MEANBIT (0x80)
232
233/* 0x80 ANALOG_CONTROL_0 */
234#define ANALOG_CONTROL_0 (0x80)
235#define POWER_DOWN_ADC (0x40)
236
237/* 0x81 ENABLE_TUNER_IIC */
238#define ENABLE_TUNER_IIC (0x81)
239#define ENABLE_TUNER_BIT (0x01)
240
241/* 0x82 EN_DMD_RACQ */
242#define EN_DMD_RACQ (0x82)
243#define EN_DMD_RACQ_REG_VAL (0x81)
244#define EN_DMD_RACQ_REG_VAL_14 (0x01)
245
246/* 0x84 SNR_COMMAND */
247#define SNR_COMMAND (0x84)
248#define SNRStat (0x80)
249
250/* 0x85 SNRCARRIERNUMBER_LSB */
251#define SNRCARRIERNUMBER_LSB (0x85)
252
253/* 0x87 SNRMINTHRESHOLD_LSB */
254#define SNRMINTHRESHOLD_LSB (0x87)
255
256/* 0x89 SNR_PER_CARRIER_LSB */
257#define SNR_PER_CARRIER_LSB (0x89)
258
259/* 0x8B SNRBELOWTHRESHOLD_LSB */
260#define SNRBELOWTHRESHOLD_LSB (0x8B)
261
262/* 0x91 RF_AGC_VAL_1 */
263#define RF_AGC_VAL_1 (0x91)
264
265/* 0x92 RF_AGC_STATUS */
266#define RF_AGC_STATUS (0x92)
267
268/* 0x98 DIAG_CONFIG */
269#define DIAG_CONFIG (0x98)
270#define DIAG_MASK (0x70)
271#define TB_SET (0x10)
272#define TRAN_SELECT (0x07)
273#define SERIAL_SELECT (0x01)
274
275/* 0x99 SUB_DIAG_MODE_SEL */
276#define SUB_DIAG_MODE_SEL (0x99)
277#define CLKINVERSION (0x01)
278
279/* 0x9A TS_FORMAT */
280#define TS_FORMAT (0x9A)
281#define ERROR_SENSE (0x08)
282#define VALID_SENSE (0x04)
283#define SYNC_SENSE (0x02)
284#define GATED_CLOCK (0x01)
285
286#define NXT6000ASICDEVICE (0x0b)