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Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08001/*
Jishnu Prakash3b3fe942018-01-08 12:23:39 +05302 * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08003 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13/*
14 * Qualcomm Technologies Inc. PMIC QPNP ADC driver header file
15 *
16 */
17
18#ifndef __QPNP_ADC_H
19#define __QPNP_ADC_H
20
21#include <linux/kernel.h>
22#include <linux/list.h>
23#include <linux/qpnp/qpnp-revid.h>
24#include <linux/regulator/consumer.h>
25/**
26 * enum qpnp_vadc_channels - QPNP AMUX arbiter channels
27 */
28enum qpnp_vadc_channels {
29 USBIN = 0,
30 DCIN,
31 VCHG_SNS,
32 SPARE1_03,
33 USB_ID_MV,
34 VCOIN,
35 VBAT_SNS,
36 VSYS,
37 DIE_TEMP,
38 REF_625MV,
39 REF_125V,
40 CHG_TEMP,
41 SPARE1,
42 SPARE2,
43 GND_REF,
44 VDD_VADC,
45 P_MUX1_1_1,
46 P_MUX2_1_1,
47 P_MUX3_1_1,
48 P_MUX4_1_1,
49 P_MUX5_1_1,
50 P_MUX6_1_1,
51 P_MUX7_1_1,
52 P_MUX8_1_1,
53 P_MUX9_1_1,
54 P_MUX10_1_1,
55 P_MUX11_1_1,
56 P_MUX12_1_1,
57 P_MUX13_1_1,
58 P_MUX14_1_1,
59 P_MUX15_1_1,
60 P_MUX16_1_1,
61 P_MUX1_1_3,
62 P_MUX2_1_3,
63 P_MUX3_1_3,
64 P_MUX4_1_3,
65 P_MUX5_1_3,
66 P_MUX6_1_3,
67 P_MUX7_1_3,
68 P_MUX8_1_3,
69 P_MUX9_1_3,
70 P_MUX10_1_3,
71 P_MUX11_1_3,
72 P_MUX12_1_3,
73 P_MUX13_1_3,
74 P_MUX14_1_3,
75 P_MUX15_1_3,
76 P_MUX16_1_3,
77 LR_MUX1_BATT_THERM,
78 LR_MUX2_BAT_ID,
79 LR_MUX3_XO_THERM,
80 LR_MUX4_AMUX_THM1,
81 LR_MUX5_AMUX_THM2,
82 LR_MUX6_AMUX_THM3,
83 LR_MUX7_HW_ID,
84 LR_MUX8_AMUX_THM4,
85 LR_MUX9_AMUX_THM5,
86 LR_MUX10_USB_ID_LV,
87 AMUX_PU1,
88 AMUX_PU2,
89 LR_MUX3_BUF_XO_THERM_BUF,
90 LR_MUX1_PU1_BAT_THERM = 112,
91 LR_MUX2_PU1_BAT_ID = 113,
92 LR_MUX3_PU1_XO_THERM = 114,
93 LR_MUX4_PU1_AMUX_THM1 = 115,
94 LR_MUX5_PU1_AMUX_THM2 = 116,
95 LR_MUX6_PU1_AMUX_THM3 = 117,
96 LR_MUX7_PU1_AMUX_HW_ID = 118,
97 LR_MUX8_PU1_AMUX_THM4 = 119,
98 LR_MUX9_PU1_AMUX_THM5 = 120,
99 LR_MUX10_PU1_AMUX_USB_ID_LV = 121,
100 LR_MUX3_BUF_PU1_XO_THERM_BUF = 124,
101 LR_MUX1_PU2_BAT_THERM = 176,
102 LR_MUX2_PU2_BAT_ID = 177,
103 LR_MUX3_PU2_XO_THERM = 178,
104 LR_MUX4_PU2_AMUX_THM1 = 179,
105 LR_MUX5_PU2_AMUX_THM2 = 180,
106 LR_MUX6_PU2_AMUX_THM3 = 181,
107 LR_MUX7_PU2_AMUX_HW_ID = 182,
108 LR_MUX8_PU2_AMUX_THM4 = 183,
109 LR_MUX9_PU2_AMUX_THM5 = 184,
110 LR_MUX10_PU2_AMUX_USB_ID_LV = 185,
111 LR_MUX3_BUF_PU2_XO_THERM_BUF = 188,
112 LR_MUX1_PU1_PU2_BAT_THERM = 240,
113 LR_MUX2_PU1_PU2_BAT_ID = 241,
114 LR_MUX3_PU1_PU2_XO_THERM = 242,
115 LR_MUX4_PU1_PU2_AMUX_THM1 = 243,
116 LR_MUX5_PU1_PU2_AMUX_THM2 = 244,
117 LR_MUX6_PU1_PU2_AMUX_THM3 = 245,
118 LR_MUX7_PU1_PU2_AMUX_HW_ID = 246,
119 LR_MUX8_PU1_PU2_AMUX_THM4 = 247,
120 LR_MUX9_PU1_PU2_AMUX_THM5 = 248,
121 LR_MUX10_PU1_PU2_AMUX_USB_ID_LV = 249,
122 LR_MUX3_BUF_PU1_PU2_XO_THERM_BUF = 252,
123 ALL_OFF = 255,
124 ADC_MAX_NUM = 0xffff,
125
126 /* Channel listing for refreshed VADC in hex format */
127 VADC_VREF_GND = 0,
128 VADC_CALIB_VREF_1P25 = 1,
129 VADC_CALIB_VREF = 2,
130 VADC_CALIB_VREF_1_DIV_3 = 0x82,
131 VADC_VPH_PWR = 0x83,
132 VADC_VBAT_SNS = 0x84,
133 VADC_VCOIN = 0x85,
134 VADC_DIE_TEMP = 6,
135 VADC_CHG_TEMP = 7,
Jishnu Prakashe1adf542018-01-24 14:51:51 +0530136 VADC_USB_IN_I_PM5 = 7,
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -0800137 VADC_USB_IN = 8,
Jishnu Prakashe1adf542018-01-24 14:51:51 +0530138 VADC_USB_IN_V_DIV_16_PM5 = 8,
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -0800139 VADC_IREG_FB = 9,
Jishnu Prakashe1adf542018-01-24 14:51:51 +0530140 VADC_CHG_TEMP_PM5 = 9,
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -0800141 /* External input connection */
142 VADC_BAT_THERM = 0xa,
143 VADC_BAT_ID = 0xb,
144 VADC_XO_THERM = 0xc,
145 VADC_AMUX_THM1 = 0xd,
146 VADC_AMUX_THM2 = 0xe,
147 VADC_AMUX_THM3 = 0xf,
148 VADC_AMUX_THM4 = 0x10,
149 VADC_AMUX_THM5 = 0x11,
150 VADC_AMUX1_GPIO = 0x12,
151 VADC_AMUX2_GPIO = 0x13,
152 VADC_AMUX3_GPIO = 0x14,
153 VADC_AMUX4_GPIO = 0x15,
154 VADC_AMUX5_GPIO = 0x16,
155 VADC_AMUX6_GPIO = 0x17,
156 VADC_AMUX7_GPIO = 0x18,
157 VADC_AMUX8_GPIO = 0x19,
158 VADC_ATEST1 = 0x1a,
159 VADC_ATEST2 = 0x1b,
160 VADC_ATEST3 = 0x1c,
161 VADC_ATEST4 = 0x1d,
Jishnu Prakashe1adf542018-01-24 14:51:51 +0530162 VADC_MID_CHG_DIV_6 = 0x1e,
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -0800163 VADC_OFF = 0xff,
164 /* PU1 is 30K pull up */
165 VADC_BAT_THERM_PU1 = 0x2a,
166 VADC_BAT_ID_PU1 = 0x2b,
167 VADC_XO_THERM_PU1 = 0x2c,
168 VADC_AMUX_THM1_PU1 = 0x2d,
169 VADC_AMUX_THM2_PU1 = 0x2e,
170 VADC_AMUX_THM3_PU1 = 0x2f,
171 VADC_AMUX_THM4_PU1 = 0x30,
172 VADC_AMUX_THM5_PU1 = 0x31,
173 VADC_AMUX1_GPIO_PU1 = 0x32,
174 VADC_AMUX2_GPIO_PU1 = 0x33,
175 VADC_AMUX3_GPIO_PU1 = 0x34,
176 VADC_AMUX4_GPIO_PU1 = 0x35,
177 VADC_AMUX5_GPIO_PU1 = 0x36,
178 VADC_AMUX6_GPIO_PU1 = 0x37,
179 VADC_AMUX7_GPIO_PU1 = 0x38,
180 VADC_AMUX8_GPIO_PU1 = 0x39,
181 /* PU2 is 100K pull up */
182 VADC_BAT_THERM_PU2 = 0x4a,
183 VADC_BAT_ID_PU2 = 0x4b,
184 VADC_XO_THERM_PU2 = 0x4c,
185 VADC_AMUX_THM1_PU2 = 0x4d,
186 VADC_AMUX_THM2_PU2 = 0x4e,
187 VADC_AMUX_THM3_PU2 = 0x4f,
188 VADC_AMUX_THM4_PU2 = 0x50,
189 VADC_AMUX_THM5_PU2 = 0x51,
190 VADC_AMUX1_GPIO_PU2 = 0x52,
191 VADC_AMUX2_GPIO_PU2 = 0x53,
192 VADC_AMUX3_GPIO_PU2 = 0x54,
193 VADC_AMUX4_GPIO_PU2 = 0x55,
194 VADC_AMUX5_GPIO_PU2 = 0x56,
195 VADC_AMUX6_GPIO_PU2 = 0x57,
196 VADC_AMUX7_GPIO_PU2 = 0x58,
197 VADC_AMUX8_GPIO_PU2 = 0x59,
198 /* PU3 is 400K pull up */
199 VADC_BAT_THERM_PU3 = 0x6a,
200 VADC_BAT_ID_PU3 = 0x6b,
201 VADC_XO_THERM_PU3 = 0x6c,
202 VADC_AMUX_THM1_PU3 = 0x6d,
203 VADC_AMUX_THM2_PU3 = 0x6e,
204 VADC_AMUX_THM3_PU3 = 0x6f,
205 VADC_AMUX_THM4_PU3 = 0x70,
206 VADC_AMUX_THM5_PU3 = 0x71,
207 VADC_AMUX1_GPIO_PU3 = 0x72,
208 VADC_AMUX2_GPIO_PU3 = 0x73,
209 VADC_AMUX3_GPIO_PU3 = 0x74,
210 VADC_AMUX4_GPIO_PU3 = 0x75,
211 VADC_AMUX5_GPIO_PU3 = 0x76,
212 VADC_AMUX6_GPIO_PU3 = 0x77,
213 VADC_AMUX7_GPIO_PU3 = 0x78,
214 VADC_AMUX8_GPIO_PU3 = 0x79,
215 /* External input connection with 1/3 div */
216 VADC_AMUX1_GPIO_DIV_3 = 0x92,
217 VADC_AMUX2_GPIO_DIV_3 = 0x93,
218 VADC_AMUX3_GPIO_DIV_3 = 0x94,
219 VADC_AMUX4_GPIO_DIV_3 = 0x95,
220 VADC_AMUX5_GPIO_DIV_3 = 0x96,
221 VADC_AMUX6_GPIO_DIV_3 = 0x97,
222 VADC_AMUX7_GPIO_DIV_3 = 0x98,
223 VADC_AMUX8_GPIO_DIV_3 = 0x99,
224 VADC_ATEST1_DIV_3 = 0x9a,
225 VADC_ATEST2_DIV_3 = 0x9b,
226 VADC_ATEST3_DIV_3 = 0x9c,
227 VADC_ATEST4_DIV_3 = 0x9d,
228 VADC_REFRESH_MAX_NUM = 0xffff,
Jishnu Prakashe1adf542018-01-24 14:51:51 +0530229 /*Current and synchronous channels*/
230 VADC_ISNS_INT_EXT_PM5 = 0xa1,
231 VADC_ISNS_PAR_PM5 = 0xa5,
232 VADC_V_I_INT_EXT_VDATA_PM5 = 0xb0,
233 VADC_V_I_INT_EXT_IDATA_PM5 = 0xb1,
234 VADC_V_I_PAR_VDATA_PM5 = 0xb4,
235 VADC_V_I_PAR_IDATA_PM5 = 0xb5,
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -0800236};
237
238/**
239 * enum qpnp_iadc_channels - QPNP IADC channel list
240 */
241enum qpnp_iadc_channels {
242 INTERNAL_RSENSE = 0,
243 EXTERNAL_RSENSE,
244 ALT_LEAD_PAIR,
245 GAIN_CALIBRATION_17P857MV,
246 OFFSET_CALIBRATION_SHORT_CADC_LEADS,
247 OFFSET_CALIBRATION_CSP_CSN,
248 OFFSET_CALIBRATION_CSP2_CSN2,
249 IADC_MUX_NUM,
250};
251
252#define QPNP_ADC_625_UV 625000
253#define QPNP_ADC_HWMON_NAME_LENGTH 64
254#define QPNP_MAX_PROP_NAME_LEN 32
255#define QPNP_THERMALNODE_NAME_LENGTH 25
256#define QPNP_ADC_1P25_UV 1250000
257
258/* Structure device for qpnp vadc */
259struct qpnp_vadc_chip;
260
261/* Structure device for qpnp iadc */
262struct qpnp_iadc_chip;
263
264/* Structure device for qpnp adc tm */
265struct qpnp_adc_tm_chip;
266
267/**
268 * enum qpnp_adc_clk_type - Clock rate supported.
269 * %CLK_TYPE1: 2P4MHZ
270 * %CLK_TYPE2: 4P8MHZ
271 * %CLK_TYPE3: 9P6MHZ
272 * %CLK_TYPE4: 19P2MHZ
273 * %CLK_NONE: Do not use this Clk type.
274 *
275 * The Clock rate is specific to each channel of the QPNP ADC arbiter.
276 */
277enum qpnp_adc_clk_type {
278 CLK_TYPE1 = 0,
279 CLK_TYPE2,
280 CLK_TYPE3,
281 CLK_TYPE4,
282 CLK_NONE,
283};
284
285/**
286 * enum qpnp_adc_decimation_type - Sampling rate supported.
287 * %DECIMATION_TYPE1: 512
288 * %DECIMATION_TYPE2: 1K
289 * %DECIMATION_TYPE3: 2K
290 * %DECIMATION_TYPE4: 4k
291 * %DECIMATION_NONE: Do not use this Sampling type.
292 *
293 * The Sampling rate is specific to each channel of the QPNP ADC arbiter.
294 */
295enum qpnp_adc_decimation_type {
296 DECIMATION_TYPE1 = 0,
297 DECIMATION_TYPE2,
298 DECIMATION_TYPE3,
299 DECIMATION_TYPE4,
300 DECIMATION_NONE = 0xff,
301
302 ADC_HC_DEC_RATIO_256 = 0,
303 ADC_HC_DEC_RATIO_512 = 1,
304 ADC_HC_DEC_RATIO_1024 = 2,
305 ADC_HC_DEC_RATIO_NONE = 0xff,
306};
307
308/**
309 * enum qpnp_adc_calib_type - QPNP ADC Calibration type.
310 * %ADC_CALIB_ABSOLUTE: Use 625mV and 1.25V reference channels.
311 * %ADC_CALIB_RATIOMETRIC: Use reference Voltage/GND.
312 * %ADC_CALIB_CONFIG_NONE: Do not use this calibration type.
313 *
314 * enum qpnp_adc_cal_sel - Selects the calibration type that is applied
315 * on the corresponding channel measurement after
316 * the ADC data is read.
317 * %ADC_HC_NO_CAL : To obtain raw, uncalibrated data on qpnp-vadc-hc type.
318 * %ADC_HC_RATIO_CAL : Applies ratiometric calibration. Note the calibration
319 * values stored in the CAL peripheral for VADC_VREF and
320 * VREF_1P25 already have GND_REF value removed. Used
321 * only with qpnp-vadc-hc type of VADC.
322 * %ADC_HC_ABS_CAL : Applies absolute calibration. Note the calibration
323 * values stored in the CAL peripheral for VADC_VREF and
324 * VREF_1P25 already have GND_REF value removed. Used
325 * only with qpnp-vadc-hc type of VADC.
326 *
327 * Use the input reference voltage depending on the calibration type
328 * to calcluate the offset and gain parameters. The calibration is
329 * specific to each channel of the QPNP ADC.
330 */
331enum qpnp_adc_calib_type {
332 CALIB_ABSOLUTE = 0,
333 CALIB_RATIOMETRIC,
334 CALIB_NONE,
335
336 ADC_HC_NO_CAL = 0,
337 ADC_HC_RATIO_CAL = 1,
338 ADC_HC_ABS_CAL = 2,
339 ADC_HC_CAL_SEL_NONE,
340};
341
342/**
343 * enum qpnp_adc_channel_scaling_param - pre-scaling AMUX ratio.
344 * %CHAN_PATH_SCALING0: ratio of {1, 1}
345 * %CHAN_PATH_SCALING1: ratio of {1, 3}
346 * %CHAN_PATH_SCALING2: ratio of {1, 4}
347 * %CHAN_PATH_SCALING3: ratio of {1, 6}
348 * %CHAN_PATH_SCALING4: ratio of {1, 20}
349 * %CHAN_PATH_SCALING5: ratio of {1, 8}
350 * %CHAN_PATH_SCALING6: ratio of {10, 81} The actual ratio is (1/8.1).
351 * %CHAN_PATH_SCALING7: ratio of {1, 10}
Jishnu Prakash3b3fe942018-01-08 12:23:39 +0530352 * %CHAN_PATH_SCALING8: ratio of {1, 16}
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -0800353 * %CHAN_PATH_NONE: Do not use this pre-scaling ratio type.
354 *
355 * The pre-scaling is applied for signals to be within the voltage range
356 * of the ADC.
357 */
358enum qpnp_adc_channel_scaling_param {
359 PATH_SCALING0 = 0,
360 PATH_SCALING1,
361 PATH_SCALING2,
362 PATH_SCALING3,
363 PATH_SCALING4,
364 PATH_SCALING5,
365 PATH_SCALING6,
366 PATH_SCALING7,
Jishnu Prakash3b3fe942018-01-08 12:23:39 +0530367 PATH_SCALING8,
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -0800368 PATH_SCALING_NONE,
369};
370
371/**
372 * enum qpnp_adc_scale_fn_type - Scaling function for pm8941 pre calibrated
373 * digital data relative to ADC reference.
374 * %SCALE_DEFAULT: Default scaling to convert raw adc code to voltage (uV).
375 * %SCALE_BATT_THERM: Conversion to temperature(decidegC) based on btm
376 * parameters.
377 * %SCALE_THERM_100K_PULLUP: Returns temperature in degC.
378 * Uses a mapping table with 100K pullup.
379 * %SCALE_PMIC_THERM: Returns result in milli degree's Centigrade.
380 * %SCALE_XOTHERM: Returns XO thermistor voltage in degree's Centigrade.
381 * %SCALE_THERM_150K_PULLUP: Returns temperature in degC.
382 * Uses a mapping table with 150K pullup.
383 * %SCALE_QRD_BATT_THERM: Conversion to temperature(decidegC) based on
384 * btm parameters.
385 * %SCALE_QRD_SKUAA_BATT_THERM: Conversion to temperature(decidegC) based on
386 * btm parameters for SKUAA.
387 * %SCALE_SMB_BATT_THERM: Conversion to temperature(decidegC) based on
388 * btm parameters for SMB.
389 * %SCALE_QRD_SKUG_BATT_THERM: Conversion to temperature(decidegC) based on
390 * btm parameters for SKUG.
391 * %SCALE_QRD_SKUH_BATT_THERM: Conversion to temperature(decidegC) based on
392 * btm parameters for SKUH
393 * %SCALE_QRD_SKUT1_BATT_THERM: Conversion to temperature(decidegC) based on
394 * btm parameters for SKUT1
395 * %SCALE_PMI_CHG_TEMP: Conversion for PMI CHG temp
Jishnu Prakash3b3fe942018-01-08 12:23:39 +0530396 * %SCALE_BATT_THERM_TEMP: Conversion to temperature(decidegC) based on btm
397 * parameters.
398 * %SCALE_CHRG_TEMP: Conversion for charger temp.
399 * %SCALE_DIE_TEMP: Conversion for die temp.
400 * %SCALE_I_DEFAULT: Default scaling to convert raw adc code to current (uA).
401 * %SCALE_USBIN_I: Conversion for USB input current.
Jishnu Prakash20343d42018-02-12 14:53:33 +0530402 * %SCALE_BATT_THERM_TEMP_QRD: Conversion to temperature(decidegC) based on btm
403 * parameters for QRD.
Jishnu Prakash62aff112017-09-15 15:06:59 +0530404 * %SCALE_SMB1390_DIE_TEMP: Conversion for SMB1390 die temp
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -0800405 * %SCALE_NONE: Do not use this scaling type.
406 */
407enum qpnp_adc_scale_fn_type {
408 SCALE_DEFAULT = 0,
409 SCALE_BATT_THERM,
410 SCALE_THERM_100K_PULLUP,
411 SCALE_PMIC_THERM,
412 SCALE_XOTHERM,
413 SCALE_THERM_150K_PULLUP,
414 SCALE_QRD_BATT_THERM,
415 SCALE_QRD_SKUAA_BATT_THERM,
416 SCALE_SMB_BATT_THERM,
417 SCALE_QRD_SKUG_BATT_THERM,
418 SCALE_QRD_SKUH_BATT_THERM,
419 SCALE_NCP_03WF683_THERM,
420 SCALE_QRD_SKUT1_BATT_THERM,
421 SCALE_PMI_CHG_TEMP = 16,
Jishnu Prakash3b3fe942018-01-08 12:23:39 +0530422 SCALE_BATT_THERM_TEMP,
423 SCALE_CHRG_TEMP,
424 SCALE_DIE_TEMP,
425 SCALE_I_DEFAULT,
426 SCALE_USBIN_I,
Jishnu Prakash20343d42018-02-12 14:53:33 +0530427 SCALE_BATT_THERM_TEMP_QRD,
Jishnu Prakash62aff112017-09-15 15:06:59 +0530428 SCALE_SMB1390_DIE_TEMP,
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -0800429 SCALE_NONE,
430};
431
432/**
433 * enum qpnp_adc_tm_rscale_fn_type - Scaling function used to convert the
434 * channels input voltage/temperature to corresponding ADC code that is
435 * applied for thresholds. Check the corresponding channels scaling to
436 * determine the appropriate temperature/voltage units that are passed
437 * to the scaling function. Example battery follows the power supply
438 * framework that needs its units to be in decidegreesC so it passes
439 * deci-degreesC. PA_THERM clients pass the temperature in degrees.
440 * The order below should match the one in the driver for
441 * adc_tm_rscale_fn[].
442 */
443enum qpnp_adc_tm_rscale_fn_type {
444 SCALE_R_VBATT = 0,
445 SCALE_RBATT_THERM,
446 SCALE_R_USB_ID,
447 SCALE_RPMIC_THERM,
448 SCALE_R_SMB_BATT_THERM,
449 SCALE_R_ABSOLUTE,
450 SCALE_QRD_SKUH_RBATT_THERM,
451 SCALE_QRD_SKUT1_RBATT_THERM,
452 SCALE_RSCALE_NONE,
453};
454
455/**
456 * enum qpnp_vadc_rscale_fn_type - Scaling function used to convert the
457 * channels input voltage/temperature to corresponding ADC code that is
458 * applied for thresholds. Check the corresponding channels scaling to
459 * determine the appropriate temperature/voltage units that are passed
460 * to the scaling function. The order below should match the one in the
461 * driver for qpnp_adc_scale_fn[].
462 */
463enum qpnp_vadc_rscale_fn_type {
464 SCALE_RVADC_ABSOLUTE = 0,
465 SCALE_RVADC_SCALE_NONE,
466};
467
468/**
469 * enum qpnp_adc_fast_avg_ctl - Provides ability to obtain single result
470 * from the ADC that is an average of multiple measurement
471 * samples. Select number of samples for use in fast
472 * average mode (i.e. 2 ^ value).
473 * %ADC_FAST_AVG_SAMPLE_1: 0x0 = 1
474 * %ADC_FAST_AVG_SAMPLE_2: 0x1 = 2
475 * %ADC_FAST_AVG_SAMPLE_4: 0x2 = 4
476 * %ADC_FAST_AVG_SAMPLE_8: 0x3 = 8
477 * %ADC_FAST_AVG_SAMPLE_16: 0x4 = 16
478 * %ADC_FAST_AVG_SAMPLE_32: 0x5 = 32
479 * %ADC_FAST_AVG_SAMPLE_64: 0x6 = 64
480 * %ADC_FAST_AVG_SAMPLE_128: 0x7 = 128
481 * %ADC_FAST_AVG_SAMPLE_256: 0x8 = 256
482 * %ADC_FAST_AVG_SAMPLE_512: 0x9 = 512
483 */
484enum qpnp_adc_fast_avg_ctl {
485 ADC_FAST_AVG_SAMPLE_1 = 0,
486 ADC_FAST_AVG_SAMPLE_2,
487 ADC_FAST_AVG_SAMPLE_4,
488 ADC_FAST_AVG_SAMPLE_8,
489 ADC_FAST_AVG_SAMPLE_16,
490 ADC_FAST_AVG_SAMPLE_32,
491 ADC_FAST_AVG_SAMPLE_64,
492 ADC_FAST_AVG_SAMPLE_128,
493 ADC_FAST_AVG_SAMPLE_256,
494 ADC_FAST_AVG_SAMPLE_512,
495 ADC_FAST_AVG_SAMPLE_NONE,
496};
497
498/**
499 * enum qpnp_adc_hw_settle_time - Time between AMUX getting configured and
500 * the ADC starting conversion. Delay = 100us * value for
501 * value < 11 and 2ms * (value - 10) otherwise.
502 * %ADC_CHANNEL_HW_SETTLE_DELAY_0US: 0us
503 * %ADC_CHANNEL_HW_SETTLE_DELAY_100US: 100us
504 * %ADC_CHANNEL_HW_SETTLE_DELAY_200US: 200us
505 * %ADC_CHANNEL_HW_SETTLE_DELAY_300US: 300us
506 * %ADC_CHANNEL_HW_SETTLE_DELAY_400US: 400us
507 * %ADC_CHANNEL_HW_SETTLE_DELAY_500US: 500us
508 * %ADC_CHANNEL_HW_SETTLE_DELAY_600US: 600us
509 * %ADC_CHANNEL_HW_SETTLE_DELAY_700US: 700us
510 * %ADC_CHANNEL_HW_SETTLE_DELAY_800US: 800us
511 * %ADC_CHANNEL_HW_SETTLE_DELAY_900US: 900us
512 * %ADC_CHANNEL_HW_SETTLE_DELAY_1MS: 1ms
513 * %ADC_CHANNEL_HW_SETTLE_DELAY_2MS: 2ms
514 * %ADC_CHANNEL_HW_SETTLE_DELAY_4MS: 4ms
515 * %ADC_CHANNEL_HW_SETTLE_DELAY_6MS: 6ms
516 * %ADC_CHANNEL_HW_SETTLE_DELAY_8MS: 8ms
517 * %ADC_CHANNEL_HW_SETTLE_DELAY_10MS: 10ms
518 * %ADC_CHANNEL_HW_SETTLE_NONE
519 */
520enum qpnp_adc_hw_settle_time {
521 ADC_CHANNEL_HW_SETTLE_DELAY_0US = 0,
522 ADC_CHANNEL_HW_SETTLE_DELAY_100US,
523 ADC_CHANNEL_HW_SETTLE_DELAY_2000US,
524 ADC_CHANNEL_HW_SETTLE_DELAY_300US,
525 ADC_CHANNEL_HW_SETTLE_DELAY_400US,
526 ADC_CHANNEL_HW_SETTLE_DELAY_500US,
527 ADC_CHANNEL_HW_SETTLE_DELAY_600US,
528 ADC_CHANNEL_HW_SETTLE_DELAY_700US,
529 ADC_CHANNEL_HW_SETTLE_DELAY_800US,
530 ADC_CHANNEL_HW_SETTLE_DELAY_900US,
531 ADC_CHANNEL_HW_SETTLE_DELAY_1MS,
532 ADC_CHANNEL_HW_SETTLE_DELAY_2MS,
533 ADC_CHANNEL_HW_SETTLE_DELAY_4MS,
534 ADC_CHANNEL_HW_SETTLE_DELAY_6MS,
535 ADC_CHANNEL_HW_SETTLE_DELAY_8MS,
536 ADC_CHANNEL_HW_SETTLE_DELAY_10MS,
537 ADC_CHANNEL_HW_SETTLE_NONE,
538};
539
540/**
541 * enum qpnp_adc_dec_ratio_sel - Selects the decimation ratio of the ADC.
542 * Support values are 256, 512 and 1024.
543 */
544enum qpnp_vadc_dec_ratio_sel {
545 ADC_DEC_RATIO_256 = 0,
546 ADC_DEC_RATIO_512,
547 ADC_DEC_RATIO_1024,
548 ADC_DEC_RATIO_NONE,
549};
550
551/**
552 * enum qpnp_adc_cal_sel - Selects the calibration type that is applied
553 * on the corresponding channel measurement after
554 * the ADC data is read.
555 * %ADC_NO_CAL : To obtain raw, uncalibrated data.
556 * %ADC_RATIO_CAL : Applies ratiometric calibration. Note the calibration
557 * values stored in the CAL peripheral for VADC_VREF and
558 * VREF_1P25 already have GND_REF value removed.
559 * %ADC_ABS_CAL : Applies absolute calibration. Note the calibration
560 * values stored in the CAL peripheral for VADC_VREF and
561 * VREF_1P25 already have GND_REF value removed.
562 */
563
564/**
565 * enum qpnp_adc_cal_val - Selects if the calibration values applied
566 * are the ones when collected on a timer interval
567 * or if an immediate calibration needs to be forced.
568 * %ADC_TIMER_CAL : Uses calibration value collected on the timer interval.
569 * %ADC_NEW_CAL : Forces an immediate calibration. Use only when necessary
570 * since it forces 3 calibration measurements in addition to
571 * the channel measurement. For most measurement, using
572 * calibration based on the timer interval is sufficient.
573 */
574enum qpnp_adc_cal_val {
575 ADC_TIMER_CAL = 0,
576 ADC_NEW_CAL,
577 ADC_CAL_VAL_NONE,
578};
579
580/**
581 * enum qpnp_vadc_mode_sel - Selects the basic mode of operation.
582 * - The normal mode is used for single measurement.
583 * - The Conversion sequencer is used to trigger an
584 * ADC read when a HW trigger is selected.
585 * - The measurement interval performs a single or
586 * continuous measurement at a specified interval/delay.
587 * %ADC_OP_NORMAL_MODE : Normal mode used for single measurement.
588 * %ADC_OP_CONVERSION_SEQUENCER : Conversion sequencer used to trigger
589 * an ADC read on a HW supported trigger.
590 * Refer to enum qpnp_vadc_trigger for
591 * supported HW triggers.
592 * %ADC_OP_MEASUREMENT_INTERVAL : The measurement interval performs a
593 * single or continuous measurement after a specified delay.
594 * For delay look at qpnp_adc_meas_timer.
595 */
596enum qpnp_vadc_mode_sel {
597 ADC_OP_NORMAL_MODE = 0,
598 ADC_OP_CONVERSION_SEQUENCER,
599 ADC_OP_MEASUREMENT_INTERVAL,
600 ADC_OP_MODE_NONE,
601};
602
603/**
604 * enum qpnp_vadc_trigger - Select the HW trigger to be used while
605 * measuring the ADC reading.
606 * %ADC_GSM_PA_ON : GSM power amplifier on.
607 * %ADC_TX_GTR_THRES : Transmit power greater than threshold.
608 * %ADC_CAMERA_FLASH_RAMP : Flash ramp up done.
609 * %ADC_DTEST : DTEST.
610 */
611enum qpnp_vadc_trigger {
612 ADC_GSM_PA_ON = 0,
613 ADC_TX_GTR_THRES,
614 ADC_CAMERA_FLASH_RAMP,
615 ADC_DTEST,
616 ADC_SEQ_NONE,
617};
618
619/**
620 * enum qpnp_vadc_conv_seq_timeout - Select delay (0 to 15ms) from
621 * conversion request to triggering conversion sequencer
622 * hold off time.
623 */
624enum qpnp_vadc_conv_seq_timeout {
625 ADC_CONV_SEQ_TIMEOUT_0MS = 0,
626 ADC_CONV_SEQ_TIMEOUT_1MS,
627 ADC_CONV_SEQ_TIMEOUT_2MS,
628 ADC_CONV_SEQ_TIMEOUT_3MS,
629 ADC_CONV_SEQ_TIMEOUT_4MS,
630 ADC_CONV_SEQ_TIMEOUT_5MS,
631 ADC_CONV_SEQ_TIMEOUT_6MS,
632 ADC_CONV_SEQ_TIMEOUT_7MS,
633 ADC_CONV_SEQ_TIMEOUT_8MS,
634 ADC_CONV_SEQ_TIMEOUT_9MS,
635 ADC_CONV_SEQ_TIMEOUT_10MS,
636 ADC_CONV_SEQ_TIMEOUT_11MS,
637 ADC_CONV_SEQ_TIMEOUT_12MS,
638 ADC_CONV_SEQ_TIMEOUT_13MS,
639 ADC_CONV_SEQ_TIMEOUT_14MS,
640 ADC_CONV_SEQ_TIMEOUT_15MS,
641 ADC_CONV_SEQ_TIMEOUT_NONE,
642};
643
644/**
645 * enum qpnp_adc_conv_seq_holdoff - Select delay from conversion
646 * trigger signal (i.e. adc_conv_seq_trig) transition
647 * to ADC enable. Delay = 25us * (value + 1).
648 */
649enum qpnp_adc_conv_seq_holdoff {
650 ADC_SEQ_HOLD_25US = 0,
651 ADC_SEQ_HOLD_50US,
652 ADC_SEQ_HOLD_75US,
653 ADC_SEQ_HOLD_100US,
654 ADC_SEQ_HOLD_125US,
655 ADC_SEQ_HOLD_150US,
656 ADC_SEQ_HOLD_175US,
657 ADC_SEQ_HOLD_200US,
658 ADC_SEQ_HOLD_225US,
659 ADC_SEQ_HOLD_250US,
660 ADC_SEQ_HOLD_275US,
661 ADC_SEQ_HOLD_300US,
662 ADC_SEQ_HOLD_325US,
663 ADC_SEQ_HOLD_350US,
664 ADC_SEQ_HOLD_375US,
665 ADC_SEQ_HOLD_400US,
666 ADC_SEQ_HOLD_NONE,
667};
668
669/**
670 * enum qpnp_adc_conv_seq_state - Conversion sequencer operating state
671 * %ADC_CONV_SEQ_IDLE : Sequencer is in idle.
672 * %ADC_CONV_TRIG_RISE : Waiting for rising edge trigger.
673 * %ADC_CONV_TRIG_HOLDOFF : Waiting for rising trigger hold off time.
674 * %ADC_CONV_MEAS_RISE : Measuring selected ADC signal.
675 * %ADC_CONV_TRIG_FALL : Waiting for falling trigger edge.
676 * %ADC_CONV_FALL_HOLDOFF : Waiting for falling trigger hold off time.
677 * %ADC_CONV_MEAS_FALL : Measuring selected ADC signal.
678 * %ADC_CONV_ERROR : Aberrant Hardware problem.
679 */
680enum qpnp_adc_conv_seq_state {
681 ADC_CONV_SEQ_IDLE = 0,
682 ADC_CONV_TRIG_RISE,
683 ADC_CONV_TRIG_HOLDOFF,
684 ADC_CONV_MEAS_RISE,
685 ADC_CONV_TRIG_FALL,
686 ADC_CONV_FALL_HOLDOFF,
687 ADC_CONV_MEAS_FALL,
688 ADC_CONV_ERROR,
689 ADC_CONV_NONE,
690};
691
692/**
693 * enum qpnp_adc_meas_timer_1 - Selects the measurement interval time.
694 * If value = 0, use 0ms else use 2^(value + 4)/ 32768).
695 * The timer period is used by the USB_ID. Do not set a polling rate
696 * greater than 1 second on PMIC 2.0. The max polling rate on the PMIC 2.0
697 * appears to be limited to 1 second.
698 * %ADC_MEAS_INTERVAL_0MS : 0ms
699 * %ADC_MEAS_INTERVAL_1P0MS : 1ms
700 * %ADC_MEAS_INTERVAL_2P0MS : 2ms
701 * %ADC_MEAS_INTERVAL_3P9MS : 3.9ms
702 * %ADC_MEAS_INTERVAL_7P8MS : 7.8ms
703 * %ADC_MEAS_INTERVAL_15P6MS : 15.6ms
704 * %ADC_MEAS_INTERVAL_31P3MS : 31.3ms
705 * %ADC_MEAS_INTERVAL_62P5MS : 62.5ms
706 * %ADC_MEAS_INTERVAL_125MS : 125ms
707 * %ADC_MEAS_INTERVAL_250MS : 250ms
708 * %ADC_MEAS_INTERVAL_500MS : 500ms
709 * %ADC_MEAS_INTERVAL_1S : 1seconds
710 * %ADC_MEAS_INTERVAL_2S : 2seconds
711 * %ADC_MEAS_INTERVAL_4S : 4seconds
712 * %ADC_MEAS_INTERVAL_8S : 8seconds
713 * %ADC_MEAS_INTERVAL_16S: 16seconds
714 */
715enum qpnp_adc_meas_timer_1 {
716 ADC_MEAS1_INTERVAL_0MS = 0,
717 ADC_MEAS1_INTERVAL_1P0MS,
718 ADC_MEAS1_INTERVAL_2P0MS,
719 ADC_MEAS1_INTERVAL_3P9MS,
720 ADC_MEAS1_INTERVAL_7P8MS,
721 ADC_MEAS1_INTERVAL_15P6MS,
722 ADC_MEAS1_INTERVAL_31P3MS,
723 ADC_MEAS1_INTERVAL_62P5MS,
724 ADC_MEAS1_INTERVAL_125MS,
725 ADC_MEAS1_INTERVAL_250MS,
726 ADC_MEAS1_INTERVAL_500MS,
727 ADC_MEAS1_INTERVAL_1S,
728 ADC_MEAS1_INTERVAL_2S,
729 ADC_MEAS1_INTERVAL_4S,
730 ADC_MEAS1_INTERVAL_8S,
731 ADC_MEAS1_INTERVAL_16S,
732 ADC_MEAS1_INTERVAL_NONE,
733};
734
735/**
736 * enum qpnp_adc_meas_timer_2 - Selects the measurement interval time.
737 * If value = 0, use 0ms else use 2^(value + 4)/ 32768).
738 * The timer period is used by the batt_therm. Do not set a polling rate
739 * greater than 1 second on PMIC 2.0. The max polling rate on the PMIC 2.0
740 * appears to be limited to 1 second.
741 * %ADC_MEAS_INTERVAL_0MS : 0ms
742 * %ADC_MEAS_INTERVAL_100MS : 100ms
743 * %ADC_MEAS_INTERVAL_200MS : 200ms
744 * %ADC_MEAS_INTERVAL_300MS : 300ms
745 * %ADC_MEAS_INTERVAL_400MS : 400ms
746 * %ADC_MEAS_INTERVAL_500MS : 500ms
747 * %ADC_MEAS_INTERVAL_600MS : 600ms
748 * %ADC_MEAS_INTERVAL_700MS : 700ms
749 * %ADC_MEAS_INTERVAL_800MS : 800ms
750 * %ADC_MEAS_INTERVAL_900MS : 900ms
751 * %ADC_MEAS_INTERVAL_1S: 1seconds
752 * %ADC_MEAS_INTERVAL_1P1S: 1.1seconds
753 * %ADC_MEAS_INTERVAL_1P2S: 1.2seconds
754 * %ADC_MEAS_INTERVAL_1P3S: 1.3seconds
755 * %ADC_MEAS_INTERVAL_1P4S: 1.4seconds
756 * %ADC_MEAS_INTERVAL_1P5S: 1.5seconds
757 */
758enum qpnp_adc_meas_timer_2 {
759 ADC_MEAS2_INTERVAL_0MS = 0,
760 ADC_MEAS2_INTERVAL_100MS,
761 ADC_MEAS2_INTERVAL_200MS,
762 ADC_MEAS2_INTERVAL_300MS,
763 ADC_MEAS2_INTERVAL_400MS,
764 ADC_MEAS2_INTERVAL_500MS,
765 ADC_MEAS2_INTERVAL_600MS,
766 ADC_MEAS2_INTERVAL_700MS,
767 ADC_MEAS2_INTERVAL_800MS,
768 ADC_MEAS2_INTERVAL_900MS,
769 ADC_MEAS2_INTERVAL_1S,
770 ADC_MEAS2_INTERVAL_1P1S,
771 ADC_MEAS2_INTERVAL_1P2S,
772 ADC_MEAS2_INTERVAL_1P3S,
773 ADC_MEAS2_INTERVAL_1P4S,
774 ADC_MEAS2_INTERVAL_1P5S,
775 ADC_MEAS2_INTERVAL_NONE,
776};
777
778/**
779 * enum qpnp_adc_meas_timer_3 - Selects the measurement interval time.
780 * If value = 0, use 0ms else use 2^(value + 4)/ 32768).
781 * Do not set a polling rate greater than 1 second on PMIC 2.0.
782 * The max polling rate on the PMIC 2.0 appears to be limited to 1 second.
783 * %ADC_MEAS_INTERVAL_0MS : 0ms
784 * %ADC_MEAS_INTERVAL_1S : 1seconds
785 * %ADC_MEAS_INTERVAL_2S : 2seconds
786 * %ADC_MEAS_INTERVAL_3S : 3seconds
787 * %ADC_MEAS_INTERVAL_4S : 4seconds
788 * %ADC_MEAS_INTERVAL_5S : 5seconds
789 * %ADC_MEAS_INTERVAL_6S: 6seconds
790 * %ADC_MEAS_INTERVAL_7S : 7seconds
791 * %ADC_MEAS_INTERVAL_8S : 8seconds
792 * %ADC_MEAS_INTERVAL_9S : 9seconds
793 * %ADC_MEAS_INTERVAL_10S : 10seconds
794 * %ADC_MEAS_INTERVAL_11S : 11seconds
795 * %ADC_MEAS_INTERVAL_12S : 12seconds
796 * %ADC_MEAS_INTERVAL_13S : 13seconds
797 * %ADC_MEAS_INTERVAL_14S : 14seconds
798 * %ADC_MEAS_INTERVAL_15S : 15seconds
799 */
800enum qpnp_adc_meas_timer_3 {
801 ADC_MEAS3_INTERVAL_0S = 0,
802 ADC_MEAS3_INTERVAL_1S,
803 ADC_MEAS3_INTERVAL_2S,
804 ADC_MEAS3_INTERVAL_3S,
805 ADC_MEAS3_INTERVAL_4S,
806 ADC_MEAS3_INTERVAL_5S,
807 ADC_MEAS3_INTERVAL_6S,
808 ADC_MEAS3_INTERVAL_7S,
809 ADC_MEAS3_INTERVAL_8S,
810 ADC_MEAS3_INTERVAL_9S,
811 ADC_MEAS3_INTERVAL_10S,
812 ADC_MEAS3_INTERVAL_11S,
813 ADC_MEAS3_INTERVAL_12S,
814 ADC_MEAS3_INTERVAL_13S,
815 ADC_MEAS3_INTERVAL_14S,
816 ADC_MEAS3_INTERVAL_15S,
817 ADC_MEAS3_INTERVAL_NONE,
818};
819
820/**
821 * enum qpnp_adc_meas_timer_select - Selects the timer for which
822 * the appropriate polling frequency is set.
823 * %ADC_MEAS_TIMER_SELECT1 - Select this timer for measurement polling interval
824 * for 1 second.
825 * %ADC_MEAS_TIMER_SELECT2 - Select this timer for 500ms measurement interval.
826 * %ADC_MEAS_TIMER_SELECT3 - Select this timer for 5 second interval.
827 */
828enum qpnp_adc_meas_timer_select {
829 ADC_MEAS_TIMER_SELECT1 = 0,
830 ADC_MEAS_TIMER_SELECT2,
831 ADC_MEAS_TIMER_SELECT3,
832 ADC_MEAS_TIMER_NUM,
833};
834
835/**
836 * enum qpnp_adc_meas_interval_op_ctl - Select operating mode.
837 * %ADC_MEAS_INTERVAL_OP_SINGLE : Conduct single measurement at specified time
838 * delay.
839 * %ADC_MEAS_INTERVAL_OP_CONTINUOUS : Make measurements at measurement interval
840 * times.
841 */
842enum qpnp_adc_meas_interval_op_ctl {
843 ADC_MEAS_INTERVAL_OP_SINGLE = 0,
844 ADC_MEAS_INTERVAL_OP_CONTINUOUS,
845 ADC_MEAS_INTERVAL_OP_NONE,
846};
847
848/**
849 * Channel selection registers for each of the configurable measurements
850 * Channels allotment is set at device config for a channel.
851 * The USB_ID, BATT_THERM, PMIC_THERM and VBAT channels are used by the
852 * kernel space USB, Battery and IADC drivers.
853 * The other 3 channels are configurable for use by userspace clients.
854 */
855enum qpnp_adc_tm_channel_select {
856 QPNP_ADC_TM_M0_ADC_CH_SEL_CTL = 0x48,
857 QPNP_ADC_TM_M1_ADC_CH_SEL_CTL = 0x68,
858 QPNP_ADC_TM_M2_ADC_CH_SEL_CTL = 0x70,
859 QPNP_ADC_TM_M3_ADC_CH_SEL_CTL = 0x78,
860 QPNP_ADC_TM_M4_ADC_CH_SEL_CTL = 0x80,
861 QPNP_ADC_TM_M5_ADC_CH_SEL_CTL = 0x88,
862 QPNP_ADC_TM_M6_ADC_CH_SEL_CTL = 0x90,
863 QPNP_ADC_TM_M7_ADC_CH_SEL_CTL = 0x98,
864 QPNP_ADC_TM_CH_SELECT_NONE
865};
866
867/**
868 * Channel index for the corresponding index to qpnp_adc_tm_channel_selec
869 */
870enum qpnp_adc_tm_channel_num {
871 QPNP_ADC_TM_CHAN0 = 0,
872 QPNP_ADC_TM_CHAN1,
873 QPNP_ADC_TM_CHAN2,
874 QPNP_ADC_TM_CHAN3,
875 QPNP_ADC_TM_CHAN4,
876 QPNP_ADC_TM_CHAN5,
877 QPNP_ADC_TM_CHAN6,
878 QPNP_ADC_TM_CHAN7,
879 QPNP_ADC_TM_CHAN_NONE
880};
881
882enum qpnp_comp_scheme_type {
883 COMP_ID_GF = 0,
884 COMP_ID_SMIC,
885 COMP_ID_TSMC,
886 COMP_ID_NUM,
887};
888
889/**
890 * struct qpnp_adc_tm_config - Represent ADC Thermal Monitor configuration.
891 * @channel: ADC channel for which thermal monitoring is requested.
892 * @adc_code: The pre-calibrated digital output of a given ADC releative to the
893 * ADC reference.
894 * @high_thr_temp: Temperature at which high threshold notification is required.
895 * @low_thr_temp: Temperature at which low threshold notification is required.
896 * @low_thr_voltage : Low threshold voltage ADC code used for reverse
897 * calibration.
898 * @high_thr_voltage: High threshold voltage ADC code used for reverse
899 * calibration.
900 */
901struct qpnp_adc_tm_config {
902 int channel;
903 int adc_code;
904 int high_thr_temp;
905 int low_thr_temp;
906 int64_t high_thr_voltage;
907 int64_t low_thr_voltage;
908};
909
910/**
911 * enum qpnp_adc_tm_trip_type - Type for setting high/low temperature/voltage.
912 * %ADC_TM_TRIP_HIGH_WARM: Setting high temperature. Note that high temperature
913 * corresponds to low voltage. Driver handles this case
914 * appropriately to set high/low thresholds for voltage.
915 * threshold.
916 * %ADC_TM_TRIP_LOW_COOL: Setting low temperature.
917 */
918enum qpnp_adc_tm_trip_type {
919 ADC_TM_TRIP_HIGH_WARM = 0,
920 ADC_TM_TRIP_LOW_COOL,
921 ADC_TM_TRIP_NUM,
922};
923
924#define ADC_TM_WRITABLE_TRIPS_MASK ((1 << ADC_TM_TRIP_NUM) - 1)
925
926/**
927 * enum qpnp_tm_state - This lets the client know whether the threshold
928 * that was crossed was high/low.
929 * %ADC_TM_HIGH_STATE: Client is notified of crossing the requested high
930 * voltage threshold.
931 * %ADC_TM_COOL_STATE: Client is notified of crossing the requested cool
932 * temperature threshold.
933 * %ADC_TM_LOW_STATE: Client is notified of crossing the requested low
934 * voltage threshold.
935 * %ADC_TM_WARM_STATE: Client is notified of crossing the requested high
936 * temperature threshold.
937 */
938enum qpnp_tm_state {
939 ADC_TM_HIGH_STATE = 0,
940 ADC_TM_COOL_STATE = ADC_TM_HIGH_STATE,
941 ADC_TM_LOW_STATE,
942 ADC_TM_WARM_STATE = ADC_TM_LOW_STATE,
943 ADC_TM_STATE_NUM,
944};
945
946/**
947 * enum qpnp_state_request - Request to enable/disable the corresponding
948 * high/low voltage/temperature thresholds.
949 * %ADC_TM_HIGH_THR_ENABLE: Enable high voltage threshold.
950 * %ADC_TM_COOL_THR_ENABLE = Enables cool temperature threshold.
951 * %ADC_TM_LOW_THR_ENABLE: Enable low voltage/temperature threshold.
952 * %ADC_TM_WARM_THR_ENABLE = Enables warm temperature threshold.
953 * %ADC_TM_HIGH_LOW_THR_ENABLE: Enable high and low voltage/temperature
954 * threshold.
955 * %ADC_TM_HIGH_THR_DISABLE: Disable high voltage/temperature threshold.
956 * %ADC_TM_COOL_THR_ENABLE = Disables cool temperature threshold.
957 * %ADC_TM_LOW_THR_DISABLE: Disable low voltage/temperature threshold.
958 * %ADC_TM_WARM_THR_ENABLE = Disables warm temperature threshold.
959 * %ADC_TM_HIGH_THR_DISABLE: Disable high and low voltage/temperature
960 * threshold.
961 */
962enum qpnp_state_request {
963 ADC_TM_HIGH_THR_ENABLE = 0,
964 ADC_TM_COOL_THR_ENABLE = ADC_TM_HIGH_THR_ENABLE,
965 ADC_TM_LOW_THR_ENABLE,
966 ADC_TM_WARM_THR_ENABLE = ADC_TM_LOW_THR_ENABLE,
967 ADC_TM_HIGH_LOW_THR_ENABLE,
968 ADC_TM_HIGH_THR_DISABLE,
969 ADC_TM_COOL_THR_DISABLE = ADC_TM_HIGH_THR_DISABLE,
970 ADC_TM_LOW_THR_DISABLE,
971 ADC_TM_WARM_THR_DISABLE = ADC_TM_LOW_THR_DISABLE,
972 ADC_TM_HIGH_LOW_THR_DISABLE,
973 ADC_TM_THR_NUM,
974};
975
976/**
977 * struct qpnp_adc_tm_btm_param - Represent Battery temperature threshold
978 * monitoring configuration.
979 * @high_temp: High temperature threshold for which notification is requested.
980 * @low_temp: Low temperature threshold for which notification is requested.
981 * @high_thr_voltage: High voltage for which notification is requested.
982 * @low_thr_voltage: Low voltage for which notification is requested.
983 * @adc_tm_hc: Represents the refreshed BTM register design.
984 * @state_request: Enable/disable the corresponding high and low temperature
985 * thresholds.
986 * @timer_interval1: Select polling rate from qpnp_adc_meas_timer_1 type.
987 * @timer_interval2: Select polling rate from qpnp_adc_meas_timer_2 type.
988 * @timer_interval3: Select polling rate from qpnp_adc_meas_timer_3 type.
989 * @btmid_ctx: A context of void type.
990 * @threshold_notification: Notification callback once threshold are crossed.
991 * units to be used for High/Low temperature and voltage notification -
992 * This depends on the clients usage. Check the rscaling function
993 * for the appropriate channel nodes.
994 * @Batt therm clients temperature units is decidegreesCentigrate.
995 * @USB_ID inputs the voltage units in milli-volts.
996 * @PA_THERM inputs the units in degC.
997 * @PMIC_THERM inputs the units in millidegC.
998 */
999struct qpnp_adc_tm_btm_param {
Siddartha Mohanadossd9e74fe2017-10-13 15:27:55 -07001000 uint32_t full_scale_code;
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08001001 int32_t high_temp;
1002 int32_t low_temp;
1003 int32_t high_thr;
1004 int32_t low_thr;
1005 int32_t gain_num;
1006 int32_t gain_den;
1007 bool adc_tm_hc;
1008 enum qpnp_vadc_channels channel;
1009 enum qpnp_state_request state_request;
1010 enum qpnp_adc_meas_timer_1 timer_interval;
1011 enum qpnp_adc_meas_timer_2 timer_interval2;
1012 enum qpnp_adc_meas_timer_3 timer_interval3;
1013 void *btm_ctx;
1014 void (*threshold_notification)(enum qpnp_tm_state state,
1015 void *ctx);
1016};
1017
1018/**
1019 * struct qpnp_vadc_linear_graph - Represent ADC characteristics.
1020 * @dy: Numerator slope to calculate the gain.
1021 * @dx: Denominator slope to calculate the gain.
1022 * @adc_vref: A/D word of the voltage reference used for the channel.
1023 * @adc_gnd: A/D word of the ground reference used for the channel.
1024 *
1025 * Each ADC device has different offset and gain parameters which are computed
1026 * to calibrate the device.
1027 */
1028struct qpnp_vadc_linear_graph {
1029 int64_t dy;
1030 int64_t dx;
1031 int64_t adc_vref;
1032 int64_t adc_gnd;
1033};
1034
1035/**
1036 * struct qpnp_vadc_map_pt - Map the graph representation for ADC channel
1037 * @x: Represent the ADC digitized code.
1038 * @y: Represent the physical data which can be temperature, voltage,
1039 * resistance.
1040 */
1041struct qpnp_vadc_map_pt {
1042 int32_t x;
1043 int32_t y;
1044};
1045
1046/**
1047 * struct qpnp_vadc_scaling_ratio - Represent scaling ratio for adc input.
1048 * @num: Numerator scaling parameter.
1049 * @den: Denominator scaling parameter.
1050 */
1051struct qpnp_vadc_scaling_ratio {
1052 int32_t num;
1053 int32_t den;
1054};
1055
1056/**
1057 * struct qpnp_adc_properties - Represent the ADC properties.
1058 * @adc_reference: Reference voltage for QPNP ADC.
Siddartha Mohanadossd9e74fe2017-10-13 15:27:55 -07001059 * @full_scale_code: Full scale value with intrinsic offset removed.
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08001060 * @biploar: Polarity for QPNP ADC.
1061 * @adc_hc: Represents using HC variant of the ADC controller.
1062 */
1063struct qpnp_adc_properties {
1064 uint32_t adc_vdd_reference;
Siddartha Mohanadossd9e74fe2017-10-13 15:27:55 -07001065 uint32_t full_scale_code;
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08001066 bool bipolar;
1067 bool adc_hc;
1068};
1069
1070/**
1071 * struct qpnp_vadc_chan_properties - Represent channel properties of the ADC.
1072 * @offset_gain_numerator: The inverse numerator of the gain applied to the
1073 * input channel.
1074 * @offset_gain_denominator: The inverse denominator of the gain applied to the
1075 * input channel.
1076 * @high_thr: High threshold voltage that is requested to be set.
1077 * @low_thr: Low threshold voltage that is requested to be set.
1078 * @timer_select: Chosen from one of the 3 timers to set the polling rate for
1079 * the VADC_BTM channel.
1080 * @meas_interval1: Polling rate to set for timer 1.
1081 * @meas_interval2: Polling rate to set for timer 2.
1082 * @tm_channel_select: BTM channel number for the 5 VADC_BTM channels.
1083 * @state_request: User can select either enable or disable high/low or both
1084 * activation levels based on the qpnp_state_request type.
1085 * @adc_graph: ADC graph for the channel of struct type qpnp_adc_linear_graph.
1086 */
1087struct qpnp_vadc_chan_properties {
1088 uint32_t offset_gain_numerator;
1089 uint32_t offset_gain_denominator;
1090 uint32_t high_thr;
1091 uint32_t low_thr;
1092 enum qpnp_adc_meas_timer_select timer_select;
1093 enum qpnp_adc_meas_timer_1 meas_interval1;
1094 enum qpnp_adc_meas_timer_2 meas_interval2;
1095 enum qpnp_adc_tm_channel_select tm_channel_select;
1096 enum qpnp_state_request state_request;
1097 enum qpnp_adc_calib_type calib_type;
1098 struct qpnp_vadc_linear_graph adc_graph[ADC_HC_CAL_SEL_NONE];
1099};
1100
1101/**
1102 * struct qpnp_vadc_result - Represent the result of the QPNP ADC.
1103 * @chan: The channel number of the requested conversion.
1104 * @adc_code: The pre-calibrated digital output of a given ADC relative to the
1105 * the ADC reference.
1106 * @measurement: In units specific for a given ADC; most ADC uses reference
1107 * voltage but some ADC uses reference current. This measurement
1108 * here is a number relative to a reference of a given ADC.
1109 * @physical: The data meaningful for each individual channel whether it is
1110 * voltage, current, temperature, etc.
1111 * All voltage units are represented in micro - volts.
1112 * -Battery temperature units are represented as 0.1 DegC.
1113 * -PA Therm temperature units are represented as DegC.
1114 * -PMIC Die temperature units are represented as 0.001 DegC.
1115 */
1116struct qpnp_vadc_result {
1117 uint32_t chan;
1118 int32_t adc_code;
1119 int64_t measurement;
1120 int64_t physical;
1121};
1122
1123/**
1124 * struct qpnp_adc_amux - AMUX properties for individual channel
1125 * @name: Channel string name.
1126 * @channel_num: Channel in integer used from qpnp_adc_channels.
1127 * @chan_path_prescaling: Channel scaling performed on the input signal.
1128 * @adc_decimation: Sampling rate desired for the channel.
1129 * adc_scale_fn: Scaling function to convert to the data meaningful for
1130 * each individual channel whether it is voltage, current,
1131 * temperature, etc and compensates the channel properties.
1132 */
1133struct qpnp_adc_amux {
1134 char *name;
1135 enum qpnp_vadc_channels channel_num;
1136 enum qpnp_adc_channel_scaling_param chan_path_prescaling;
1137 enum qpnp_adc_decimation_type adc_decimation;
1138 enum qpnp_adc_scale_fn_type adc_scale_fn;
1139 enum qpnp_adc_fast_avg_ctl fast_avg_setup;
1140 enum qpnp_adc_hw_settle_time hw_settle_time;
1141 enum qpnp_adc_calib_type calib_type;
1142 enum qpnp_adc_cal_val cal_val;
1143};
1144
1145/**
1146 * struct qpnp_vadc_scaling_ratio
1147 *
1148 */
1149static const struct qpnp_vadc_scaling_ratio qpnp_vadc_amux_scaling_ratio[] = {
1150 {1, 1},
1151 {1, 3},
1152 {1, 4},
1153 {1, 6},
1154 {1, 20},
1155 {1, 8},
1156 {10, 81},
Jishnu Prakash3b3fe942018-01-08 12:23:39 +05301157 {1, 10},
1158 {1, 16}
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08001159};
1160
1161/**
1162 * struct qpnp_vadc_scale_fn - Scaling function prototype
1163 * @chan: Function pointer to one of the scaling functions
1164 * which takes the adc properties, channel properties,
1165 * and returns the physical result
1166 */
1167struct qpnp_vadc_scale_fn {
1168 int32_t (*chan)(struct qpnp_vadc_chip *, int32_t,
1169 const struct qpnp_adc_properties *,
1170 const struct qpnp_vadc_chan_properties *,
1171 struct qpnp_vadc_result *);
1172};
1173
1174/**
1175 * struct qpnp_adc_tm_reverse_scale_fn - Reverse scaling prototype
1176 * @chan: Function pointer to one of the scaling functions
1177 * which takes the adc properties, channel properties,
1178 * and returns the physical result
1179 */
1180struct qpnp_adc_tm_reverse_scale_fn {
1181 int32_t (*chan)(struct qpnp_vadc_chip *,
1182 struct qpnp_adc_tm_btm_param *,
1183 uint32_t *, uint32_t *);
1184};
1185
1186/**
1187 * struct qpnp_vadc_rscale_fn - Scaling function prototype
1188 * @chan: Function pointer to one of the scaling functions
1189 * which takes the adc properties, channel properties,
1190 * and returns the physical result
1191 */
1192struct qpnp_vadc_rscale_fn {
1193 int32_t (*chan)(struct qpnp_vadc_chip *,
1194 const struct qpnp_vadc_chan_properties *,
1195 struct qpnp_adc_tm_btm_param *,
1196 uint32_t *, uint32_t *);
1197};
1198
1199/**
1200 * struct qpnp_iadc_calib - IADC channel calibration structure.
1201 * @channel - Channel for which the historical offset and gain is
1202 * calculated. Available channels are internal rsense,
1203 * external rsense and alternate lead pairs.
1204 * @offset_raw - raw Offset value for the channel.
1205 * @gain_raw - raw Gain of the channel.
1206 * @ideal_offset_uv - ideal offset value for the channel.
1207 * @ideal_gain_nv - ideal gain for the channel.
1208 * @offset_uv - converted value of offset in uV.
1209 * @gain_uv - converted value of gain in uV.
1210 */
1211struct qpnp_iadc_calib {
1212 enum qpnp_iadc_channels channel;
1213 uint16_t offset_raw;
1214 uint16_t gain_raw;
1215 uint32_t ideal_offset_uv;
1216 uint32_t ideal_gain_nv;
1217 uint32_t offset_uv;
1218 uint32_t gain_uv;
1219};
1220
1221/**
1222 * struct qpnp_iadc_result - IADC read result structure.
1223 * @oresult_uv - Result of ADC in uV.
1224 * @result_ua - Result of ADC in uA.
1225 */
1226struct qpnp_iadc_result {
1227 int32_t result_uv;
1228 int32_t result_ua;
1229};
1230
1231/**
1232 * struct qpnp_adc_drv - QPNP ADC device structure.
1233 * @spmi - spmi device for ADC peripheral.
1234 * @offset - base offset for the ADC peripheral.
1235 * @adc_prop - ADC properties specific to the ADC peripheral.
1236 * @amux_prop - AMUX properties representing the ADC peripheral.
1237 * @adc_channels - ADC channel properties for the ADC peripheral.
1238 * @adc_irq_eoc - End of Conversion IRQ.
1239 * @adc_irq_fifo_not_empty - Conversion sequencer request written
1240 * to FIFO when not empty.
1241 * @adc_irq_conv_seq_timeout - Conversion sequencer trigger timeout.
1242 * @adc_high_thr_irq - Output higher than high threshold set for measurement.
1243 * @adc_low_thr_irq - Output lower than low threshold set for measurement.
1244 * @adc_lock - ADC lock for access to the peripheral.
1245 * @adc_rslt_completion - ADC result notification after interrupt
1246 * is received.
1247 * @calib - Internal rsens calibration values for gain and offset.
1248 */
1249struct qpnp_adc_drv {
1250 struct platform_device *pdev;
1251 struct regmap *regmap;
1252 uint8_t slave;
1253 uint16_t offset;
1254 struct qpnp_adc_properties *adc_prop;
1255 struct qpnp_adc_amux_properties *amux_prop;
1256 struct qpnp_adc_amux *adc_channels;
1257 int adc_irq_eoc;
1258 int adc_irq_fifo_not_empty;
1259 int adc_irq_conv_seq_timeout;
1260 int adc_high_thr_irq;
1261 int adc_low_thr_irq;
1262 struct mutex adc_lock;
1263 struct completion adc_rslt_completion;
1264 struct qpnp_iadc_calib calib;
1265 struct regulator *hkadc_ldo;
1266 struct regulator *hkadc_ldo_ok;
1267 bool adc_hc;
1268};
1269
1270/**
1271 * struct qpnp_adc_amux_properties - QPNP VADC amux channel property.
1272 * @amux_channel - Refer to the qpnp_vadc_channel list.
1273 * @decimation - Sampling rate supported for the channel.
1274 * @mode_sel - The basic mode of operation.
1275 * @hw_settle_time - The time between AMUX being configured and the
1276 * start of conversion.
1277 * @fast_avg_setup - Ability to provide single result from the ADC
1278 * that is an average of multiple measurements.
1279 * @trigger_channel - HW trigger channel for conversion sequencer.
1280 * @calib_type - Used to store the calibration type for the channel
1281 * absolute/ratiometric.
1282 * @cal_val - Used to determine if fresh calibration value or timer
1283 * updated calibration value is to be used.
1284 * @chan_prop - Represent the channel properties of the ADC.
1285 */
1286struct qpnp_adc_amux_properties {
1287 uint32_t amux_channel;
1288 uint32_t decimation;
1289 uint32_t mode_sel;
1290 uint32_t hw_settle_time;
1291 uint32_t fast_avg_setup;
1292 enum qpnp_vadc_trigger trigger_channel;
1293 enum qpnp_adc_calib_type calib_type;
1294 enum qpnp_adc_cal_val cal_val;
1295 struct qpnp_vadc_chan_properties chan_prop[0];
1296};
1297
1298/* SW index's for PMIC type and version used by QPNP VADC and IADC */
1299#define QPNP_REV_ID_8941_3_1 1
1300#define QPNP_REV_ID_8026_1_0 2
1301#define QPNP_REV_ID_8026_2_0 3
1302#define QPNP_REV_ID_8110_1_0 4
1303#define QPNP_REV_ID_8026_2_1 5
1304#define QPNP_REV_ID_8110_2_0 6
1305#define QPNP_REV_ID_8026_2_2 7
1306#define QPNP_REV_ID_8941_3_0 8
1307#define QPNP_REV_ID_8941_2_0 9
1308#define QPNP_REV_ID_8916_1_0 10
1309#define QPNP_REV_ID_8916_1_1 11
1310#define QPNP_REV_ID_8916_2_0 12
1311#define QPNP_REV_ID_8909_1_0 13
1312#define QPNP_REV_ID_8909_1_1 14
1313#define QPNP_REV_ID_PM8950_1_0 16
1314
1315/* Public API */
1316#if defined(CONFIG_SENSORS_QPNP_ADC_VOLTAGE) \
1317 || defined(CONFIG_SENSORS_QPNP_ADC_VOLTAGE_MODULE)
1318/**
1319 * qpnp_vadc_read() - Performs ADC read on the channel.
1320 * @dev: Structure device for qpnp vadc
1321 * @channel: Input channel to perform the ADC read.
1322 * @result: Structure pointer of type adc_chan_result
1323 * in which the ADC read results are stored.
1324 */
1325int32_t qpnp_vadc_read(struct qpnp_vadc_chip *dev,
1326 enum qpnp_vadc_channels channel,
1327 struct qpnp_vadc_result *result);
1328
1329/**
1330 * qpnp_vadc_hc_read() - Performs ADC read on the channel.
1331 * It uses the refreshed VADC design from qpnp-vadc-hc.
1332 * @dev: Structure device for qpnp vadc
1333 * @channel: Input channel to perform the ADC read.
1334 * @result: Structure pointer of type adc_chan_result
1335 * in which the ADC read results are stored.
1336 */
1337int32_t qpnp_vadc_hc_read(struct qpnp_vadc_chip *dev,
1338 enum qpnp_vadc_channels channel,
1339 struct qpnp_vadc_result *result);
1340
1341/**
1342 * qpnp_vadc_conv_seq_request() - Performs ADC read on the conversion
1343 * sequencer channel.
1344 * @dev: Structure device for qpnp vadc
1345 * @channel: Input channel to perform the ADC read.
1346 * @result: Structure pointer of type adc_chan_result
1347 * in which the ADC read results are stored.
1348 */
1349int32_t qpnp_vadc_conv_seq_request(struct qpnp_vadc_chip *dev,
1350 enum qpnp_vadc_trigger trigger_channel,
1351 enum qpnp_vadc_channels channel,
1352 struct qpnp_vadc_result *result);
1353
1354/**
1355 * qpnp_adc_get_devicetree_data() - Abstracts the ADC devicetree data.
1356 * @spmi: spmi ADC device.
1357 * @adc_qpnp: spmi device tree node structure
1358 */
1359int32_t qpnp_adc_get_devicetree_data(struct platform_device *pdev,
1360 struct qpnp_adc_drv *adc_qpnp);
1361
1362/**
1363 * qpnp_adc_scale_default() - Scales the pre-calibrated digital output
1364 * of an ADC to the ADC reference and compensates for the
1365 * gain and offset.
1366 * @dev: Structure device for qpnp vadc
1367 * @adc_code: pre-calibrated digital output of the ADC.
1368 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
1369 * reference voltage.
1370 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1371 * slope and offset.
1372 * @chan_rslt: Physical result to be stored.
1373 */
1374int32_t qpnp_adc_scale_default(struct qpnp_vadc_chip *dev,
1375 int32_t adc_code,
1376 const struct qpnp_adc_properties *adc_prop,
1377 const struct qpnp_vadc_chan_properties *chan_prop,
1378 struct qpnp_vadc_result *chan_rslt);
1379/**
Jishnu Prakash3b3fe942018-01-08 12:23:39 +05301380 * qpnp_iadc_scale_default() - Scales the pre-calibrated digital output
1381 * of current ADC to the ADC reference and compensates for the
1382 * gain and offset.
1383 * @dev: Structure device for qpnp vadc
1384 * @adc_code: pre-calibrated digital output of the ADC.
1385 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
1386 * reference voltage.
1387 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1388 * slope and offset.
1389 * @chan_rslt: Physical result to be stored.
1390 */
1391int32_t qpnp_iadc_scale_default(struct qpnp_vadc_chip *dev,
1392 int32_t adc_code,
1393 const struct qpnp_adc_properties *adc_prop,
1394 const struct qpnp_vadc_chan_properties *chan_prop,
1395 struct qpnp_vadc_result *chan_rslt);
1396/**
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08001397 * qpnp_adc_scale_pmic_therm() - Scales the pre-calibrated digital output
1398 * of an ADC to the ADC reference and compensates for the
1399 * gain and offset. Performs the AMUX out as 2mV/K and returns
1400 * the temperature in milli degC.
1401 * @dev: Structure device for qpnp vadc
1402 * @adc_code: pre-calibrated digital output of the ADC.
1403 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
1404 * reference voltage.
1405 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1406 * slope and offset.
1407 * @chan_rslt: Physical result to be stored.
1408 */
1409int32_t qpnp_adc_scale_pmic_therm(struct qpnp_vadc_chip *dev,
1410 int32_t adc_code,
1411 const struct qpnp_adc_properties *adc_prop,
1412 const struct qpnp_vadc_chan_properties *chan_prop,
1413 struct qpnp_vadc_result *chan_rslt);
1414/**
1415 * qpnp_adc_scale_pmi_chg_temp() - Scales the pre-calibrated digital output
1416 * of an ADC to the ADC reference and compensates for the
1417 * gain and offset. The voltage measured by HKADC is related to
1418 * the junction temperature according to
1419 * Tj = -137.67 degC * (V_adc * 2) + 382.04 degC
1420 * @dev: Structure device for qpnp vadc
1421 * @adc_code: pre-calibrated digital output of the ADC.
1422 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
1423 * reference voltage.
1424 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1425 * slope and offset.
1426 * @chan_rslt: Physical result to be stored.
1427 */
1428int32_t qpnp_adc_scale_pmi_chg_temp(struct qpnp_vadc_chip *dev,
1429 int32_t adc_code,
1430 const struct qpnp_adc_properties *adc_prop,
1431 const struct qpnp_vadc_chan_properties *chan_prop,
1432 struct qpnp_vadc_result *chan_rslt);
1433/**
Jishnu Prakash3b3fe942018-01-08 12:23:39 +05301434 * qpnp_adc_batt_therm() - Scales the pre-calibrated digital output
1435 * of an ADC to the ADC reference and compensates for the
1436 * gain and offset. Returns the temperature in decidegC.
1437 * @dev: Structure device for qpnp vadc
1438 * @adc_code: pre-calibrated digital output of the ADC.
1439 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1440 * reference voltage.
1441 * @chan_prop: individual channel properties to compensate the i/p scaling,
1442 * slope and offset.
1443 * @chan_rslt: physical result to be stored.
1444 */
1445int32_t qpnp_adc_batt_therm(struct qpnp_vadc_chip *dev,
1446 int32_t adc_code,
1447 const struct qpnp_adc_properties *adc_prop,
1448 const struct qpnp_vadc_chan_properties *chan_prop,
1449 struct qpnp_vadc_result *chan_rslt);
1450/**
Jishnu Prakash20343d42018-02-12 14:53:33 +05301451 * qpnp_adc_batt_therm_qrd() - Scales the pre-calibrated digital output
1452 * of an ADC to the ADC reference and compensates for the
1453 * gain and offset. Returns the temperature in decidegC for QRD.
1454 * @dev: Structure device for qpnp vadc
1455 * @adc_code: pre-calibrated digital output of the ADC.
1456 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1457 * reference voltage.
1458 * @chan_prop: individual channel properties to compensate the i/p scaling,
1459 * slope and offset.
1460 * @chan_rslt: physical result to be stored.
1461 */
1462int32_t qpnp_adc_batt_therm_qrd(struct qpnp_vadc_chip *dev,
1463 int32_t adc_code,
1464 const struct qpnp_adc_properties *adc_prop,
1465 const struct qpnp_vadc_chan_properties *chan_prop,
1466 struct qpnp_vadc_result *chan_rslt);
1467/**
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08001468 * qpnp_adc_scale_batt_therm() - Scales the pre-calibrated digital output
1469 * of an ADC to the ADC reference and compensates for the
1470 * gain and offset. Returns the temperature in decidegC.
1471 * @dev: Structure device for qpnp vadc
1472 * @adc_code: pre-calibrated digital output of the ADC.
1473 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1474 * reference voltage.
1475 * @chan_prop: individual channel properties to compensate the i/p scaling,
1476 * slope and offset.
1477 * @chan_rslt: physical result to be stored.
1478 */
1479int32_t qpnp_adc_scale_batt_therm(struct qpnp_vadc_chip *dev,
1480 int32_t adc_code,
1481 const struct qpnp_adc_properties *adc_prop,
1482 const struct qpnp_vadc_chan_properties *chan_prop,
1483 struct qpnp_vadc_result *chan_rslt);
1484/**
Jishnu Prakash3b3fe942018-01-08 12:23:39 +05301485 * qpnp_adc_scale_chrg_temp() - Scales the pre-calibrated digital output
1486 * of an ADC to the ADC reference and compensates for the
1487 * gain and offset. The voltage measured by HKADC is related to
1488 * the junction temperature according to
1489 * Tj = 377.5 degC - (V_adc / 0.004)
1490 * @dev: Structure device for qpnp vadc
1491 * @adc_code: pre-calibrated digital output of the ADC.
1492 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
1493 * reference voltage.
1494 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1495 * slope and offset.
1496 * @chan_rslt: Physical result to be stored.
1497 */
1498int32_t qpnp_adc_scale_chrg_temp(struct qpnp_vadc_chip *dev,
1499 int32_t adc_code,
1500 const struct qpnp_adc_properties *adc_prop,
1501 const struct qpnp_vadc_chan_properties *chan_prop,
1502 struct qpnp_vadc_result *chan_rslt);
1503/**
1504 * qpnp_adc_scale_die_temp() - Scales the pre-calibrated digital output
1505 * of an ADC to the ADC reference and compensates for the
1506 * gain and offset. The voltage measured by HKADC is related to
1507 * the junction temperature according to
1508 * Tj = -273.15 degC + (V_adc / 0.002)
1509 * @dev: Structure device for qpnp vadc
1510 * @adc_code: pre-calibrated digital output of the ADC.
1511 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
1512 * reference voltage.
1513 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1514 * slope and offset.
1515 * @chan_rslt: Physical result to be stored.
1516 */
1517int32_t qpnp_adc_scale_die_temp(struct qpnp_vadc_chip *dev,
1518 int32_t adc_code,
1519 const struct qpnp_adc_properties *adc_prop,
1520 const struct qpnp_vadc_chan_properties *chan_prop,
1521 struct qpnp_vadc_result *chan_rslt);
1522/**
1523 * qpnp_adc_scale_usbin_curr() - Scales the pre-calibrated digital output
1524 * of an ADC to the ADC reference and compensates for the
1525 * gain and offset.
1526 * @dev: Structure device for qpnp vadc
1527 * @adc_code: pre-calibrated digital output of the ADC.
1528 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
1529 * reference voltage.
1530 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1531 * slope and offset.
1532 * @chan_rslt: Physical result to be stored.
1533 */
1534int32_t qpnp_adc_scale_usbin_curr(struct qpnp_vadc_chip *dev,
1535 int32_t adc_code,
1536 const struct qpnp_adc_properties *adc_prop,
1537 const struct qpnp_vadc_chan_properties *chan_prop,
1538 struct qpnp_vadc_result *chan_rslt);
1539/**
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08001540 * qpnp_adc_scale_qrd_batt_therm() - Scales the pre-calibrated digital output
1541 * of an ADC to the ADC reference and compensates for the
1542 * gain and offset. Returns the temperature in decidegC.
1543 * @dev: Structure device for qpnp vadc
1544 * @adc_code: pre-calibrated digital output of the ADC.
1545 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1546 * reference voltage.
1547 * @chan_prop: individual channel properties to compensate the i/p scaling,
1548 * slope and offset.
1549 * @chan_rslt: physical result to be stored.
1550 */
1551int32_t qpnp_adc_scale_qrd_batt_therm(struct qpnp_vadc_chip *dev,
1552 int32_t adc_code,
1553 const struct qpnp_adc_properties *adc_prop,
1554 const struct qpnp_vadc_chan_properties *chan_prop,
1555 struct qpnp_vadc_result *chan_rslt);
1556/**
1557 * qpnp_adc_scale_qrd_skuaa_batt_therm() - Scales the pre-calibrated digital
1558 * output of an ADC to the ADC reference and compensates for the
1559 * gain and offset. Returns the temperature in decidegC.
1560 * @dev: Structure device for qpnp vadc
1561 * @adc_code: pre-calibrated digital output of the ADC.
1562 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1563 * reference voltage.
1564 * @chan_prop: individual channel properties to compensate the i/p scaling,
1565 * slope and offset.
1566 * @chan_rslt: physical result to be stored.
1567 */
1568int32_t qpnp_adc_scale_qrd_skuaa_batt_therm(struct qpnp_vadc_chip *dev,
1569 int32_t adc_code,
1570 const struct qpnp_adc_properties *adc_prop,
1571 const struct qpnp_vadc_chan_properties *chan_prop,
1572 struct qpnp_vadc_result *chan_rslt);
1573/**
1574 * qpnp_adc_scale_qrd_skug_batt_therm() - Scales the pre-calibrated digital
1575 * output of an ADC to the ADC reference and compensates for the
1576 * gain and offset. Returns the temperature in decidegC.
1577 * @dev: Structure device for qpnp vadc
1578 * @adc_code: pre-calibrated digital output of the ADC.
1579 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1580 * reference voltage.
1581 * @chan_prop: individual channel properties to compensate the i/p scaling,
1582 * slope and offset.
1583 * @chan_rslt: physical result to be stored.
1584 */
1585int32_t qpnp_adc_scale_qrd_skug_batt_therm(struct qpnp_vadc_chip *dev,
1586 int32_t adc_code,
1587 const struct qpnp_adc_properties *adc_prop,
1588 const struct qpnp_vadc_chan_properties *chan_prop,
1589 struct qpnp_vadc_result *chan_rslt);
1590/**
1591 * qpnp_adc_scale_qrd_skuh_batt_therm() - Scales the pre-calibrated digital
1592 * output of an ADC to the ADC reference and compensates for the
1593 * gain and offset. Returns the temperature in decidegC.
1594 * @dev: Structure device for qpnp vadc
1595 * @adc_code: pre-calibrated digital output of the ADC.
1596 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1597 * reference voltage.
1598 * @chan_prop: individual channel properties to compensate the i/p scaling,
1599 * slope and offset.
1600 * @chan_rslt: physical result to be stored.
1601 */
1602int32_t qpnp_adc_scale_qrd_skuh_batt_therm(struct qpnp_vadc_chip *dev,
1603 int32_t adc_code,
1604 const struct qpnp_adc_properties *adc_prop,
1605 const struct qpnp_vadc_chan_properties *chan_prop,
1606 struct qpnp_vadc_result *chan_rslt);
1607/**
1608 * qpnp_adc_scale_qrd_skut1_batt_therm() - Scales the pre-calibrated digital
1609 * output of an ADC to the ADC reference and compensates for the
1610 * gain and offset. Returns the temperature in decidegC.
1611 * @dev: Structure device for qpnp vadc
1612 * @adc_code: pre-calibrated digital output of the ADC.
1613 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1614 * reference voltage.
1615 * @chan_prop: individual channel properties to compensate the i/p scaling,
1616 * slope and offset.
1617 * @chan_rslt: physical result to be stored.
1618 */
1619int32_t qpnp_adc_scale_qrd_skut1_batt_therm(struct qpnp_vadc_chip *dev,
1620 int32_t adc_code,
1621 const struct qpnp_adc_properties *adc_prop,
1622 const struct qpnp_vadc_chan_properties *chan_prop,
1623 struct qpnp_vadc_result *chan_rslt);
1624/**
1625 * qpnp_adc_scale_smb_batt_therm() - Scales the pre-calibrated digital output
1626 * of an ADC to the ADC reference and compensates for the
1627 * gain and offset. Returns the temperature in decidegC.
1628 * @dev: Structure device for qpnp vadc
1629 * @adc_code: pre-calibrated digital output of the ADC.
1630 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1631 * reference voltage.
1632 * @chan_prop: individual channel properties to compensate the i/p scaling,
1633 * slope and offset.
1634 * @chan_rslt: physical result to be stored.
1635 */
1636int32_t qpnp_adc_scale_smb_batt_therm(struct qpnp_vadc_chip *dev,
1637 int32_t adc_code,
1638 const struct qpnp_adc_properties *adc_prop,
1639 const struct qpnp_vadc_chan_properties *chan_prop,
1640 struct qpnp_vadc_result *chan_rslt);
1641/**
1642 * qpnp_adc_scale_batt_id() - Scales the pre-calibrated digital output
1643 * of an ADC to the ADC reference and compensates for the
1644 * gain and offset.
1645 * @dev: Structure device for qpnp vadc
1646 * @adc_code: pre-calibrated digital output of the ADC.
1647 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1648 * reference voltage.
1649 * @chan_prop: individual channel properties to compensate the i/p scaling,
1650 * slope and offset.
1651 * @chan_rslt: physical result to be stored.
1652 */
1653int32_t qpnp_adc_scale_batt_id(struct qpnp_vadc_chip *dev, int32_t adc_code,
1654 const struct qpnp_adc_properties *adc_prop,
1655 const struct qpnp_vadc_chan_properties *chan_prop,
1656 struct qpnp_vadc_result *chan_rslt);
1657/**
1658 * qpnp_adc_scale_tdkntcg_therm() - Scales the pre-calibrated digital output
1659 * of an ADC to the ADC reference and compensates for the
1660 * gain and offset. Returns the temperature of the xo therm in
1661 * milidegC.
1662 * @dev: Structure device for qpnp vadc
1663 * @adc_code: pre-calibrated digital output of the ADC.
1664 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1665 * reference voltage.
1666 * @chan_prop: individual channel properties to compensate the i/p scaling,
1667 * slope and offset.
1668 * @chan_rslt: physical result to be stored.
1669 */
1670int32_t qpnp_adc_tdkntcg_therm(struct qpnp_vadc_chip *dev, int32_t adc_code,
1671 const struct qpnp_adc_properties *adc_prop,
1672 const struct qpnp_vadc_chan_properties *chan_prop,
1673 struct qpnp_vadc_result *chan_rslt);
1674/**
1675 * qpnp_adc_scale_therm_pu1() - Scales the pre-calibrated digital output
1676 * of an ADC to the ADC reference and compensates for the
1677 * gain and offset. Returns the temperature of the therm in degC.
1678 * It uses a mapping table computed for a 150K pull-up.
1679 * Pull-up1 is an internal pull-up on the AMUX of 150K.
1680 * @dev: Structure device for qpnp vadc
1681 * @adc_code: pre-calibrated digital output of the ADC.
1682 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1683 * reference voltage.
1684 * @chan_prop: individual channel properties to compensate the i/p scaling,
1685 * slope and offset.
1686 * @chan_rslt: physical result to be stored.
1687 */
1688int32_t qpnp_adc_scale_therm_pu1(struct qpnp_vadc_chip *dev, int32_t adc_code,
1689 const struct qpnp_adc_properties *adc_prop,
1690 const struct qpnp_vadc_chan_properties *chan_prop,
1691 struct qpnp_vadc_result *chan_rslt);
1692/**
1693 * qpnp_adc_scale_therm_pu2() - Scales the pre-calibrated digital output
1694 * of an ADC to the ADC reference and compensates for the
1695 * gain and offset. Returns the temperature of the therm in degC.
1696 * It uses a mapping table computed for a 100K pull-up.
1697 * Pull-up2 is an internal pull-up on the AMUX of 100K.
1698 * @dev: Structure device for qpnp vadc
1699 * @adc_code: pre-calibrated digital output of the ADC.
1700 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1701 * reference voltage.
1702 * @chan_prop: individual channel properties to compensate the i/p scaling,
1703 * slope and offset.
1704 * @chan_rslt: physical result to be stored.
1705 */
1706int32_t qpnp_adc_scale_therm_pu2(struct qpnp_vadc_chip *dev, int32_t adc_code,
1707 const struct qpnp_adc_properties *adc_prop,
1708 const struct qpnp_vadc_chan_properties *chan_prop,
1709 struct qpnp_vadc_result *chan_rslt);
1710/**
1711 * qpnp_adc_scale_therm_ncp03() - Scales the pre-calibrated digital output
1712 * of an ADC to the ADC reference and compensates for the
1713 * gain and offset. Returns the temperature of the therm in degC.
1714 * It uses a mapping table computed for a NCP03WF683.
1715 * @dev: Structure device for qpnp vadc
1716 * @adc_code: pre-calibrated digital output of the ADC.
1717 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1718 * reference voltage.
1719 * @chan_prop: individual channel properties to compensate the i/p scaling,
1720 * slope and offset.
1721 * @chan_rslt: physical result to be stored.
1722 */
1723int32_t qpnp_adc_scale_therm_ncp03(struct qpnp_vadc_chip *dev, int32_t adc_code,
1724 const struct qpnp_adc_properties *adc_prop,
1725 const struct qpnp_vadc_chan_properties *chan_prop,
1726 struct qpnp_vadc_result *chan_rslt);
1727/**
Jishnu Prakash62aff112017-09-15 15:06:59 +05301728 * qpnp_adc_scale_die_temp_1390() - Scales the pre-calibrated digital output
1729 * of an ADC to the ADC reference and compensates for the
1730 * gain and offset. The voltage measured by HKADC is related to
1731 * the junction temperature according to
1732 * V_adc = 1.496 – 0.00381*Tj
1733 * @dev: Structure device for qpnp vadc
1734 * @adc_code: pre-calibrated digital output of the ADC.
1735 * @adc_prop: adc properties of the pm8xxx adc such as bit resolution,
1736 * reference voltage.
1737 * @chan_prop: individual channel properties to compensate the i/p scaling,
1738 * slope and offset.
1739 * @chan_rslt: physical result to be stored.
1740 */
1741int32_t qpnp_adc_scale_die_temp_1390(struct qpnp_vadc_chip *dev,
1742 int32_t adc_code,
1743 const struct qpnp_adc_properties *adc_prop,
1744 const struct qpnp_vadc_chan_properties *chan_prop,
1745 struct qpnp_vadc_result *chan_rslt);
1746/**
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08001747 * qpnp_get_vadc() - Clients need to register with the vadc using the
1748 * corresponding device instance it wants to read the channels
1749 * from. Read the bindings document on how to pass the phandle
1750 * for the corresponding vadc driver to register with.
1751 * @dev: Clients device structure
1752 * @name: Corresponding client's DT parser name. Read the DT bindings
1753 * document on how to register with the vadc
1754 * @struct qpnp_vadc_chip * - On success returns the vadc device structure
1755 * pointer that needs to be used during an ADC request.
1756 */
1757struct qpnp_vadc_chip *qpnp_get_vadc(struct device *dev, const char *name);
1758/**
1759 * qpnp_adc_tm_scaler() - Performs reverse calibration.
1760 * @config: Thermal monitoring configuration.
1761 * @adc_prop: adc properties of the qpnp adc such as bit resolution and
1762 * reference voltage.
1763 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1764 * slope and offset.
1765 */
1766static inline int32_t qpnp_adc_tm_scaler(struct qpnp_adc_tm_config *tm_config,
1767 const struct qpnp_adc_properties *adc_prop,
1768 const struct qpnp_vadc_chan_properties *chan_prop)
1769{ return -ENXIO; }
1770/**
1771 * qpnp_get_vadc_gain_and_offset() - Obtains the VADC gain and offset
1772 * for absolute and ratiometric calibration.
1773 * @dev: Structure device for qpnp vadc
1774 * @param: The result in which the ADC offset and gain values are stored.
1775 * @type: The calibration type whether client needs the absolute or
1776 * ratiometric gain and offset values.
1777 */
1778int32_t qpnp_get_vadc_gain_and_offset(struct qpnp_vadc_chip *dev,
1779 struct qpnp_vadc_linear_graph *param,
1780 enum qpnp_adc_calib_type calib_type);
1781/**
1782 * qpnp_adc_scale_millidegc_pmic_voltage_thr() - Performs reverse calibration
1783 * on the low/high temperature threshold values passed by the
1784 * client. The function coverts milldegC to voltage threshold
1785 * and accounts for the corresponding channels scaling as (2mV/K).
1786 * @dev: Structure device for qpnp vadc
1787 * @param: The input parameters that contain the low/high temperature
1788 * values.
1789 * @low_threshold: The low threshold value that needs to be updated with
1790 * the above calibrated voltage value.
1791 * @high_threshold: The low threshold value that needs to be updated with
1792 * the above calibrated voltage value.
1793 */
1794int32_t qpnp_adc_scale_millidegc_pmic_voltage_thr(struct qpnp_vadc_chip *dev,
1795 struct qpnp_adc_tm_btm_param *param,
1796 uint32_t *low_threshold, uint32_t *high_threshold);
1797/**
1798 * qpnp_adc_btm_scaler() - Performs reverse calibration on the low/high
1799 * temperature threshold values passed by the client.
1800 * The function maps the temperature to voltage and applies
1801 * ratiometric calibration on the voltage values.
1802 * @dev: Structure device for qpnp vadc
1803 * @param: The input parameters that contain the low/high temperature
1804 * values.
1805 * @low_threshold: The low threshold value that needs to be updated with
1806 * the above calibrated voltage value.
1807 * @high_threshold: The low threshold value that needs to be updated with
1808 * the above calibrated voltage value.
1809 */
1810int32_t qpnp_adc_btm_scaler(struct qpnp_vadc_chip *dev,
1811 struct qpnp_adc_tm_btm_param *param,
1812 uint32_t *low_threshold, uint32_t *high_threshold);
1813
1814/**
1815 * qpnp_adc_qrd_skuh_btm_scaler() - Performs reverse calibration on the low/high
1816 * temperature threshold values passed by the client.
1817 * The function maps the temperature to voltage and applies
1818 * ratiometric calibration on the voltage values for SKUH board.
1819 * @dev: Structure device for qpnp vadc
1820 * @param: The input parameters that contain the low/high temperature
1821 * values.
1822 * @low_threshold: The low threshold value that needs to be updated with
1823 * the above calibrated voltage value.
1824 * @high_threshold: The low threshold value that needs to be updated with
1825 * the above calibrated voltage value.
1826 */
1827int32_t qpnp_adc_qrd_skuh_btm_scaler(struct qpnp_vadc_chip *dev,
1828 struct qpnp_adc_tm_btm_param *param,
1829 uint32_t *low_threshold, uint32_t *high_threshold);
1830/**
1831 * qpnp_adc_qrd_skut1_btm_scaler() - Performs reverse calibration on the
1832 * low/high temperature threshold values passed by the client.
1833 * The function maps the temperature to voltage and applies
1834 * ratiometric calibration on the voltage values for SKUT1 board.
1835 * @dev: Structure device for qpnp vadc
1836 * @param: The input parameters that contain the low/high temperature
1837 * values.
1838 * @low_threshold: The low threshold value that needs to be updated with
1839 * the above calibrated voltage value.
1840 * @high_threshold: The low threshold value that needs to be updated with
1841 * the above calibrated voltage value.
1842 */
1843int32_t qpnp_adc_qrd_skut1_btm_scaler(struct qpnp_vadc_chip *dev,
1844 struct qpnp_adc_tm_btm_param *param,
1845 uint32_t *low_threshold, uint32_t *high_threshold);
1846/**
1847 * qpnp_adc_tm_scale_therm_voltage_pu2() - Performs reverse calibration
1848 * and convert given temperature to voltage on supported
1849 * thermistor channels using 100k pull-up.
1850 * @dev: Structure device for qpnp vadc
1851 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
1852 * reference voltage.
1853 * @param: The input temperature values.
1854 */
1855int32_t qpnp_adc_tm_scale_therm_voltage_pu2(struct qpnp_vadc_chip *dev,
1856 const struct qpnp_adc_properties *adc_properties,
1857 struct qpnp_adc_tm_config *param);
1858/**
1859 * qpnp_adc_tm_scale_therm_voltage_pu2() - Performs reverse calibration
1860 * and converts the given ADC code to temperature for
1861 * thermistor channels using 100k pull-up.
1862 * @dev: Structure device for qpnp vadc
1863 * @adc_prop: adc properties of the qpnp adc such as bit resolution,
1864 * reference voltage.
1865 * @reg: The input ADC code.
1866 * @result: The physical measurement temperature on the thermistor.
1867 */
1868int32_t qpnp_adc_tm_scale_voltage_therm_pu2(struct qpnp_vadc_chip *dev,
1869 const struct qpnp_adc_properties *adc_prop,
1870 uint32_t reg, int64_t *result);
1871/**
1872 * qpnp_adc_usb_scaler() - Performs reverse calibration on the low/high
1873 * voltage threshold values passed by the client.
1874 * The function applies ratiometric calibration on the
1875 * voltage values.
1876 * @dev: Structure device for qpnp vadc
1877 * @param: The input parameters that contain the low/high voltage
1878 * threshold values.
1879 * @low_threshold: The low threshold value that needs to be updated with
1880 * the above calibrated voltage value.
1881 * @high_threshold: The low threshold value that needs to be updated with
1882 * the above calibrated voltage value.
1883 */
1884int32_t qpnp_adc_usb_scaler(struct qpnp_vadc_chip *dev,
1885 struct qpnp_adc_tm_btm_param *param,
1886 uint32_t *low_threshold, uint32_t *high_threshold);
1887/**
1888 * qpnp_adc_vbatt_rscaler() - Performs reverse calibration on the low/high
1889 * voltage threshold values passed by the client.
1890 * The function applies ratiometric calibration on the
1891 * voltage values.
1892 * @dev: Structure device for qpnp vadc
1893 * @param: The input parameters that contain the low/high voltage
1894 * threshold values.
1895 * @low_threshold: The low threshold value that needs to be updated with
1896 * the above calibrated voltage value.
1897 * @high_threshold: The low threshold value that needs to be updated with
1898 * the above calibrated voltage value.
1899 */
1900int32_t qpnp_adc_vbatt_rscaler(struct qpnp_vadc_chip *dev,
1901 struct qpnp_adc_tm_btm_param *param,
1902 uint32_t *low_threshold, uint32_t *high_threshold);
1903/**
1904 * qpnp_vadc_absolute_rthr() - Performs reverse calibration on the low/high
1905 * voltage threshold values passed by the client.
1906 * The function applies absolute calibration on the
1907 * voltage values.
1908 * @dev: Structure device for qpnp vadc
1909 * @chan_prop: Individual channel properties to compensate the i/p scaling,
1910 * slope and offset.
1911 * @param: The input parameters that contain the low/high voltage
1912 * threshold values.
1913 * @low_threshold: The low threshold value that needs to be updated with
1914 * the above calibrated voltage value.
1915 * @high_threshold: The low threshold value that needs to be updated with
1916 * the above calibrated voltage value.
1917 */
1918int32_t qpnp_vadc_absolute_rthr(struct qpnp_vadc_chip *dev,
1919 const struct qpnp_vadc_chan_properties *chan_prop,
1920 struct qpnp_adc_tm_btm_param *param,
1921 uint32_t *low_threshold, uint32_t *high_threshold);
1922/**
1923 * qpnp_adc_absolute_rthr() - Performs reverse calibration on the low/high
1924 * voltage threshold values passed by the client.
1925 * The function applies absolute calibration on the
1926 * voltage values.
1927 * @dev: Structure device for qpnp vadc
1928 * @param: The input parameters that contain the low/high voltage
1929 * threshold values.
1930 * @low_threshold: The low threshold value that needs to be updated with
1931 * the above calibrated voltage value.
1932 * @high_threshold: The low threshold value that needs to be updated with
1933 * the above calibrated voltage value.
1934 */
1935int32_t qpnp_adc_absolute_rthr(struct qpnp_vadc_chip *dev,
1936 struct qpnp_adc_tm_btm_param *param,
1937 uint32_t *low_threshold, uint32_t *high_threshold);
1938/**
1939 * qpnp_adc_smb_btm_rscaler() - Performs reverse calibration on the low/high
1940 * temperature threshold values passed by the client.
1941 * The function maps the temperature to voltage and applies
1942 * ratiometric calibration on the voltage values.
1943 * @dev: Structure device for qpnp vadc
1944 * @param: The input parameters that contain the low/high temperature
1945 * values.
1946 * @low_threshold: The low threshold value that needs to be updated with
1947 * the above calibrated voltage value.
1948 * @high_threshold: The low threshold value that needs to be updated with
1949 * the above calibrated voltage value.
1950 */
1951int32_t qpnp_adc_smb_btm_rscaler(struct qpnp_vadc_chip *dev,
1952 struct qpnp_adc_tm_btm_param *param,
1953 uint32_t *low_threshold, uint32_t *high_threshold);
1954/**
1955 * qpnp_vadc_iadc_sync_request() - Performs Voltage ADC read and
1956 * locks the peripheral. When performing simultaneous
1957 * voltage and current request the VADC peripheral is
1958 * prepared for conversion and the IADC sync conversion
1959 * is done from the IADC peripheral.
1960 * @dev: Structure device for qpnp vadc
1961 * @channel: Input channel to perform the voltage ADC read.
1962 */
1963int32_t qpnp_vadc_iadc_sync_request(struct qpnp_vadc_chip *dev,
1964 enum qpnp_vadc_channels channel);
1965/**
1966 * qpnp_vadc_iadc_sync_complete_request() - Reads the ADC result and
1967 * unlocks the peripheral.
1968 * @dev: Structure device for qpnp vadc
1969 * @result: Structure pointer of type adc_chan_result
1970 * in which the ADC read results are stored.
1971 */
1972int32_t qpnp_vadc_iadc_sync_complete_request(struct qpnp_vadc_chip *dev,
1973 enum qpnp_vadc_channels channel, struct qpnp_vadc_result *result);
1974/**
1975 * qpnp_vadc_sns_comp_result() - Compensate vbatt readings based on temperature
1976 * @dev: Structure device for qpnp vadc
1977 * @result: Voltage in uV that needs compensation.
1978 * @is_pon_ocv: Whether the reading is from a power on OCV or not
1979 */
1980int32_t qpnp_vbat_sns_comp_result(struct qpnp_vadc_chip *dev,
1981 int64_t *result, bool is_pon_ocv);
1982/**
1983 * qpnp_adc_get_revid_version() - Obtain the PMIC number and revision.
1984 * @dev: Structure device node.
1985 * returns internal mapped PMIC number and revision id.
1986 */
1987int qpnp_adc_get_revid_version(struct device *dev);
1988/**
1989 * qpnp_vadc_channel_monitor() - Configures kernel clients a channel to
1990 * monitor the corresponding ADC channel for threshold detection.
1991 * Driver passes the high/low voltage threshold along
1992 * with the notification callback once the set thresholds
1993 * are crossed.
1994 * @param: Structure pointer of qpnp_adc_tm_btm_param type.
1995 * Clients pass the low/high temperature along with the threshold
1996 * notification callback.
1997 */
1998int32_t qpnp_vadc_channel_monitor(struct qpnp_vadc_chip *chip,
1999 struct qpnp_adc_tm_btm_param *param);
2000/**
2001 * qpnp_vadc_end_channel_monitor() - Disables recurring measurement mode for
2002 * VADC_USR and disables the bank.
2003 * @param: device instance for the VADC
2004 */
2005int32_t qpnp_vadc_end_channel_monitor(struct qpnp_vadc_chip *chip);
2006/**
2007 * qpnp_vadc_calib_vref() - Read calibration channel REF_125V/VDD_VADC
2008 * @dev: Structure device for qpnp vadc
2009 * @calib_type: absolute or ratiometric calib type.
2010 * returns calibration channel adc code.
2011 */
2012int32_t qpnp_vadc_calib_vref(struct qpnp_vadc_chip *vadc,
2013 enum qpnp_adc_calib_type calib_type,
2014 int *calib_data);
2015/**
2016 * qpnp_vadc_calib_gnd() - Read calibration channel REF_625MV/GND_REF
2017 * @dev: Structure device for qpnp vadc
2018 * @calib_type: absolute or ratiometric calib type.
2019 * returns calibration channel adc code.
2020 */
2021int32_t qpnp_vadc_calib_gnd(struct qpnp_vadc_chip *vadc,
2022 enum qpnp_adc_calib_type calib_type,
2023 int *calib_data);
2024
2025/**
2026 * qpnp_adc_enable_voltage() - Enable LDO for HKADC
2027 * @dev: Structure device for qpnp vadc
2028 * returns result of enabling the regulator interface.
2029 */
2030int32_t qpnp_adc_enable_voltage(struct qpnp_adc_drv *adc);
2031
2032/**
2033 * qpnp_adc_disable_voltage() - Disable vote for HKADC LDO
2034 * @dev: Structure device for qpnp vadc
2035 */
2036void qpnp_adc_disable_voltage(struct qpnp_adc_drv *adc);
2037
2038/**
2039 * qpnp_adc_free_voltage_resource() - Puts HKADC LDO
2040 * @dev: Structure device for qpnp vadc
2041 */
2042void qpnp_adc_free_voltage_resource(struct qpnp_adc_drv *adc);
2043
2044#else
2045static inline int32_t qpnp_vadc_read(struct qpnp_vadc_chip *dev,
2046 uint32_t channel,
2047 struct qpnp_vadc_result *result)
2048{ return -ENXIO; }
2049static inline int32_t qpnp_vadc_hc_read(struct qpnp_vadc_chip *dev,
2050 uint32_t channel,
2051 struct qpnp_vadc_result *result)
2052{ return -ENXIO; }
2053static inline int32_t qpnp_vadc_conv_seq_request(struct qpnp_vadc_chip *dev,
2054 enum qpnp_vadc_trigger trigger_channel,
2055 enum qpnp_vadc_channels channel,
2056 struct qpnp_vadc_result *result)
2057{ return -ENXIO; }
2058static inline int32_t qpnp_adc_scale_default(struct qpnp_vadc_chip *vadc,
2059 int32_t adc_code,
2060 const struct qpnp_adc_properties *adc_prop,
2061 const struct qpnp_vadc_chan_properties *chan_prop,
2062 struct qpnp_vadc_result *chan_rslt)
2063{ return -ENXIO; }
Jishnu Prakash3b3fe942018-01-08 12:23:39 +05302064static inline int32_t qpnp_iadc_scale_default(struct qpnp_vadc_chip *vadc,
2065 int32_t adc_code,
2066 const struct qpnp_adc_properties *adc_prop,
2067 const struct qpnp_vadc_chan_properties *chan_prop,
2068 struct qpnp_vadc_result *chan_rslt)
2069{ return -ENXIO; }
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08002070static inline int32_t qpnp_adc_scale_pmic_therm(struct qpnp_vadc_chip *vadc,
2071 int32_t adc_code,
2072 const struct qpnp_adc_properties *adc_prop,
2073 const struct qpnp_vadc_chan_properties *chan_prop,
2074 struct qpnp_vadc_result *chan_rslt)
2075{ return -ENXIO; }
2076static inline int32_t qpnp_adc_scale_pmi_chg_temp(struct qpnp_vadc_chip *vadc,
2077 int32_t adc_code,
2078 const struct qpnp_adc_properties *adc_prop,
2079 const struct qpnp_vadc_chan_properties *chan_prop,
2080 struct qpnp_vadc_result *chan_rslt)
2081{ return -ENXIO; }
Jishnu Prakash3b3fe942018-01-08 12:23:39 +05302082static inline int32_t qpnp_adc_batt_therm(struct qpnp_vadc_chip *vadc,
2083 int32_t adc_code,
2084 const struct qpnp_adc_properties *adc_prop,
2085 const struct qpnp_vadc_chan_properties *chan_prop,
2086 struct qpnp_vadc_result *chan_rslt)
2087{ return -ENXIO; }
Jishnu Prakash20343d42018-02-12 14:53:33 +05302088static inline int32_t qpnp_adc_batt_therm_qrd(struct qpnp_vadc_chip *vadc,
2089 int32_t adc_code,
2090 const struct qpnp_adc_properties *adc_prop,
2091 const struct qpnp_vadc_chan_properties *chan_prop,
2092 struct qpnp_vadc_result *chan_rslt)
2093{ return -ENXIO; }
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08002094static inline int32_t qpnp_adc_scale_batt_therm(struct qpnp_vadc_chip *vadc,
2095 int32_t adc_code,
2096 const struct qpnp_adc_properties *adc_prop,
2097 const struct qpnp_vadc_chan_properties *chan_prop,
2098 struct qpnp_vadc_result *chan_rslt)
2099{ return -ENXIO; }
Jishnu Prakash3b3fe942018-01-08 12:23:39 +05302100static inline int32_t qpnp_adc_scale_chrg_temp(struct qpnp_vadc_chip *vadc,
2101 int32_t adc_code,
2102 const struct qpnp_adc_properties *adc_prop,
2103 const struct qpnp_vadc_chan_properties *chan_prop,
2104 struct qpnp_vadc_result *chan_rslt)
2105{ return -ENXIO; }
2106static inline int32_t qpnp_adc_scale_die_temp(struct qpnp_vadc_chip *vadc,
2107 int32_t adc_code,
2108 const struct qpnp_adc_properties *adc_prop,
2109 const struct qpnp_vadc_chan_properties *chan_prop,
2110 struct qpnp_vadc_result *chan_rslt)
2111{ return -ENXIO; }
2112static inline int32_t qpnp_adc_scale_usbin_curr(struct qpnp_vadc_chip *vadc,
2113 int32_t adc_code,
2114 const struct qpnp_adc_properties *adc_prop,
2115 const struct qpnp_vadc_chan_properties *chan_prop,
2116 struct qpnp_vadc_result *chan_rslt)
2117{ return -ENXIO; }
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08002118static inline int32_t qpnp_adc_scale_qrd_batt_therm(
2119 struct qpnp_vadc_chip *vadc, int32_t adc_code,
2120 const struct qpnp_adc_properties *adc_prop,
2121 const struct qpnp_vadc_chan_properties *chan_prop,
2122 struct qpnp_vadc_result *chan_rslt)
2123{ return -ENXIO; }
2124static inline int32_t qpnp_adc_scale_qrd_skuaa_batt_therm(
2125 struct qpnp_vadc_chip *vadc, int32_t adc_code,
2126 const struct qpnp_adc_properties *adc_prop,
2127 const struct qpnp_vadc_chan_properties *chan_prop,
2128 struct qpnp_vadc_result *chan_rslt)
2129{ return -ENXIO; }
2130static inline int32_t qpnp_adc_scale_qrd_skug_batt_therm(
2131 struct qpnp_vadc_chip *vadc, int32_t adc_code,
2132 const struct qpnp_adc_properties *adc_prop,
2133 const struct qpnp_vadc_chan_properties *chan_prop,
2134 struct qpnp_vadc_result *chan_rslt)
2135{ return -ENXIO; }
2136static inline int32_t qpnp_adc_scale_qrd_skuh_batt_therm(
2137 struct qpnp_vadc_chip *vdev, int32_t adc_code,
2138 const struct qpnp_adc_properties *adc_prop,
2139 const struct qpnp_vadc_chan_properties *chan_prop,
2140 struct qpnp_vadc_result *chan_rslt)
2141{ return -ENXIO; }
2142static inline int32_t qpnp_adc_scale_qrd_skut1_batt_therm(
2143 struct qpnp_vadc_chip *vdev, int32_t adc_code,
2144 const struct qpnp_adc_properties *adc_prop,
2145 const struct qpnp_vadc_chan_properties *chan_prop,
2146 struct qpnp_vadc_result *chan_rslt)
2147{ return -ENXIO; }
2148static inline int32_t qpnp_adc_scale_smb_batt_therm(struct qpnp_vadc_chip *vadc,
2149 int32_t adc_code,
2150 const struct qpnp_adc_properties *adc_prop,
2151 const struct qpnp_vadc_chan_properties *chan_prop,
2152 struct qpnp_vadc_result *chan_rslt)
2153{ return -ENXIO; }
2154static inline int32_t qpnp_adc_scale_batt_id(struct qpnp_vadc_chip *vadc,
2155 int32_t adc_code,
2156 const struct qpnp_adc_properties *adc_prop,
2157 const struct qpnp_vadc_chan_properties *chan_prop,
2158 struct qpnp_vadc_result *chan_rslt)
2159{ return -ENXIO; }
2160static inline int32_t qpnp_adc_tdkntcg_therm(struct qpnp_vadc_chip *vadc,
2161 int32_t adc_code,
2162 const struct qpnp_adc_properties *adc_prop,
2163 const struct qpnp_vadc_chan_properties *chan_prop,
2164 struct qpnp_vadc_result *chan_rslt)
2165{ return -ENXIO; }
2166static inline int32_t qpnp_adc_scale_therm_pu1(struct qpnp_vadc_chip *vadc,
2167 int32_t adc_code,
2168 const struct qpnp_adc_properties *adc_prop,
2169 const struct qpnp_vadc_chan_properties *chan_prop,
2170 struct qpnp_vadc_result *chan_rslt)
2171{ return -ENXIO; }
2172static inline int32_t qpnp_adc_scale_therm_pu2(struct qpnp_vadc_chip *vadc,
2173 int32_t adc_code,
2174 const struct qpnp_adc_properties *adc_prop,
2175 const struct qpnp_vadc_chan_properties *chan_prop,
2176 struct qpnp_vadc_result *chan_rslt)
2177{ return -ENXIO; }
2178static inline int32_t qpnp_adc_scale_therm_ncp03(struct qpnp_vadc_chip *vadc,
2179 int32_t adc_code,
2180 const struct qpnp_adc_properties *adc_prop,
2181 const struct qpnp_vadc_chan_properties *chan_prop,
2182 struct qpnp_vadc_result *chan_rslt)
2183{ return -ENXIO; }
Jishnu Prakash62aff112017-09-15 15:06:59 +05302184static inline int32_t qpnp_adc_scale_die_temp_1390(struct qpnp_vadc_chip *vadc,
2185 int32_t adc_code,
2186 const struct qpnp_adc_properties *adc_prop,
2187 const struct qpnp_vadc_chan_properties *chan_prop,
2188 struct qpnp_vadc_result *chan_rslt)
2189{ return -ENXIO; }
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08002190static inline struct qpnp_vadc_chip *qpnp_get_vadc(struct device *dev,
2191 const char *name)
2192{ return ERR_PTR(-ENXIO); }
2193static inline int32_t qpnp_get_vadc_gain_and_offset(struct qpnp_vadc_chip *dev,
2194 struct qpnp_vadc_linear_graph *param,
2195 enum qpnp_adc_calib_type calib_type)
2196{ return -ENXIO; }
2197static inline int32_t qpnp_adc_usb_scaler(struct qpnp_vadc_chip *dev,
2198 struct qpnp_adc_tm_btm_param *param,
2199 uint32_t *low_threshold, uint32_t *high_threshold)
2200{ return -ENXIO; }
2201static inline int32_t qpnp_adc_vbatt_rscaler(struct qpnp_vadc_chip *dev,
2202 struct qpnp_adc_tm_btm_param *param,
2203 uint32_t *low_threshold, uint32_t *high_threshold)
2204{ return -ENXIO; }
2205static inline int32_t qpnp_vadc_absolute_rthr(struct qpnp_vadc_chip *dev,
2206 const struct qpnp_vadc_chan_properties *chan_prop,
2207 struct qpnp_adc_tm_btm_param *param,
2208 uint32_t *low_threshold, uint32_t *high_threshold)
2209{ return -ENXIO; }
2210static inline int32_t qpnp_adc_absolute_rthr(struct qpnp_vadc_chip *dev,
2211 struct qpnp_adc_tm_btm_param *param,
2212 uint32_t *low_threshold, uint32_t *high_threshold)
2213{ return -ENXIO; }
2214static inline int32_t qpnp_adc_btm_scaler(struct qpnp_vadc_chip *dev,
2215 struct qpnp_adc_tm_btm_param *param,
2216 uint32_t *low_threshold, uint32_t *high_threshold)
2217{ return -ENXIO; }
2218static inline int32_t qpnp_adc_qrd_skuh_btm_scaler(struct qpnp_vadc_chip *dev,
2219 struct qpnp_adc_tm_btm_param *param,
2220 uint32_t *low_threshold, uint32_t *high_threshold)
2221{ return -ENXIO; }
2222static inline int32_t qpnp_adc_qrd_skut1_btm_scaler(struct qpnp_vadc_chip *dev,
2223 struct qpnp_adc_tm_btm_param *param,
2224 uint32_t *low_threshold, uint32_t *high_threshold)
2225{ return -ENXIO; }
2226static inline int32_t qpnp_adc_scale_millidegc_pmic_voltage_thr(
2227 struct qpnp_vadc_chip *dev,
2228 struct qpnp_adc_tm_btm_param *param,
2229 uint32_t *low_threshold, uint32_t *high_threshold)
2230{ return -ENXIO; }
2231static inline int32_t qpnp_adc_tm_scale_therm_voltage_pu2(
2232 struct qpnp_vadc_chip *dev,
2233 const struct qpnp_adc_properties *adc_properties,
2234 struct qpnp_adc_tm_config *param)
2235{ return -ENXIO; }
2236static inline int32_t qpnp_adc_tm_scale_voltage_therm_pu2(
2237 struct qpnp_vadc_chip *dev,
2238 const struct qpnp_adc_properties *adc_prop,
2239 uint32_t reg, int64_t *result)
2240{ return -ENXIO; }
2241static inline int32_t qpnp_adc_smb_btm_rscaler(struct qpnp_vadc_chip *dev,
2242 struct qpnp_adc_tm_btm_param *param,
2243 uint32_t *low_threshold, uint32_t *high_threshold)
2244{ return -ENXIO; }
2245static inline int32_t qpnp_vadc_iadc_sync_request(struct qpnp_vadc_chip *dev,
2246 enum qpnp_vadc_channels channel)
2247{ return -ENXIO; }
2248static inline int32_t qpnp_vadc_iadc_sync_complete_request(
2249 struct qpnp_vadc_chip *dev,
2250 enum qpnp_vadc_channels channel,
2251 struct qpnp_vadc_result *result)
2252{ return -ENXIO; }
2253static inline int32_t qpnp_vbat_sns_comp_result(struct qpnp_vadc_chip *dev,
2254 int64_t *result)
2255{ return -ENXIO; }
2256static inline int qpnp_adc_get_revid_version(struct device *dev)
2257{ return -ENXIO; }
2258static inline int32_t qpnp_vadc_channel_monitor(struct qpnp_vadc_chip *chip,
2259 struct qpnp_adc_tm_btm_param *param)
2260{ return -ENXIO; }
2261static inline int32_t qpnp_vadc_end_channel_monitor(struct qpnp_vadc_chip *chip)
2262{ return -ENXIO; }
2263static inline int32_t qpnp_vadc_calib_vref(struct qpnp_vadc_chip *vadc,
2264 enum qpnp_adc_calib_type calib_type,
2265 int *calib_data)
2266{ return -ENXIO; }
2267static inline int32_t qpnp_vadc_calib_gnd(struct qpnp_vadc_chip *vadc,
2268 enum qpnp_adc_calib_type calib_type,
2269 int *calib_data)
2270{ return -ENXIO; }
2271
2272static inline int32_t qpnp_adc_enable_voltage(struct qpnp_adc_drv *adc)
2273{ return -ENXIO; }
2274
2275static inline void qpnp_adc_disable_voltage(struct qpnp_adc_drv *adc)
2276{ return; }
2277
2278static inline void qpnp_adc_free_voltage_resource(struct qpnp_adc_drv *adc)
2279{ return; }
2280
2281static inline int32_t qpnp_adc_get_devicetree_data(
2282 struct platform_device *pdev, struct qpnp_adc_drv *adc_qpnp)
2283{ return -ENXIO; }
2284
2285#endif
2286
2287/* Public API */
2288#if defined(CONFIG_SENSORS_QPNP_ADC_CURRENT) \
2289 || defined(CONFIG_SENSORS_QPNP_ADC_CURRENT_MODULE)
2290/**
2291 * qpnp_iadc_read() - Performs ADC read on the current channel.
2292 * @dev: Structure device for qpnp iadc
2293 * @channel: Input channel to perform the ADC read.
2294 * @result: Current across rsense in mA.
2295 * @return: 0 on success.
2296 */
2297int32_t qpnp_iadc_read(struct qpnp_iadc_chip *dev,
2298 enum qpnp_iadc_channels channel,
2299 struct qpnp_iadc_result *result);
2300/**
2301 * qpnp_iadc_get_rsense() - Reads the RDS resistance value from the
2302 trim registers.
2303 * @dev: Structure device for qpnp iadc
2304 * @rsense: RDS resistance in nOhms.
2305 * @return: 0 on success.
2306 */
2307int32_t qpnp_iadc_get_rsense(struct qpnp_iadc_chip *dev, int32_t *rsense);
2308/**
2309 * qpnp_iadc_get_gain_and_offset() - Performs gain calibration
2310 * over 17.8571mV and offset over selected
2311 * channel. Channel can be internal rsense,
2312 * external rsense and alternate lead pair.
2313 * @dev: Structure device for qpnp iadc
2314 * @result: result structure where the gain and offset is stored of
2315 * type qpnp_iadc_calib.
2316 * @return: 0 on success.
2317 */
2318int32_t qpnp_iadc_get_gain_and_offset(struct qpnp_iadc_chip *dev,
2319 struct qpnp_iadc_calib *result);
2320/**
2321 * qpnp_get_iadc() - Clients need to register with the iadc with the
2322 * corresponding device instance it wants to read the channels.
2323 * Read the bindings document on how to pass the phandle for
2324 * the corresponding vadc driver to register with.
2325 * @dev: Clients device structure
2326 * @name: Corresponding client's DT parser name. Read the DT bindings
2327 * document on how to register with the iadc
2328 * @struct qpnp_iadc_chip * - On success returns the iadc device structure
2329 * pointer used everytime client makes an ADC request.
2330 */
2331struct qpnp_iadc_chip *qpnp_get_iadc(struct device *dev, const char *name);
2332/**
2333 * qpnp_iadc_vadc_sync_read() - Performs synchronous VADC and IADC read.
2334 * The api is to be used only by the BMS to perform
2335 * simultaneous VADC and IADC measurement for battery voltage
2336 * and current.
2337 * @dev: Structure device for qpnp iadc
2338 * @i_channel: Input battery current channel to perform the IADC read.
2339 * @i_result: Current across the rsense in mA.
2340 * @v_channel: Input battery voltage channel to perform VADC read.
2341 * @v_result: Voltage on the vbatt channel with units in mV.
2342 * @return: 0 on success.
2343 */
2344int32_t qpnp_iadc_vadc_sync_read(struct qpnp_iadc_chip *dev,
2345 enum qpnp_iadc_channels i_channel, struct qpnp_iadc_result *i_result,
2346 enum qpnp_vadc_channels v_channel, struct qpnp_vadc_result *v_result);
2347/**
2348 * qpnp_iadc_calibrate_for_trim - Clients can use this API to re-calibrate
2349 * IADC. The offset and gain values are programmed in the trim
2350 * registers. The offset and the gain can be retrieved using
2351 * qpnp_iadc_get_gain_and_offset
2352 * @dev: Structure device for qpnp iadc
2353 * @batfet_closed: batfet is opened or closed. The IADC chooses proper
2354 * channel (internal/external) based on batfet status
2355 * for calibration.
2356 * RETURNS: 0 on success.
2357 */
2358int32_t qpnp_iadc_calibrate_for_trim(struct qpnp_iadc_chip *dev,
2359 bool batfet_closed);
2360/**
2361 * qpnp_iadc_comp_result() - Compensates the result of the current based on
2362 * the gain and offset co-effients and rsense parameters.
2363 * @dev: Structure device for qpnp iadc
2364 * @result: Current value to perform the compensation.
2365 * @return: 0 on success.
2366 */
2367int32_t qpnp_iadc_comp_result(struct qpnp_iadc_chip *dev, int64_t *result);
2368/**
2369 * qpnp_iadc_skip_calibration() - Clients can use this API to ask the driver
2370 * to skip iadc calibrations
2371 * @dev: Structure device for qpnp iadc
2372 * @result: 0 on success and -EPROBE_DEFER when probe for the device
2373 * has not occurred.
2374 */
2375int qpnp_iadc_skip_calibration(struct qpnp_iadc_chip *dev);
2376/**
2377 * qpnp_iadc_resume_calibration() - Clients can use this API to ask the driver
2378 * to resume iadc calibrations
2379 * @dev: Structure device for qpnp iadc
2380 * @result: 0 on success and -EPROBE_DEFER when probe for the device
2381 * has not occurred.
2382 */
2383int qpnp_iadc_resume_calibration(struct qpnp_iadc_chip *dev);
2384#else
2385static inline int32_t qpnp_iadc_read(struct qpnp_iadc_chip *iadc,
2386 enum qpnp_iadc_channels channel, struct qpnp_iadc_result *result)
2387{ return -ENXIO; }
2388static inline int32_t qpnp_iadc_get_rsense(struct qpnp_iadc_chip *iadc,
2389 int32_t *rsense)
2390{ return -ENXIO; }
2391static inline int32_t qpnp_iadc_get_gain_and_offset(struct qpnp_iadc_chip *iadc,
2392 struct qpnp_iadc_calib *result)
2393{ return -ENXIO; }
2394static inline struct qpnp_iadc_chip *qpnp_get_iadc(struct device *dev,
2395 const char *name)
2396{ return ERR_PTR(-ENXIO); }
2397static inline int32_t qpnp_iadc_vadc_sync_read(struct qpnp_iadc_chip *iadc,
2398 enum qpnp_iadc_channels i_channel, struct qpnp_iadc_result *i_result,
2399 enum qpnp_vadc_channels v_channel, struct qpnp_vadc_result *v_result)
2400{ return -ENXIO; }
2401static inline int32_t qpnp_iadc_calibrate_for_trim(struct qpnp_iadc_chip *iadc,
2402 bool batfet_closed)
2403{ return -ENXIO; }
2404static inline int32_t qpnp_iadc_comp_result(struct qpnp_iadc_chip *iadc,
2405 int64_t *result)
2406{ return -ENXIO; }
2407static inline int qpnp_iadc_skip_calibration(struct qpnp_iadc_chip *iadc)
2408{ return -ENXIO; }
2409static inline int qpnp_iadc_resume_calibration(struct qpnp_iadc_chip *iadc)
2410{ return -ENXIO; }
2411#endif
2412
2413/* Public API */
2414#if defined(CONFIG_THERMAL_QPNP_ADC_TM) \
2415 || defined(CONFIG_THERMAL_QPNP_ADC_TM_MODULE)
2416/**
Siddartha Mohanadoss37d9c8a2017-01-23 19:21:58 -08002417 * qpnp_adc_tm_channel_measure() - Configures kernel clients a channel to
2418 * monitor the corresponding ADC channel for threshold detection.
2419 * Driver passes the high/low voltage threshold along
2420 * with the notification callback once the set thresholds
2421 * are crossed.
2422 * @param: Structure pointer of qpnp_adc_tm_btm_param type.
2423 * Clients pass the low/high temperature along with the threshold
2424 * notification callback.
2425 */
2426int32_t qpnp_adc_tm_channel_measure(struct qpnp_adc_tm_chip *chip,
2427 struct qpnp_adc_tm_btm_param *param);
2428/**
2429 * qpnp_adc_tm_disable_chan_meas() - Disables the monitoring of channel thats
2430 * assigned for monitoring kernel clients. Disables the low/high
2431 * threshold activation for the corresponding channel.
2432 * @param: Structure pointer of qpnp_adc_tm_btm_param type.
2433 * This is used to identify the channel for which the corresponding
2434 * channels high/low threshold notification will be disabled.
2435 */
2436int32_t qpnp_adc_tm_disable_chan_meas(struct qpnp_adc_tm_chip *chip,
2437 struct qpnp_adc_tm_btm_param *param);
2438/**
2439 * qpnp_get_adc_tm() - Clients need to register with the adc_tm using the
2440 * corresponding device instance it wants to read the channels
2441 * from. Read the bindings document on how to pass the phandle
2442 * for the corresponding adc_tm driver to register with.
2443 * @name: Corresponding client's DT parser name. Read the DT bindings
2444 * document on how to register with the vadc
2445 * @struct qpnp_adc_tm_chip * - On success returns the vadc device structure
2446 * pointer that needs to be used during an ADC TM request.
2447 */
2448struct qpnp_adc_tm_chip *qpnp_get_adc_tm(struct device *dev, const char *name);
2449#else
2450static inline int32_t qpnp_adc_tm_usbid_configure(
2451 struct qpnp_adc_tm_chip *chip,
2452 struct qpnp_adc_tm_btm_param *param)
2453{ return -ENXIO; }
2454static inline int32_t qpnp_adc_tm_usbid_end(struct qpnp_adc_tm_chip *chip)
2455{ return -ENXIO; }
2456static inline int32_t qpnp_adc_tm_channel_measure(
2457 struct qpnp_adc_tm_chip *chip,
2458 struct qpnp_adc_tm_btm_param *param)
2459{ return -ENXIO; }
2460static inline int32_t qpnp_adc_tm_disable_chan_meas(
2461 struct qpnp_adc_tm_chip *chip,
2462 struct qpnp_adc_tm_btm_param *param)
2463{ return -ENXIO; }
2464static inline struct qpnp_adc_tm_chip *qpnp_get_adc_tm(struct device *dev,
2465 const char *name)
2466{ return ERR_PTR(-ENXIO); }
2467#endif
2468
2469#endif