Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 1 | /* |
| 2 | * omap-mcbsp.c -- OMAP ALSA SoC DAI driver using McBSP port |
| 3 | * |
| 4 | * Copyright (C) 2008 Nokia Corporation |
| 5 | * |
| 6 | * Contact: Jarkko Nikula <jarkko.nikula@nokia.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * version 2 as published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, but |
| 13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 15 | * General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 20 | * 02110-1301 USA |
| 21 | * |
| 22 | */ |
| 23 | |
| 24 | #include <linux/init.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/device.h> |
| 27 | #include <sound/core.h> |
| 28 | #include <sound/pcm.h> |
| 29 | #include <sound/pcm_params.h> |
| 30 | #include <sound/initval.h> |
| 31 | #include <sound/soc.h> |
| 32 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 33 | #include <mach/control.h> |
| 34 | #include <mach/dma.h> |
| 35 | #include <mach/mcbsp.h> |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 36 | #include "omap-mcbsp.h" |
| 37 | #include "omap-pcm.h" |
| 38 | |
Jarkko Nikula | 0b60485 | 2008-11-12 17:05:51 +0200 | [diff] [blame] | 39 | #define OMAP_MCBSP_RATES (SNDRV_PCM_RATE_8000_96000) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 40 | |
| 41 | struct omap_mcbsp_data { |
| 42 | unsigned int bus_id; |
| 43 | struct omap_mcbsp_reg_cfg regs; |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 44 | unsigned int fmt; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 45 | /* |
| 46 | * Flags indicating is the bus already activated and configured by |
| 47 | * another substream |
| 48 | */ |
| 49 | int active; |
| 50 | int configured; |
| 51 | }; |
| 52 | |
| 53 | #define to_mcbsp(priv) container_of((priv), struct omap_mcbsp_data, bus_id) |
| 54 | |
| 55 | static struct omap_mcbsp_data mcbsp_data[NUM_LINKS]; |
| 56 | |
| 57 | /* |
| 58 | * Stream DMA parameters. DMA request line and port address are set runtime |
| 59 | * since they are different between OMAP1 and later OMAPs |
| 60 | */ |
Jarkko Nikula | 2e89713 | 2008-10-09 15:57:21 +0300 | [diff] [blame] | 61 | static struct omap_pcm_dma_data omap_mcbsp_dai_dma_params[NUM_LINKS][2]; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 62 | |
| 63 | #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) |
| 64 | static const int omap1_dma_reqs[][2] = { |
| 65 | { OMAP_DMA_MCBSP1_TX, OMAP_DMA_MCBSP1_RX }, |
| 66 | { OMAP_DMA_MCBSP2_TX, OMAP_DMA_MCBSP2_RX }, |
| 67 | { OMAP_DMA_MCBSP3_TX, OMAP_DMA_MCBSP3_RX }, |
| 68 | }; |
| 69 | static const unsigned long omap1_mcbsp_port[][2] = { |
| 70 | { OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, |
| 71 | OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 }, |
| 72 | { OMAP1510_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1, |
| 73 | OMAP1510_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1 }, |
| 74 | { OMAP1510_MCBSP3_BASE + OMAP_MCBSP_REG_DXR1, |
| 75 | OMAP1510_MCBSP3_BASE + OMAP_MCBSP_REG_DRR1 }, |
| 76 | }; |
| 77 | #else |
| 78 | static const int omap1_dma_reqs[][2] = {}; |
| 79 | static const unsigned long omap1_mcbsp_port[][2] = {}; |
| 80 | #endif |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 81 | |
| 82 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
| 83 | static const int omap24xx_dma_reqs[][2] = { |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 84 | { OMAP24XX_DMA_MCBSP1_TX, OMAP24XX_DMA_MCBSP1_RX }, |
| 85 | { OMAP24XX_DMA_MCBSP2_TX, OMAP24XX_DMA_MCBSP2_RX }, |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 86 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX) |
| 87 | { OMAP24XX_DMA_MCBSP3_TX, OMAP24XX_DMA_MCBSP3_RX }, |
| 88 | { OMAP24XX_DMA_MCBSP4_TX, OMAP24XX_DMA_MCBSP4_RX }, |
| 89 | { OMAP24XX_DMA_MCBSP5_TX, OMAP24XX_DMA_MCBSP5_RX }, |
| 90 | #endif |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 91 | }; |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 92 | #else |
| 93 | static const int omap24xx_dma_reqs[][2] = {}; |
| 94 | #endif |
| 95 | |
| 96 | #if defined(CONFIG_ARCH_OMAP2420) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 97 | static const unsigned long omap2420_mcbsp_port[][2] = { |
| 98 | { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, |
| 99 | OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 }, |
| 100 | { OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1, |
| 101 | OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1 }, |
| 102 | }; |
| 103 | #else |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 104 | static const unsigned long omap2420_mcbsp_port[][2] = {}; |
| 105 | #endif |
| 106 | |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 107 | #if defined(CONFIG_ARCH_OMAP2430) |
| 108 | static const unsigned long omap2430_mcbsp_port[][2] = { |
| 109 | { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, |
| 110 | OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, |
| 111 | { OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, |
| 112 | OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, |
| 113 | { OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, |
| 114 | OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, |
| 115 | { OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, |
| 116 | OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, |
| 117 | { OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DXR, |
| 118 | OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DRR }, |
| 119 | }; |
| 120 | #else |
| 121 | static const unsigned long omap2430_mcbsp_port[][2] = {}; |
| 122 | #endif |
| 123 | |
| 124 | #if defined(CONFIG_ARCH_OMAP34XX) |
| 125 | static const unsigned long omap34xx_mcbsp_port[][2] = { |
| 126 | { OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, |
| 127 | OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, |
| 128 | { OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, |
| 129 | OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, |
| 130 | { OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, |
| 131 | OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, |
| 132 | { OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, |
| 133 | OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, |
| 134 | { OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DXR, |
| 135 | OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DRR }, |
| 136 | }; |
| 137 | #else |
| 138 | static const unsigned long omap34xx_mcbsp_port[][2] = {}; |
| 139 | #endif |
| 140 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 141 | static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, |
| 142 | struct snd_soc_dai *dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 143 | { |
| 144 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 145 | struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 146 | struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); |
| 147 | int err = 0; |
| 148 | |
Jarkko Nikula | 6984992 | 2009-03-27 15:32:01 +0200 | [diff] [blame] | 149 | if (cpu_is_omap343x() && mcbsp_data->bus_id == 1) { |
| 150 | /* |
| 151 | * McBSP2 in OMAP3 has 1024 * 32-bit internal audio buffer. |
| 152 | * Set constraint for minimum buffer size to the same than FIFO |
| 153 | * size in order to avoid underruns in playback startup because |
| 154 | * HW is keeping the DMA request active until FIFO is filled. |
| 155 | */ |
| 156 | snd_pcm_hw_constraint_minmax(substream->runtime, |
| 157 | SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 4096, UINT_MAX); |
| 158 | } |
| 159 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 160 | if (!cpu_dai->active) |
| 161 | err = omap_mcbsp_request(mcbsp_data->bus_id); |
| 162 | |
| 163 | return err; |
| 164 | } |
| 165 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 166 | static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream *substream, |
| 167 | struct snd_soc_dai *dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 168 | { |
| 169 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 170 | struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 171 | struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); |
| 172 | |
| 173 | if (!cpu_dai->active) { |
| 174 | omap_mcbsp_free(mcbsp_data->bus_id); |
| 175 | mcbsp_data->configured = 0; |
| 176 | } |
| 177 | } |
| 178 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 179 | static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd, |
| 180 | struct snd_soc_dai *dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 181 | { |
| 182 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 183 | struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 184 | struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); |
| 185 | int err = 0; |
| 186 | |
| 187 | switch (cmd) { |
| 188 | case SNDRV_PCM_TRIGGER_START: |
| 189 | case SNDRV_PCM_TRIGGER_RESUME: |
| 190 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 191 | if (!mcbsp_data->active++) |
| 192 | omap_mcbsp_start(mcbsp_data->bus_id); |
| 193 | break; |
| 194 | |
| 195 | case SNDRV_PCM_TRIGGER_STOP: |
| 196 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 197 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 198 | if (!--mcbsp_data->active) |
| 199 | omap_mcbsp_stop(mcbsp_data->bus_id); |
| 200 | break; |
| 201 | default: |
| 202 | err = -EINVAL; |
| 203 | } |
| 204 | |
| 205 | return err; |
| 206 | } |
| 207 | |
| 208 | static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 209 | struct snd_pcm_hw_params *params, |
| 210 | struct snd_soc_dai *dai) |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 211 | { |
| 212 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 213 | struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 214 | struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); |
| 215 | struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; |
| 216 | int dma, bus_id = mcbsp_data->bus_id, id = cpu_dai->id; |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 217 | int wlen, channels, wpf; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 218 | unsigned long port; |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 219 | unsigned int format; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 220 | |
| 221 | if (cpu_class_is_omap1()) { |
| 222 | dma = omap1_dma_reqs[bus_id][substream->stream]; |
| 223 | port = omap1_mcbsp_port[bus_id][substream->stream]; |
| 224 | } else if (cpu_is_omap2420()) { |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 225 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 226 | port = omap2420_mcbsp_port[bus_id][substream->stream]; |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 227 | } else if (cpu_is_omap2430()) { |
| 228 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; |
| 229 | port = omap2430_mcbsp_port[bus_id][substream->stream]; |
| 230 | } else if (cpu_is_omap343x()) { |
| 231 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; |
| 232 | port = omap34xx_mcbsp_port[bus_id][substream->stream]; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 233 | } else { |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 234 | return -ENODEV; |
| 235 | } |
Jarkko Nikula | 2e89713 | 2008-10-09 15:57:21 +0300 | [diff] [blame] | 236 | omap_mcbsp_dai_dma_params[id][substream->stream].name = |
| 237 | substream->stream ? "Audio Capture" : "Audio Playback"; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 238 | omap_mcbsp_dai_dma_params[id][substream->stream].dma_req = dma; |
| 239 | omap_mcbsp_dai_dma_params[id][substream->stream].port_addr = port; |
| 240 | cpu_dai->dma_data = &omap_mcbsp_dai_dma_params[id][substream->stream]; |
| 241 | |
| 242 | if (mcbsp_data->configured) { |
| 243 | /* McBSP already configured by another stream */ |
| 244 | return 0; |
| 245 | } |
| 246 | |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 247 | format = mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK; |
| 248 | wpf = channels = params_channels(params); |
Jarkko Nikula | 375e8a7 | 2008-11-25 12:45:09 +0200 | [diff] [blame] | 249 | switch (channels) { |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 250 | case 2: |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 251 | if (format == SND_SOC_DAIFMT_I2S) { |
| 252 | /* Use dual-phase frames */ |
| 253 | regs->rcr2 |= RPHASE; |
| 254 | regs->xcr2 |= XPHASE; |
| 255 | /* Set 1 word per (McBSP) frame for phase1 and phase2 */ |
| 256 | wpf--; |
| 257 | regs->rcr2 |= RFRLEN2(wpf - 1); |
| 258 | regs->xcr2 |= XFRLEN2(wpf - 1); |
| 259 | } |
Jarkko Nikula | 375e8a7 | 2008-11-25 12:45:09 +0200 | [diff] [blame] | 260 | case 1: |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 261 | /* Set word per (McBSP) frame for phase1 */ |
| 262 | regs->rcr1 |= RFRLEN1(wpf - 1); |
| 263 | regs->xcr1 |= XFRLEN1(wpf - 1); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 264 | break; |
| 265 | default: |
| 266 | /* Unsupported number of channels */ |
| 267 | return -EINVAL; |
| 268 | } |
| 269 | |
| 270 | switch (params_format(params)) { |
| 271 | case SNDRV_PCM_FORMAT_S16_LE: |
| 272 | /* Set word lengths */ |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 273 | wlen = 16; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 274 | regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_16); |
| 275 | regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_16); |
| 276 | regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_16); |
| 277 | regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_16); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 278 | break; |
| 279 | default: |
| 280 | /* Unsupported PCM format */ |
| 281 | return -EINVAL; |
| 282 | } |
| 283 | |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 284 | /* Set FS period and length in terms of bit clock periods */ |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 285 | switch (format) { |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 286 | case SND_SOC_DAIFMT_I2S: |
Peter Ujfalusi | c29b206 | 2009-04-15 15:38:55 +0300 | [diff] [blame] | 287 | regs->srgr2 |= FPER(wlen * channels - 1); |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 288 | regs->srgr1 |= FWID(wlen - 1); |
| 289 | break; |
Peter Ujfalusi | 3ba191c | 2009-04-15 15:38:56 +0300 | [diff] [blame^] | 290 | case SND_SOC_DAIFMT_DSP_A: |
Jarkko Nikula | bd25867 | 2008-12-22 10:21:36 +0200 | [diff] [blame] | 291 | case SND_SOC_DAIFMT_DSP_B: |
Jarkko Nikula | 375e8a7 | 2008-11-25 12:45:09 +0200 | [diff] [blame] | 292 | regs->srgr2 |= FPER(wlen * channels - 1); |
| 293 | regs->srgr1 |= FWID(wlen * channels - 2); |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 294 | break; |
| 295 | } |
| 296 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 297 | omap_mcbsp_config(bus_id, &mcbsp_data->regs); |
| 298 | mcbsp_data->configured = 1; |
| 299 | |
| 300 | return 0; |
| 301 | } |
| 302 | |
| 303 | /* |
| 304 | * This must be called before _set_clkdiv and _set_sysclk since McBSP register |
| 305 | * cache is initialized here |
| 306 | */ |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 307 | static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 308 | unsigned int fmt) |
| 309 | { |
| 310 | struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); |
| 311 | struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; |
| 312 | |
| 313 | if (mcbsp_data->configured) |
| 314 | return 0; |
| 315 | |
Jarkko Nikula | ba9d0fd | 2008-10-20 15:29:59 +0300 | [diff] [blame] | 316 | mcbsp_data->fmt = fmt; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 317 | memset(regs, 0, sizeof(*regs)); |
| 318 | /* Generic McBSP register settings */ |
| 319 | regs->spcr2 |= XINTM(3) | FREE; |
| 320 | regs->spcr1 |= RINTM(3); |
| 321 | regs->rcr2 |= RFIG; |
| 322 | regs->xcr2 |= XFIG; |
Misael Lopez Cruz | ef390c0 | 2009-01-29 13:29:46 +0200 | [diff] [blame] | 323 | if (cpu_is_omap2430() || cpu_is_omap34xx()) { |
| 324 | regs->xccr = DXENDLY(1) | XDMAEN; |
| 325 | regs->rccr = RFULL_CYCLE | RDMAEN; |
| 326 | } |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 327 | |
| 328 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 329 | case SND_SOC_DAIFMT_I2S: |
| 330 | /* 1-bit data delay */ |
| 331 | regs->rcr2 |= RDATDLY(1); |
| 332 | regs->xcr2 |= XDATDLY(1); |
| 333 | break; |
Peter Ujfalusi | 3ba191c | 2009-04-15 15:38:56 +0300 | [diff] [blame^] | 334 | case SND_SOC_DAIFMT_DSP_A: |
| 335 | /* 1-bit data delay */ |
| 336 | regs->rcr2 |= RDATDLY(1); |
| 337 | regs->xcr2 |= XDATDLY(1); |
| 338 | /* Invert FS polarity configuration */ |
| 339 | temp_fmt ^= SND_SOC_DAIFMT_NB_IF; |
| 340 | break; |
Jarkko Nikula | bd25867 | 2008-12-22 10:21:36 +0200 | [diff] [blame] | 341 | case SND_SOC_DAIFMT_DSP_B: |
Arun KS | 3336c5b | 2008-10-02 15:07:06 +0530 | [diff] [blame] | 342 | /* 0-bit data delay */ |
| 343 | regs->rcr2 |= RDATDLY(0); |
| 344 | regs->xcr2 |= XDATDLY(0); |
| 345 | break; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 346 | default: |
| 347 | /* Unsupported data format */ |
| 348 | return -EINVAL; |
| 349 | } |
| 350 | |
| 351 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 352 | case SND_SOC_DAIFMT_CBS_CFS: |
| 353 | /* McBSP master. Set FS and bit clocks as outputs */ |
| 354 | regs->pcr0 |= FSXM | FSRM | |
| 355 | CLKXM | CLKRM; |
| 356 | /* Sample rate generator drives the FS */ |
| 357 | regs->srgr2 |= FSGM; |
| 358 | break; |
| 359 | case SND_SOC_DAIFMT_CBM_CFM: |
| 360 | /* McBSP slave */ |
| 361 | break; |
| 362 | default: |
| 363 | /* Unsupported master/slave configuration */ |
| 364 | return -EINVAL; |
| 365 | } |
| 366 | |
| 367 | /* Set bit clock (CLKX/CLKR) and FS polarities */ |
Jarkko Nikula | da6320b | 2008-10-22 15:00:29 +0300 | [diff] [blame] | 368 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 369 | case SND_SOC_DAIFMT_NB_NF: |
| 370 | /* |
| 371 | * Normal BCLK + FS. |
| 372 | * FS active low. TX data driven on falling edge of bit clock |
| 373 | * and RX data sampled on rising edge of bit clock. |
| 374 | */ |
| 375 | regs->pcr0 |= FSXP | FSRP | |
| 376 | CLKXP | CLKRP; |
| 377 | break; |
| 378 | case SND_SOC_DAIFMT_NB_IF: |
| 379 | regs->pcr0 |= CLKXP | CLKRP; |
| 380 | break; |
| 381 | case SND_SOC_DAIFMT_IB_NF: |
| 382 | regs->pcr0 |= FSXP | FSRP; |
| 383 | break; |
| 384 | case SND_SOC_DAIFMT_IB_IF: |
| 385 | break; |
| 386 | default: |
| 387 | return -EINVAL; |
| 388 | } |
| 389 | |
| 390 | return 0; |
| 391 | } |
| 392 | |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 393 | static int omap_mcbsp_dai_set_clkdiv(struct snd_soc_dai *cpu_dai, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 394 | int div_id, int div) |
| 395 | { |
| 396 | struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); |
| 397 | struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; |
| 398 | |
| 399 | if (div_id != OMAP_MCBSP_CLKGDV) |
| 400 | return -ENODEV; |
| 401 | |
| 402 | regs->srgr1 |= CLKGDV(div - 1); |
| 403 | |
| 404 | return 0; |
| 405 | } |
| 406 | |
| 407 | static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data, |
| 408 | int clk_id) |
| 409 | { |
| 410 | int sel_bit; |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 411 | u16 reg, reg_devconf1 = OMAP243X_CONTROL_DEVCONF1; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 412 | |
| 413 | if (cpu_class_is_omap1()) { |
| 414 | /* OMAP1's can use only external source clock */ |
| 415 | if (unlikely(clk_id == OMAP_MCBSP_SYSCLK_CLKS_FCLK)) |
| 416 | return -EINVAL; |
| 417 | else |
| 418 | return 0; |
| 419 | } |
| 420 | |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 421 | if (cpu_is_omap2420() && mcbsp_data->bus_id > 1) |
| 422 | return -EINVAL; |
| 423 | |
| 424 | if (cpu_is_omap343x()) |
| 425 | reg_devconf1 = OMAP343X_CONTROL_DEVCONF1; |
| 426 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 427 | switch (mcbsp_data->bus_id) { |
| 428 | case 0: |
| 429 | reg = OMAP2_CONTROL_DEVCONF0; |
| 430 | sel_bit = 2; |
| 431 | break; |
| 432 | case 1: |
| 433 | reg = OMAP2_CONTROL_DEVCONF0; |
| 434 | sel_bit = 6; |
| 435 | break; |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 436 | case 2: |
| 437 | reg = reg_devconf1; |
| 438 | sel_bit = 0; |
| 439 | break; |
| 440 | case 3: |
| 441 | reg = reg_devconf1; |
| 442 | sel_bit = 2; |
| 443 | break; |
| 444 | case 4: |
| 445 | reg = reg_devconf1; |
| 446 | sel_bit = 4; |
| 447 | break; |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 448 | default: |
| 449 | return -EINVAL; |
| 450 | } |
| 451 | |
Jarkko Nikula | 406e2c4 | 2008-10-09 15:57:20 +0300 | [diff] [blame] | 452 | if (clk_id == OMAP_MCBSP_SYSCLK_CLKS_FCLK) |
| 453 | omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg); |
| 454 | else |
| 455 | omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg); |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 456 | |
| 457 | return 0; |
| 458 | } |
| 459 | |
Liam Girdwood | 8687eb8 | 2008-07-07 16:08:07 +0100 | [diff] [blame] | 460 | static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 461 | int clk_id, unsigned int freq, |
| 462 | int dir) |
| 463 | { |
| 464 | struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); |
| 465 | struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; |
| 466 | int err = 0; |
| 467 | |
| 468 | switch (clk_id) { |
| 469 | case OMAP_MCBSP_SYSCLK_CLK: |
| 470 | regs->srgr2 |= CLKSM; |
| 471 | break; |
| 472 | case OMAP_MCBSP_SYSCLK_CLKS_FCLK: |
| 473 | case OMAP_MCBSP_SYSCLK_CLKS_EXT: |
| 474 | err = omap_mcbsp_dai_set_clks_src(mcbsp_data, clk_id); |
| 475 | break; |
| 476 | |
| 477 | case OMAP_MCBSP_SYSCLK_CLKX_EXT: |
| 478 | regs->srgr2 |= CLKSM; |
| 479 | case OMAP_MCBSP_SYSCLK_CLKR_EXT: |
| 480 | regs->pcr0 |= SCLKME; |
| 481 | break; |
| 482 | default: |
| 483 | err = -ENODEV; |
| 484 | } |
| 485 | |
| 486 | return err; |
| 487 | } |
| 488 | |
Eric Miao | 6335d05 | 2009-03-03 09:41:00 +0800 | [diff] [blame] | 489 | static struct snd_soc_dai_ops omap_mcbsp_dai_ops = { |
| 490 | .startup = omap_mcbsp_dai_startup, |
| 491 | .shutdown = omap_mcbsp_dai_shutdown, |
| 492 | .trigger = omap_mcbsp_dai_trigger, |
| 493 | .hw_params = omap_mcbsp_dai_hw_params, |
| 494 | .set_fmt = omap_mcbsp_dai_set_dai_fmt, |
| 495 | .set_clkdiv = omap_mcbsp_dai_set_clkdiv, |
| 496 | .set_sysclk = omap_mcbsp_dai_set_dai_sysclk, |
| 497 | }; |
| 498 | |
Jarkko Nikula | 8def464 | 2008-10-09 15:57:22 +0300 | [diff] [blame] | 499 | #define OMAP_MCBSP_DAI_BUILDER(link_id) \ |
| 500 | { \ |
Jarkko Nikula | 0c758bd | 2008-11-21 14:31:33 +0200 | [diff] [blame] | 501 | .name = "omap-mcbsp-dai-"#link_id, \ |
Jarkko Nikula | 8def464 | 2008-10-09 15:57:22 +0300 | [diff] [blame] | 502 | .id = (link_id), \ |
Jarkko Nikula | 8def464 | 2008-10-09 15:57:22 +0300 | [diff] [blame] | 503 | .playback = { \ |
Jarkko Nikula | 375e8a7 | 2008-11-25 12:45:09 +0200 | [diff] [blame] | 504 | .channels_min = 1, \ |
Jarkko Nikula | 8def464 | 2008-10-09 15:57:22 +0300 | [diff] [blame] | 505 | .channels_max = 2, \ |
| 506 | .rates = OMAP_MCBSP_RATES, \ |
| 507 | .formats = SNDRV_PCM_FMTBIT_S16_LE, \ |
| 508 | }, \ |
| 509 | .capture = { \ |
Jarkko Nikula | 375e8a7 | 2008-11-25 12:45:09 +0200 | [diff] [blame] | 510 | .channels_min = 1, \ |
Jarkko Nikula | 8def464 | 2008-10-09 15:57:22 +0300 | [diff] [blame] | 511 | .channels_max = 2, \ |
| 512 | .rates = OMAP_MCBSP_RATES, \ |
| 513 | .formats = SNDRV_PCM_FMTBIT_S16_LE, \ |
| 514 | }, \ |
Eric Miao | 6335d05 | 2009-03-03 09:41:00 +0800 | [diff] [blame] | 515 | .ops = &omap_mcbsp_dai_ops, \ |
Jarkko Nikula | 8def464 | 2008-10-09 15:57:22 +0300 | [diff] [blame] | 516 | .private_data = &mcbsp_data[(link_id)].bus_id, \ |
| 517 | } |
| 518 | |
| 519 | struct snd_soc_dai omap_mcbsp_dai[] = { |
| 520 | OMAP_MCBSP_DAI_BUILDER(0), |
| 521 | OMAP_MCBSP_DAI_BUILDER(1), |
| 522 | #if NUM_LINKS >= 3 |
| 523 | OMAP_MCBSP_DAI_BUILDER(2), |
| 524 | #endif |
| 525 | #if NUM_LINKS == 5 |
| 526 | OMAP_MCBSP_DAI_BUILDER(3), |
| 527 | OMAP_MCBSP_DAI_BUILDER(4), |
| 528 | #endif |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 529 | }; |
Jarkko Nikula | 8def464 | 2008-10-09 15:57:22 +0300 | [diff] [blame] | 530 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 531 | EXPORT_SYMBOL_GPL(omap_mcbsp_dai); |
| 532 | |
Takashi Iwai | f73f2a6 | 2008-12-10 07:59:33 +0100 | [diff] [blame] | 533 | static int __init snd_omap_mcbsp_init(void) |
Mark Brown | 3f4b783 | 2008-12-03 19:26:35 +0000 | [diff] [blame] | 534 | { |
| 535 | return snd_soc_register_dais(omap_mcbsp_dai, |
| 536 | ARRAY_SIZE(omap_mcbsp_dai)); |
| 537 | } |
Takashi Iwai | f73f2a6 | 2008-12-10 07:59:33 +0100 | [diff] [blame] | 538 | module_init(snd_omap_mcbsp_init); |
Mark Brown | 3f4b783 | 2008-12-03 19:26:35 +0000 | [diff] [blame] | 539 | |
Takashi Iwai | f73f2a6 | 2008-12-10 07:59:33 +0100 | [diff] [blame] | 540 | static void __exit snd_omap_mcbsp_exit(void) |
Mark Brown | 3f4b783 | 2008-12-03 19:26:35 +0000 | [diff] [blame] | 541 | { |
| 542 | snd_soc_unregister_dais(omap_mcbsp_dai, ARRAY_SIZE(omap_mcbsp_dai)); |
| 543 | } |
Takashi Iwai | f73f2a6 | 2008-12-10 07:59:33 +0100 | [diff] [blame] | 544 | module_exit(snd_omap_mcbsp_exit); |
Mark Brown | 3f4b783 | 2008-12-03 19:26:35 +0000 | [diff] [blame] | 545 | |
Jarkko Nikula | 2e74796 | 2008-04-25 13:55:19 +0200 | [diff] [blame] | 546 | MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@nokia.com>"); |
| 547 | MODULE_DESCRIPTION("OMAP I2S SoC Interface"); |
| 548 | MODULE_LICENSE("GPL"); |