blob: 799fe64fc286f81377c87e81e97ee43236dd26e6 [file] [log] [blame]
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001/*
Martin Kepplingerf26ab1a2016-06-03 14:51:52 +02002 * mma8452.c - Support for following Freescale / NXP 3-axis accelerometers:
Martin Kepplingerc5ea1b582015-09-01 13:45:09 +02003 *
Martin Kepplinger16df6662016-06-03 14:51:51 +02004 * device name digital output 7-bit I2C slave address (pin selectable)
5 * ---------------------------------------------------------------------
6 * MMA8451Q 14 bit 0x1c / 0x1d
7 * MMA8452Q 12 bit 0x1c / 0x1d
8 * MMA8453Q 10 bit 0x1c / 0x1d
9 * MMA8652FC 12 bit 0x1d
10 * MMA8653FC 10 bit 0x1d
11 * FXLS8471Q 14 bit 0x1e / 0x1d / 0x1c / 0x1f
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000012 *
Martin Kepplinger40836bc2016-06-03 14:51:50 +020013 * Copyright 2015 Martin Kepplinger <martink@posteo.de>
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000014 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
15 *
16 * This file is subject to the terms and conditions of version 2 of
17 * the GNU General Public License. See the file COPYING in the main
18 * directory of this archive for more details.
19 *
Martin Kepplingerbce59b62016-03-14 12:26:29 +010020 * TODO: orientation events
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000021 */
22
23#include <linux/module.h>
24#include <linux/i2c.h>
25#include <linux/iio/iio.h>
26#include <linux/iio/sysfs.h>
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000027#include <linux/iio/buffer.h>
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +020028#include <linux/iio/trigger.h>
29#include <linux/iio/trigger_consumer.h>
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000030#include <linux/iio/triggered_buffer.h>
Martin Fuzzey28e34272015-06-01 15:39:52 +020031#include <linux/iio/events.h>
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000032#include <linux/delay.h>
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +020033#include <linux/of_device.h>
Martin Kepplingerd2a3e092015-10-15 15:10:32 +020034#include <linux/of_irq.h>
Martin Kepplinger96c0cb22016-03-03 09:24:03 +010035#include <linux/pm_runtime.h>
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000036
Hartmut Knaack69abff82015-08-02 22:43:50 +020037#define MMA8452_STATUS 0x00
38#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
Martin Kepplingerc5ea1b582015-09-01 13:45:09 +020039#define MMA8452_OUT_X 0x01 /* MSB first */
Hartmut Knaack69abff82015-08-02 22:43:50 +020040#define MMA8452_OUT_Y 0x03
41#define MMA8452_OUT_Z 0x05
42#define MMA8452_INT_SRC 0x0c
43#define MMA8452_WHO_AM_I 0x0d
44#define MMA8452_DATA_CFG 0x0e
45#define MMA8452_DATA_CFG_FS_MASK GENMASK(1, 0)
46#define MMA8452_DATA_CFG_FS_2G 0
47#define MMA8452_DATA_CFG_FS_4G 1
48#define MMA8452_DATA_CFG_FS_8G 2
49#define MMA8452_DATA_CFG_HPF_MASK BIT(4)
50#define MMA8452_HP_FILTER_CUTOFF 0x0f
51#define MMA8452_HP_FILTER_CUTOFF_SEL_MASK GENMASK(1, 0)
Martin Kepplinger60f562e2015-09-01 13:45:10 +020052#define MMA8452_FF_MT_CFG 0x15
53#define MMA8452_FF_MT_CFG_OAE BIT(6)
54#define MMA8452_FF_MT_CFG_ELE BIT(7)
55#define MMA8452_FF_MT_SRC 0x16
56#define MMA8452_FF_MT_SRC_XHE BIT(1)
57#define MMA8452_FF_MT_SRC_YHE BIT(3)
58#define MMA8452_FF_MT_SRC_ZHE BIT(5)
59#define MMA8452_FF_MT_THS 0x17
60#define MMA8452_FF_MT_THS_MASK 0x7f
61#define MMA8452_FF_MT_COUNT 0x18
Hartmut Knaack69abff82015-08-02 22:43:50 +020062#define MMA8452_TRANSIENT_CFG 0x1d
63#define MMA8452_TRANSIENT_CFG_HPF_BYP BIT(0)
Hartmut Knaack69abff82015-08-02 22:43:50 +020064#define MMA8452_TRANSIENT_CFG_ELE BIT(4)
65#define MMA8452_TRANSIENT_SRC 0x1e
66#define MMA8452_TRANSIENT_SRC_XTRANSE BIT(1)
67#define MMA8452_TRANSIENT_SRC_YTRANSE BIT(3)
68#define MMA8452_TRANSIENT_SRC_ZTRANSE BIT(5)
69#define MMA8452_TRANSIENT_THS 0x1f
70#define MMA8452_TRANSIENT_THS_MASK GENMASK(6, 0)
71#define MMA8452_TRANSIENT_COUNT 0x20
72#define MMA8452_CTRL_REG1 0x2a
73#define MMA8452_CTRL_ACTIVE BIT(0)
74#define MMA8452_CTRL_DR_MASK GENMASK(5, 3)
75#define MMA8452_CTRL_DR_SHIFT 3
76#define MMA8452_CTRL_DR_DEFAULT 0x4 /* 50 Hz sample frequency */
77#define MMA8452_CTRL_REG2 0x2b
78#define MMA8452_CTRL_REG2_RST BIT(6)
Martin Kepplingered859fc2016-04-25 14:08:25 +020079#define MMA8452_CTRL_REG2_MODS_SHIFT 3
80#define MMA8452_CTRL_REG2_MODS_MASK 0x1b
Hartmut Knaack69abff82015-08-02 22:43:50 +020081#define MMA8452_CTRL_REG4 0x2d
82#define MMA8452_CTRL_REG5 0x2e
83#define MMA8452_OFF_X 0x2f
84#define MMA8452_OFF_Y 0x30
85#define MMA8452_OFF_Z 0x31
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000086
Hartmut Knaack69abff82015-08-02 22:43:50 +020087#define MMA8452_MAX_REG 0x31
Martin Fuzzey2a17698c2015-05-13 12:26:40 +020088
Hartmut Knaack69abff82015-08-02 22:43:50 +020089#define MMA8452_INT_DRDY BIT(0)
Martin Kepplinger60f562e2015-09-01 13:45:10 +020090#define MMA8452_INT_FF_MT BIT(2)
Hartmut Knaack69abff82015-08-02 22:43:50 +020091#define MMA8452_INT_TRANS BIT(5)
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000092
Martin Kepplinger244a93f2016-01-16 15:35:22 +010093#define MMA8451_DEVICE_ID 0x1a
Martin Kepplinger36775d52016-01-16 15:35:21 +010094#define MMA8452_DEVICE_ID 0x2a
95#define MMA8453_DEVICE_ID 0x3a
Martin Kepplinger417e0082015-09-01 13:45:11 +020096#define MMA8652_DEVICE_ID 0x4a
97#define MMA8653_DEVICE_ID 0x5a
Martin Kepplingere8731182016-03-09 12:01:29 +010098#define FXLS8471_DEVICE_ID 0x6a
Peter Meerwaldc7eeea92014-02-05 09:51:00 +000099
Martin Kepplinger96c0cb22016-03-03 09:24:03 +0100100#define MMA8452_AUTO_SUSPEND_DELAY_MS 2000
101
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000102struct mma8452_data {
103 struct i2c_client *client;
104 struct mutex lock;
105 u8 ctrl_reg1;
106 u8 data_cfg;
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200107 const struct mma_chip_info *chip_info;
108};
109
110/**
Martin Kepplingerf26ab1a2016-06-03 14:51:52 +0200111 * struct mma_chip_info - chip specific data
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200112 * @chip_id: WHO_AM_I register's value
113 * @channels: struct iio_chan_spec matching the device's
114 * capabilities
115 * @num_channels: number of channels
116 * @mma_scales: scale factors for converting register values
117 * to m/s^2; 3 modes: 2g, 4g, 8g; 2 integers
118 * per mode: m/s^2 and micro m/s^2
119 * @ev_cfg: event config register address
120 * @ev_cfg_ele: latch bit in event config register
121 * @ev_cfg_chan_shift: number of the bit to enable events in X
122 * direction; in event config register
123 * @ev_src: event source register address
124 * @ev_src_xe: bit in event source register that indicates
125 * an event in X direction
126 * @ev_src_ye: bit in event source register that indicates
127 * an event in Y direction
128 * @ev_src_ze: bit in event source register that indicates
129 * an event in Z direction
130 * @ev_ths: event threshold register address
131 * @ev_ths_mask: mask for the threshold value
132 * @ev_count: event count (period) register address
133 *
134 * Since not all chips supported by the driver support comparing high pass
135 * filtered data for events (interrupts), different interrupt sources are
136 * used for different chips and the relevant registers are included here.
137 */
138struct mma_chip_info {
139 u8 chip_id;
140 const struct iio_chan_spec *channels;
141 int num_channels;
142 const int mma_scales[3][2];
143 u8 ev_cfg;
144 u8 ev_cfg_ele;
145 u8 ev_cfg_chan_shift;
146 u8 ev_src;
147 u8 ev_src_xe;
148 u8 ev_src_ye;
149 u8 ev_src_ze;
150 u8 ev_ths;
151 u8 ev_ths_mask;
152 u8 ev_count;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000153};
154
Martin Kepplingere60378c2015-12-15 17:45:00 +0100155enum {
156 idx_x,
157 idx_y,
158 idx_z,
159 idx_ts,
160};
161
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000162static int mma8452_drdy(struct mma8452_data *data)
163{
164 int tries = 150;
165
166 while (tries-- > 0) {
167 int ret = i2c_smbus_read_byte_data(data->client,
168 MMA8452_STATUS);
169 if (ret < 0)
170 return ret;
171 if ((ret & MMA8452_STATUS_DRDY) == MMA8452_STATUS_DRDY)
172 return 0;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200173
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000174 msleep(20);
175 }
176
177 dev_err(&data->client->dev, "data not ready\n");
Hartmut Knaack686027f2015-08-02 22:43:51 +0200178
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000179 return -EIO;
180}
181
Martin Kepplinger96c0cb22016-03-03 09:24:03 +0100182static int mma8452_set_runtime_pm_state(struct i2c_client *client, bool on)
183{
184#ifdef CONFIG_PM
185 int ret;
186
187 if (on) {
188 ret = pm_runtime_get_sync(&client->dev);
189 } else {
190 pm_runtime_mark_last_busy(&client->dev);
191 ret = pm_runtime_put_autosuspend(&client->dev);
192 }
193
194 if (ret < 0) {
195 dev_err(&client->dev,
196 "failed to change power state to %d\n", on);
197 if (on)
198 pm_runtime_put_noidle(&client->dev);
199
200 return ret;
201 }
202#endif
203
204 return 0;
205}
206
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000207static int mma8452_read(struct mma8452_data *data, __be16 buf[3])
208{
209 int ret = mma8452_drdy(data);
Hartmut Knaack686027f2015-08-02 22:43:51 +0200210
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000211 if (ret < 0)
212 return ret;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200213
Martin Kepplinger96c0cb22016-03-03 09:24:03 +0100214 ret = mma8452_set_runtime_pm_state(data->client, true);
215 if (ret)
216 return ret;
217
218 ret = i2c_smbus_read_i2c_block_data(data->client, MMA8452_OUT_X,
219 3 * sizeof(__be16), (u8 *)buf);
220
221 ret = mma8452_set_runtime_pm_state(data->client, false);
222
223 return ret;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000224}
225
Hartmut Knaack686027f2015-08-02 22:43:51 +0200226static ssize_t mma8452_show_int_plus_micros(char *buf, const int (*vals)[2],
227 int n)
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000228{
229 size_t len = 0;
230
231 while (n-- > 0)
Hartmut Knaack686027f2015-08-02 22:43:51 +0200232 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
233 vals[n][0], vals[n][1]);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000234
235 /* replace trailing space by newline */
236 buf[len - 1] = '\n';
237
238 return len;
239}
240
241static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200242 int val, int val2)
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000243{
244 while (n-- > 0)
245 if (val == vals[n][0] && val2 == vals[n][1])
246 return n;
247
248 return -EINVAL;
249}
250
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200251static int mma8452_get_odr_index(struct mma8452_data *data)
252{
253 return (data->ctrl_reg1 & MMA8452_CTRL_DR_MASK) >>
254 MMA8452_CTRL_DR_SHIFT;
255}
256
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000257static const int mma8452_samp_freq[8][2] = {
258 {800, 0}, {400, 0}, {200, 0}, {100, 0}, {50, 0}, {12, 500000},
259 {6, 250000}, {1, 560000}
260};
261
Martin Kepplingered859fc2016-04-25 14:08:25 +0200262/* Datasheet table: step time "Relationship with the ODR" (sample frequency) */
263static const int mma8452_transient_time_step_us[4][8] = {
264 { 1250, 2500, 5000, 10000, 20000, 20000, 20000, 20000 }, /* normal */
265 { 1250, 2500, 5000, 10000, 20000, 80000, 80000, 80000 }, /* l p l n */
266 { 1250, 2500, 2500, 2500, 2500, 2500, 2500, 2500 }, /* high res*/
267 { 1250, 2500, 5000, 10000, 20000, 80000, 160000, 160000 } /* l p */
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200268};
269
Martin Kepplingered859fc2016-04-25 14:08:25 +0200270/* Datasheet table "High-Pass Filter Cutoff Options" */
271static const int mma8452_hp_filter_cutoff[4][8][4][2] = {
272 { /* normal */
Martin Fuzzey1e798412015-06-01 15:39:56 +0200273 { {16, 0}, {8, 0}, {4, 0}, {2, 0} }, /* 800 Hz sample */
274 { {16, 0}, {8, 0}, {4, 0}, {2, 0} }, /* 400 Hz sample */
275 { {8, 0}, {4, 0}, {2, 0}, {1, 0} }, /* 200 Hz sample */
276 { {4, 0}, {2, 0}, {1, 0}, {0, 500000} }, /* 100 Hz sample */
277 { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} }, /* 50 Hz sample */
278 { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} }, /* 12.5 Hz sample */
279 { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} }, /* 6.25 Hz sample */
280 { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} } /* 1.56 Hz sample */
Martin Kepplingered859fc2016-04-25 14:08:25 +0200281 },
282 { /* low noise low power */
283 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
284 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
285 { {8, 0}, {4, 0}, {2, 0}, {1, 0} },
286 { {4, 0}, {2, 0}, {1, 0}, {0, 500000} },
287 { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} },
288 { {0, 500000}, {0, 250000}, {0, 125000}, {0, 063000} },
289 { {0, 500000}, {0, 250000}, {0, 125000}, {0, 063000} },
290 { {0, 500000}, {0, 250000}, {0, 125000}, {0, 063000} }
291 },
292 { /* high resolution */
293 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
294 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
295 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
296 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
297 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
298 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
299 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
300 { {16, 0}, {8, 0}, {4, 0}, {2, 0} }
301 },
302 { /* low power */
303 { {16, 0}, {8, 0}, {4, 0}, {2, 0} },
304 { {8, 0}, {4, 0}, {2, 0}, {1, 0} },
305 { {4, 0}, {2, 0}, {1, 0}, {0, 500000} },
306 { {2, 0}, {1, 0}, {0, 500000}, {0, 250000} },
307 { {1, 0}, {0, 500000}, {0, 250000}, {0, 125000} },
308 { {0, 250000}, {0, 125000}, {0, 063000}, {0, 031000} },
309 { {0, 250000}, {0, 125000}, {0, 063000}, {0, 031000} },
310 { {0, 250000}, {0, 125000}, {0, 063000}, {0, 031000} }
311 }
Martin Fuzzey1e798412015-06-01 15:39:56 +0200312};
313
Martin Kepplingered859fc2016-04-25 14:08:25 +0200314/* Datasheet table "MODS Oversampling modes averaging values at each ODR" */
315static const u16 mma8452_os_ratio[4][8] = {
316 /* 800 Hz, 400 Hz, ... , 1.56 Hz */
317 { 2, 4, 4, 4, 4, 16, 32, 128 }, /* normal */
318 { 2, 4, 4, 4, 4, 4, 8, 32 }, /* low power low noise */
319 { 2, 4, 8, 16, 32, 128, 256, 1024 }, /* high resolution */
320 { 2, 2, 2, 2, 2, 2, 4, 16 } /* low power */
321};
322
323static int mma8452_get_power_mode(struct mma8452_data *data)
324{
325 int reg;
326
327 reg = i2c_smbus_read_byte_data(data->client,
328 MMA8452_CTRL_REG2);
329 if (reg < 0)
330 return reg;
331
332 return ((reg & MMA8452_CTRL_REG2_MODS_MASK) >>
333 MMA8452_CTRL_REG2_MODS_SHIFT);
334}
335
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000336static ssize_t mma8452_show_samp_freq_avail(struct device *dev,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200337 struct device_attribute *attr,
338 char *buf)
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000339{
340 return mma8452_show_int_plus_micros(buf, mma8452_samp_freq,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200341 ARRAY_SIZE(mma8452_samp_freq));
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000342}
343
344static ssize_t mma8452_show_scale_avail(struct device *dev,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200345 struct device_attribute *attr,
346 char *buf)
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000347{
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200348 struct mma8452_data *data = iio_priv(i2c_get_clientdata(
349 to_i2c_client(dev)));
350
351 return mma8452_show_int_plus_micros(buf, data->chip_info->mma_scales,
352 ARRAY_SIZE(data->chip_info->mma_scales));
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000353}
354
Martin Fuzzey1e798412015-06-01 15:39:56 +0200355static ssize_t mma8452_show_hp_cutoff_avail(struct device *dev,
356 struct device_attribute *attr,
357 char *buf)
358{
359 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
360 struct mma8452_data *data = iio_priv(indio_dev);
Martin Kepplingered859fc2016-04-25 14:08:25 +0200361 int i, j;
Martin Fuzzey1e798412015-06-01 15:39:56 +0200362
Martin Kepplingered859fc2016-04-25 14:08:25 +0200363 i = mma8452_get_odr_index(data);
364 j = mma8452_get_power_mode(data);
365 if (j < 0)
366 return j;
367
368 return mma8452_show_int_plus_micros(buf, mma8452_hp_filter_cutoff[j][i],
369 ARRAY_SIZE(mma8452_hp_filter_cutoff[0][0]));
370}
371
372static ssize_t mma8452_show_os_ratio_avail(struct device *dev,
373 struct device_attribute *attr,
374 char *buf)
375{
376 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
377 struct mma8452_data *data = iio_priv(indio_dev);
378 int i = mma8452_get_odr_index(data);
379 int j;
380 u16 val = 0;
381 size_t len = 0;
382
383 for (j = 0; j < ARRAY_SIZE(mma8452_os_ratio); j++) {
384 if (val == mma8452_os_ratio[j][i])
385 continue;
386
387 val = mma8452_os_ratio[j][i];
388
389 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", val);
390 }
391 buf[len - 1] = '\n';
392
393 return len;
Martin Fuzzey1e798412015-06-01 15:39:56 +0200394}
395
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000396static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail);
397static IIO_DEVICE_ATTR(in_accel_scale_available, S_IRUGO,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200398 mma8452_show_scale_avail, NULL, 0);
Martin Fuzzey1e798412015-06-01 15:39:56 +0200399static IIO_DEVICE_ATTR(in_accel_filter_high_pass_3db_frequency_available,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200400 S_IRUGO, mma8452_show_hp_cutoff_avail, NULL, 0);
Martin Kepplingered859fc2016-04-25 14:08:25 +0200401static IIO_DEVICE_ATTR(in_accel_oversampling_ratio_available, S_IRUGO,
402 mma8452_show_os_ratio_avail, NULL, 0);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000403
404static int mma8452_get_samp_freq_index(struct mma8452_data *data,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200405 int val, int val2)
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000406{
407 return mma8452_get_int_plus_micros_index(mma8452_samp_freq,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200408 ARRAY_SIZE(mma8452_samp_freq),
409 val, val2);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000410}
411
Hartmut Knaack686027f2015-08-02 22:43:51 +0200412static int mma8452_get_scale_index(struct mma8452_data *data, int val, int val2)
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000413{
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200414 return mma8452_get_int_plus_micros_index(data->chip_info->mma_scales,
415 ARRAY_SIZE(data->chip_info->mma_scales), val, val2);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000416}
417
Martin Fuzzey1e798412015-06-01 15:39:56 +0200418static int mma8452_get_hp_filter_index(struct mma8452_data *data,
419 int val, int val2)
420{
Martin Kepplingered859fc2016-04-25 14:08:25 +0200421 int i, j;
Martin Fuzzey1e798412015-06-01 15:39:56 +0200422
Martin Kepplingered859fc2016-04-25 14:08:25 +0200423 i = mma8452_get_odr_index(data);
424 j = mma8452_get_power_mode(data);
425 if (j < 0)
426 return j;
427
428 return mma8452_get_int_plus_micros_index(mma8452_hp_filter_cutoff[j][i],
429 ARRAY_SIZE(mma8452_hp_filter_cutoff[0][0]), val, val2);
Martin Fuzzey1e798412015-06-01 15:39:56 +0200430}
431
432static int mma8452_read_hp_filter(struct mma8452_data *data, int *hz, int *uHz)
433{
Martin Kepplingered859fc2016-04-25 14:08:25 +0200434 int j, i, ret;
Martin Fuzzey1e798412015-06-01 15:39:56 +0200435
436 ret = i2c_smbus_read_byte_data(data->client, MMA8452_HP_FILTER_CUTOFF);
437 if (ret < 0)
438 return ret;
439
440 i = mma8452_get_odr_index(data);
Martin Kepplingered859fc2016-04-25 14:08:25 +0200441 j = mma8452_get_power_mode(data);
442 if (j < 0)
443 return j;
444
Martin Fuzzey1e798412015-06-01 15:39:56 +0200445 ret &= MMA8452_HP_FILTER_CUTOFF_SEL_MASK;
Martin Kepplingered859fc2016-04-25 14:08:25 +0200446 *hz = mma8452_hp_filter_cutoff[j][i][ret][0];
447 *uHz = mma8452_hp_filter_cutoff[j][i][ret][1];
Martin Fuzzey1e798412015-06-01 15:39:56 +0200448
449 return 0;
450}
451
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000452static int mma8452_read_raw(struct iio_dev *indio_dev,
453 struct iio_chan_spec const *chan,
454 int *val, int *val2, long mask)
455{
456 struct mma8452_data *data = iio_priv(indio_dev);
457 __be16 buffer[3];
458 int i, ret;
459
460 switch (mask) {
461 case IIO_CHAN_INFO_RAW:
462 if (iio_buffer_enabled(indio_dev))
463 return -EBUSY;
464
465 mutex_lock(&data->lock);
466 ret = mma8452_read(data, buffer);
467 mutex_unlock(&data->lock);
468 if (ret < 0)
469 return ret;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200470
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200471 *val = sign_extend32(be16_to_cpu(
472 buffer[chan->scan_index]) >> chan->scan_type.shift,
473 chan->scan_type.realbits - 1);
Hartmut Knaack686027f2015-08-02 22:43:51 +0200474
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000475 return IIO_VAL_INT;
476 case IIO_CHAN_INFO_SCALE:
477 i = data->data_cfg & MMA8452_DATA_CFG_FS_MASK;
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200478 *val = data->chip_info->mma_scales[i][0];
479 *val2 = data->chip_info->mma_scales[i][1];
Hartmut Knaack686027f2015-08-02 22:43:51 +0200480
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000481 return IIO_VAL_INT_PLUS_MICRO;
482 case IIO_CHAN_INFO_SAMP_FREQ:
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200483 i = mma8452_get_odr_index(data);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000484 *val = mma8452_samp_freq[i][0];
485 *val2 = mma8452_samp_freq[i][1];
Hartmut Knaack686027f2015-08-02 22:43:51 +0200486
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000487 return IIO_VAL_INT_PLUS_MICRO;
488 case IIO_CHAN_INFO_CALIBBIAS:
Hartmut Knaack686027f2015-08-02 22:43:51 +0200489 ret = i2c_smbus_read_byte_data(data->client,
Martin Kepplinger8b8ff3a2016-03-03 09:24:01 +0100490 MMA8452_OFF_X +
491 chan->scan_index);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000492 if (ret < 0)
493 return ret;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200494
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000495 *val = sign_extend32(ret, 7);
Hartmut Knaack686027f2015-08-02 22:43:51 +0200496
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000497 return IIO_VAL_INT;
Martin Fuzzey1e798412015-06-01 15:39:56 +0200498 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
499 if (data->data_cfg & MMA8452_DATA_CFG_HPF_MASK) {
500 ret = mma8452_read_hp_filter(data, val, val2);
501 if (ret < 0)
502 return ret;
503 } else {
504 *val = 0;
505 *val2 = 0;
506 }
Hartmut Knaack686027f2015-08-02 22:43:51 +0200507
Martin Fuzzey1e798412015-06-01 15:39:56 +0200508 return IIO_VAL_INT_PLUS_MICRO;
Martin Kepplingered859fc2016-04-25 14:08:25 +0200509 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
510 ret = mma8452_get_power_mode(data);
511 if (ret < 0)
512 return ret;
513
514 i = mma8452_get_odr_index(data);
515
516 *val = mma8452_os_ratio[ret][i];
517 return IIO_VAL_INT;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000518 }
Hartmut Knaack686027f2015-08-02 22:43:51 +0200519
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000520 return -EINVAL;
521}
522
523static int mma8452_standby(struct mma8452_data *data)
524{
525 return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200526 data->ctrl_reg1 & ~MMA8452_CTRL_ACTIVE);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000527}
528
529static int mma8452_active(struct mma8452_data *data)
530{
531 return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG1,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200532 data->ctrl_reg1);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000533}
534
Martin Kepplingere8668532016-03-03 09:24:02 +0100535/* returns >0 if active, 0 if in standby and <0 on error */
536static int mma8452_is_active(struct mma8452_data *data)
537{
538 int reg;
539
540 reg = i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG1);
541 if (reg < 0)
542 return reg;
543
544 return reg & MMA8452_CTRL_ACTIVE;
545}
546
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000547static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val)
548{
549 int ret;
Martin Kepplingere8668532016-03-03 09:24:02 +0100550 int is_active;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000551
552 mutex_lock(&data->lock);
553
Martin Kepplingere8668532016-03-03 09:24:02 +0100554 is_active = mma8452_is_active(data);
555 if (is_active < 0) {
556 ret = is_active;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000557 goto fail;
Martin Kepplingere8668532016-03-03 09:24:02 +0100558 }
559
560 /* config can only be changed when in standby */
561 if (is_active > 0) {
562 ret = mma8452_standby(data);
563 if (ret < 0)
564 goto fail;
565 }
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000566
567 ret = i2c_smbus_write_byte_data(data->client, reg, val);
568 if (ret < 0)
569 goto fail;
570
Martin Kepplingere8668532016-03-03 09:24:02 +0100571 if (is_active > 0) {
572 ret = mma8452_active(data);
573 if (ret < 0)
574 goto fail;
575 }
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000576
577 ret = 0;
578fail:
579 mutex_unlock(&data->lock);
Hartmut Knaack686027f2015-08-02 22:43:51 +0200580
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000581 return ret;
582}
583
Martin Kepplingered859fc2016-04-25 14:08:25 +0200584static int mma8452_set_power_mode(struct mma8452_data *data, u8 mode)
585{
586 int reg;
587
588 reg = i2c_smbus_read_byte_data(data->client,
589 MMA8452_CTRL_REG2);
590 if (reg < 0)
591 return reg;
592
593 reg &= ~MMA8452_CTRL_REG2_MODS_MASK;
594 reg |= mode << MMA8452_CTRL_REG2_MODS_SHIFT;
595
596 return mma8452_change_config(data, MMA8452_CTRL_REG2, reg);
597}
598
Martin Kepplinger8b8ff3a2016-03-03 09:24:01 +0100599/* returns >0 if in freefall mode, 0 if not or <0 if an error occurred */
Martin Kepplinger4b042662016-01-16 15:35:20 +0100600static int mma8452_freefall_mode_enabled(struct mma8452_data *data)
601{
602 int val;
603 const struct mma_chip_info *chip = data->chip_info;
604
605 val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg);
606 if (val < 0)
607 return val;
608
609 return !(val & MMA8452_FF_MT_CFG_OAE);
610}
611
612static int mma8452_set_freefall_mode(struct mma8452_data *data, bool state)
613{
614 int val;
615 const struct mma_chip_info *chip = data->chip_info;
616
617 if ((state && mma8452_freefall_mode_enabled(data)) ||
618 (!state && !(mma8452_freefall_mode_enabled(data))))
619 return 0;
620
621 val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg);
622 if (val < 0)
623 return val;
624
625 if (state) {
626 val |= BIT(idx_x + chip->ev_cfg_chan_shift);
627 val |= BIT(idx_y + chip->ev_cfg_chan_shift);
628 val |= BIT(idx_z + chip->ev_cfg_chan_shift);
629 val &= ~MMA8452_FF_MT_CFG_OAE;
630 } else {
631 val &= ~BIT(idx_x + chip->ev_cfg_chan_shift);
632 val &= ~BIT(idx_y + chip->ev_cfg_chan_shift);
633 val &= ~BIT(idx_z + chip->ev_cfg_chan_shift);
634 val |= MMA8452_FF_MT_CFG_OAE;
635 }
636
637 val = mma8452_change_config(data, chip->ev_cfg, val);
638 if (val)
639 return val;
640
641 return 0;
642}
643
Martin Fuzzey1e798412015-06-01 15:39:56 +0200644static int mma8452_set_hp_filter_frequency(struct mma8452_data *data,
645 int val, int val2)
646{
647 int i, reg;
648
649 i = mma8452_get_hp_filter_index(data, val, val2);
650 if (i < 0)
Hartmut Knaackb9fddcd2015-08-02 22:43:48 +0200651 return i;
Martin Fuzzey1e798412015-06-01 15:39:56 +0200652
653 reg = i2c_smbus_read_byte_data(data->client,
654 MMA8452_HP_FILTER_CUTOFF);
655 if (reg < 0)
656 return reg;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200657
Martin Fuzzey1e798412015-06-01 15:39:56 +0200658 reg &= ~MMA8452_HP_FILTER_CUTOFF_SEL_MASK;
659 reg |= i;
660
661 return mma8452_change_config(data, MMA8452_HP_FILTER_CUTOFF, reg);
662}
663
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000664static int mma8452_write_raw(struct iio_dev *indio_dev,
665 struct iio_chan_spec const *chan,
666 int val, int val2, long mask)
667{
668 struct mma8452_data *data = iio_priv(indio_dev);
Martin Fuzzey1e798412015-06-01 15:39:56 +0200669 int i, ret;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000670
671 if (iio_buffer_enabled(indio_dev))
672 return -EBUSY;
673
674 switch (mask) {
675 case IIO_CHAN_INFO_SAMP_FREQ:
676 i = mma8452_get_samp_freq_index(data, val, val2);
677 if (i < 0)
Hartmut Knaackb9fddcd2015-08-02 22:43:48 +0200678 return i;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000679
680 data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK;
681 data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200682
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000683 return mma8452_change_config(data, MMA8452_CTRL_REG1,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200684 data->ctrl_reg1);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000685 case IIO_CHAN_INFO_SCALE:
686 i = mma8452_get_scale_index(data, val, val2);
687 if (i < 0)
Hartmut Knaackb9fddcd2015-08-02 22:43:48 +0200688 return i;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200689
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000690 data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK;
691 data->data_cfg |= i;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200692
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000693 return mma8452_change_config(data, MMA8452_DATA_CFG,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200694 data->data_cfg);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000695 case IIO_CHAN_INFO_CALIBBIAS:
696 if (val < -128 || val > 127)
697 return -EINVAL;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200698
699 return mma8452_change_config(data,
700 MMA8452_OFF_X + chan->scan_index,
701 val);
Martin Fuzzey1e798412015-06-01 15:39:56 +0200702
703 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
704 if (val == 0 && val2 == 0) {
705 data->data_cfg &= ~MMA8452_DATA_CFG_HPF_MASK;
706 } else {
707 data->data_cfg |= MMA8452_DATA_CFG_HPF_MASK;
708 ret = mma8452_set_hp_filter_frequency(data, val, val2);
709 if (ret < 0)
710 return ret;
711 }
Hartmut Knaack686027f2015-08-02 22:43:51 +0200712
Martin Fuzzey1e798412015-06-01 15:39:56 +0200713 return mma8452_change_config(data, MMA8452_DATA_CFG,
Hartmut Knaack686027f2015-08-02 22:43:51 +0200714 data->data_cfg);
Martin Fuzzey1e798412015-06-01 15:39:56 +0200715
Martin Kepplingered859fc2016-04-25 14:08:25 +0200716 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
717 ret = mma8452_get_odr_index(data);
718
719 for (i = 0; i < ARRAY_SIZE(mma8452_os_ratio); i++) {
720 if (mma8452_os_ratio[i][ret] == val)
721 return mma8452_set_power_mode(data, i);
722 }
723
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000724 default:
725 return -EINVAL;
726 }
727}
728
Martin Fuzzey28e34272015-06-01 15:39:52 +0200729static int mma8452_read_thresh(struct iio_dev *indio_dev,
730 const struct iio_chan_spec *chan,
731 enum iio_event_type type,
732 enum iio_event_direction dir,
733 enum iio_event_info info,
734 int *val, int *val2)
735{
736 struct mma8452_data *data = iio_priv(indio_dev);
Martin Kepplingered859fc2016-04-25 14:08:25 +0200737 int ret, us, power_mode;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200738
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200739 switch (info) {
740 case IIO_EV_INFO_VALUE:
741 ret = i2c_smbus_read_byte_data(data->client,
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200742 data->chip_info->ev_ths);
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200743 if (ret < 0)
744 return ret;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200745
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200746 *val = ret & data->chip_info->ev_ths_mask;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200747
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200748 return IIO_VAL_INT;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200749
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200750 case IIO_EV_INFO_PERIOD:
751 ret = i2c_smbus_read_byte_data(data->client,
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200752 data->chip_info->ev_count);
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200753 if (ret < 0)
754 return ret;
755
Martin Kepplingered859fc2016-04-25 14:08:25 +0200756 power_mode = mma8452_get_power_mode(data);
757 if (power_mode < 0)
758 return power_mode;
759
760 us = ret * mma8452_transient_time_step_us[power_mode][
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200761 mma8452_get_odr_index(data)];
762 *val = us / USEC_PER_SEC;
763 *val2 = us % USEC_PER_SEC;
Hartmut Knaack686027f2015-08-02 22:43:51 +0200764
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200765 return IIO_VAL_INT_PLUS_MICRO;
766
Martin Fuzzey1e798412015-06-01 15:39:56 +0200767 case IIO_EV_INFO_HIGH_PASS_FILTER_3DB:
768 ret = i2c_smbus_read_byte_data(data->client,
769 MMA8452_TRANSIENT_CFG);
770 if (ret < 0)
771 return ret;
772
773 if (ret & MMA8452_TRANSIENT_CFG_HPF_BYP) {
774 *val = 0;
775 *val2 = 0;
776 } else {
777 ret = mma8452_read_hp_filter(data, val, val2);
778 if (ret < 0)
779 return ret;
780 }
Hartmut Knaack686027f2015-08-02 22:43:51 +0200781
Martin Fuzzey1e798412015-06-01 15:39:56 +0200782 return IIO_VAL_INT_PLUS_MICRO;
783
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200784 default:
785 return -EINVAL;
786 }
Martin Fuzzey28e34272015-06-01 15:39:52 +0200787}
788
789static int mma8452_write_thresh(struct iio_dev *indio_dev,
790 const struct iio_chan_spec *chan,
791 enum iio_event_type type,
792 enum iio_event_direction dir,
793 enum iio_event_info info,
794 int val, int val2)
795{
796 struct mma8452_data *data = iio_priv(indio_dev);
Martin Fuzzey1e798412015-06-01 15:39:56 +0200797 int ret, reg, steps;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200798
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200799 switch (info) {
800 case IIO_EV_INFO_VALUE:
Hartmut Knaack11218222015-08-02 22:43:49 +0200801 if (val < 0 || val > MMA8452_TRANSIENT_THS_MASK)
802 return -EINVAL;
803
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200804 return mma8452_change_config(data, data->chip_info->ev_ths,
805 val);
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200806
807 case IIO_EV_INFO_PERIOD:
Martin Kepplingered859fc2016-04-25 14:08:25 +0200808 ret = mma8452_get_power_mode(data);
809 if (ret < 0)
810 return ret;
811
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200812 steps = (val * USEC_PER_SEC + val2) /
Martin Kepplingered859fc2016-04-25 14:08:25 +0200813 mma8452_transient_time_step_us[ret][
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200814 mma8452_get_odr_index(data)];
815
Hartmut Knaack11218222015-08-02 22:43:49 +0200816 if (steps < 0 || steps > 0xff)
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200817 return -EINVAL;
818
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200819 return mma8452_change_config(data, data->chip_info->ev_count,
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200820 steps);
Hartmut Knaack686027f2015-08-02 22:43:51 +0200821
Martin Fuzzey1e798412015-06-01 15:39:56 +0200822 case IIO_EV_INFO_HIGH_PASS_FILTER_3DB:
823 reg = i2c_smbus_read_byte_data(data->client,
824 MMA8452_TRANSIENT_CFG);
825 if (reg < 0)
826 return reg;
827
828 if (val == 0 && val2 == 0) {
829 reg |= MMA8452_TRANSIENT_CFG_HPF_BYP;
830 } else {
831 reg &= ~MMA8452_TRANSIENT_CFG_HPF_BYP;
832 ret = mma8452_set_hp_filter_frequency(data, val, val2);
833 if (ret < 0)
834 return ret;
835 }
Hartmut Knaack686027f2015-08-02 22:43:51 +0200836
Martin Fuzzey1e798412015-06-01 15:39:56 +0200837 return mma8452_change_config(data, MMA8452_TRANSIENT_CFG, reg);
838
Martin Fuzzey5dbbd192015-06-01 15:39:54 +0200839 default:
840 return -EINVAL;
841 }
Martin Fuzzey28e34272015-06-01 15:39:52 +0200842}
843
844static int mma8452_read_event_config(struct iio_dev *indio_dev,
845 const struct iio_chan_spec *chan,
846 enum iio_event_type type,
847 enum iio_event_direction dir)
848{
849 struct mma8452_data *data = iio_priv(indio_dev);
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200850 const struct mma_chip_info *chip = data->chip_info;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200851 int ret;
852
Martin Kepplinger4b042662016-01-16 15:35:20 +0100853 switch (dir) {
854 case IIO_EV_DIR_FALLING:
855 return mma8452_freefall_mode_enabled(data);
856 case IIO_EV_DIR_RISING:
857 if (mma8452_freefall_mode_enabled(data))
858 return 0;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200859
Martin Kepplinger4b042662016-01-16 15:35:20 +0100860 ret = i2c_smbus_read_byte_data(data->client,
861 data->chip_info->ev_cfg);
862 if (ret < 0)
863 return ret;
864
Martin Kepplinger8b8ff3a2016-03-03 09:24:01 +0100865 return !!(ret & BIT(chan->scan_index +
866 chip->ev_cfg_chan_shift));
Martin Kepplinger4b042662016-01-16 15:35:20 +0100867 default:
868 return -EINVAL;
869 }
Martin Fuzzey28e34272015-06-01 15:39:52 +0200870}
871
872static int mma8452_write_event_config(struct iio_dev *indio_dev,
873 const struct iio_chan_spec *chan,
874 enum iio_event_type type,
875 enum iio_event_direction dir,
876 int state)
877{
878 struct mma8452_data *data = iio_priv(indio_dev);
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200879 const struct mma_chip_info *chip = data->chip_info;
Martin Kepplinger96c0cb22016-03-03 09:24:03 +0100880 int val, ret;
881
882 ret = mma8452_set_runtime_pm_state(data->client, state);
883 if (ret)
884 return ret;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200885
Martin Kepplinger4b042662016-01-16 15:35:20 +0100886 switch (dir) {
887 case IIO_EV_DIR_FALLING:
888 return mma8452_set_freefall_mode(data, state);
889 case IIO_EV_DIR_RISING:
890 val = i2c_smbus_read_byte_data(data->client, chip->ev_cfg);
891 if (val < 0)
892 return val;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200893
Martin Kepplinger4b042662016-01-16 15:35:20 +0100894 if (state) {
895 if (mma8452_freefall_mode_enabled(data)) {
896 val &= ~BIT(idx_x + chip->ev_cfg_chan_shift);
897 val &= ~BIT(idx_y + chip->ev_cfg_chan_shift);
898 val &= ~BIT(idx_z + chip->ev_cfg_chan_shift);
899 val |= MMA8452_FF_MT_CFG_OAE;
900 }
901 val |= BIT(chan->scan_index + chip->ev_cfg_chan_shift);
902 } else {
903 if (mma8452_freefall_mode_enabled(data))
904 return 0;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200905
Martin Kepplinger4b042662016-01-16 15:35:20 +0100906 val &= ~BIT(chan->scan_index + chip->ev_cfg_chan_shift);
907 }
Martin Fuzzey28e34272015-06-01 15:39:52 +0200908
Martin Kepplinger4b042662016-01-16 15:35:20 +0100909 val |= chip->ev_cfg_ele;
910
911 return mma8452_change_config(data, chip->ev_cfg, val);
912 default:
913 return -EINVAL;
914 }
Martin Fuzzey28e34272015-06-01 15:39:52 +0200915}
916
917static void mma8452_transient_interrupt(struct iio_dev *indio_dev)
918{
919 struct mma8452_data *data = iio_priv(indio_dev);
920 s64 ts = iio_get_time_ns();
921 int src;
922
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200923 src = i2c_smbus_read_byte_data(data->client, data->chip_info->ev_src);
Martin Fuzzey28e34272015-06-01 15:39:52 +0200924 if (src < 0)
925 return;
926
Martin Kepplinger4b042662016-01-16 15:35:20 +0100927 if (mma8452_freefall_mode_enabled(data)) {
928 iio_push_event(indio_dev,
929 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0,
930 IIO_MOD_X_AND_Y_AND_Z,
931 IIO_EV_TYPE_MAG,
932 IIO_EV_DIR_FALLING),
933 ts);
934 return;
935 }
936
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200937 if (src & data->chip_info->ev_src_xe)
Martin Fuzzey28e34272015-06-01 15:39:52 +0200938 iio_push_event(indio_dev,
939 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
Martin Kepplingerc5d0db02015-07-05 19:50:18 +0200940 IIO_EV_TYPE_MAG,
Martin Fuzzey28e34272015-06-01 15:39:52 +0200941 IIO_EV_DIR_RISING),
942 ts);
943
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200944 if (src & data->chip_info->ev_src_ye)
Martin Fuzzey28e34272015-06-01 15:39:52 +0200945 iio_push_event(indio_dev,
946 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y,
Martin Kepplingerc5d0db02015-07-05 19:50:18 +0200947 IIO_EV_TYPE_MAG,
Martin Fuzzey28e34272015-06-01 15:39:52 +0200948 IIO_EV_DIR_RISING),
949 ts);
950
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +0200951 if (src & data->chip_info->ev_src_ze)
Martin Fuzzey28e34272015-06-01 15:39:52 +0200952 iio_push_event(indio_dev,
953 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z,
Martin Kepplingerc5d0db02015-07-05 19:50:18 +0200954 IIO_EV_TYPE_MAG,
Martin Fuzzey28e34272015-06-01 15:39:52 +0200955 IIO_EV_DIR_RISING),
956 ts);
957}
958
959static irqreturn_t mma8452_interrupt(int irq, void *p)
960{
961 struct iio_dev *indio_dev = p;
962 struct mma8452_data *data = iio_priv(indio_dev);
Martin Kepplinger60f562e2015-09-01 13:45:10 +0200963 const struct mma_chip_info *chip = data->chip_info;
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +0200964 int ret = IRQ_NONE;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200965 int src;
966
967 src = i2c_smbus_read_byte_data(data->client, MMA8452_INT_SRC);
968 if (src < 0)
969 return IRQ_NONE;
970
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +0200971 if (src & MMA8452_INT_DRDY) {
972 iio_trigger_poll_chained(indio_dev->trig);
973 ret = IRQ_HANDLED;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200974 }
975
Martin Kepplinger60f562e2015-09-01 13:45:10 +0200976 if ((src & MMA8452_INT_TRANS &&
977 chip->ev_src == MMA8452_TRANSIENT_SRC) ||
978 (src & MMA8452_INT_FF_MT &&
979 chip->ev_src == MMA8452_FF_MT_SRC)) {
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +0200980 mma8452_transient_interrupt(indio_dev);
981 ret = IRQ_HANDLED;
982 }
983
984 return ret;
Martin Fuzzey28e34272015-06-01 15:39:52 +0200985}
986
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000987static irqreturn_t mma8452_trigger_handler(int irq, void *p)
988{
989 struct iio_poll_func *pf = p;
990 struct iio_dev *indio_dev = pf->indio_dev;
991 struct mma8452_data *data = iio_priv(indio_dev);
992 u8 buffer[16]; /* 3 16-bit channels + padding + ts */
993 int ret;
994
Hartmut Knaack686027f2015-08-02 22:43:51 +0200995 ret = mma8452_read(data, (__be16 *)buffer);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +0000996 if (ret < 0)
997 goto done;
998
999 iio_push_to_buffers_with_timestamp(indio_dev, buffer,
Hartmut Knaack686027f2015-08-02 22:43:51 +02001000 iio_get_time_ns());
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001001
1002done:
1003 iio_trigger_notify_done(indio_dev->trig);
Hartmut Knaack686027f2015-08-02 22:43:51 +02001004
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001005 return IRQ_HANDLED;
1006}
1007
Martin Fuzzey2a17698c2015-05-13 12:26:40 +02001008static int mma8452_reg_access_dbg(struct iio_dev *indio_dev,
1009 unsigned reg, unsigned writeval,
1010 unsigned *readval)
1011{
1012 int ret;
1013 struct mma8452_data *data = iio_priv(indio_dev);
1014
1015 if (reg > MMA8452_MAX_REG)
1016 return -EINVAL;
1017
1018 if (!readval)
1019 return mma8452_change_config(data, reg, writeval);
1020
1021 ret = i2c_smbus_read_byte_data(data->client, reg);
1022 if (ret < 0)
1023 return ret;
1024
1025 *readval = ret;
1026
1027 return 0;
1028}
1029
Martin Kepplinger4b042662016-01-16 15:35:20 +01001030static const struct iio_event_spec mma8452_freefall_event[] = {
1031 {
1032 .type = IIO_EV_TYPE_MAG,
1033 .dir = IIO_EV_DIR_FALLING,
1034 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
1035 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
1036 BIT(IIO_EV_INFO_PERIOD) |
1037 BIT(IIO_EV_INFO_HIGH_PASS_FILTER_3DB)
1038 },
1039};
1040
1041static const struct iio_event_spec mma8652_freefall_event[] = {
1042 {
1043 .type = IIO_EV_TYPE_MAG,
1044 .dir = IIO_EV_DIR_FALLING,
1045 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
1046 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
1047 BIT(IIO_EV_INFO_PERIOD)
1048 },
1049};
1050
Martin Fuzzey28e34272015-06-01 15:39:52 +02001051static const struct iio_event_spec mma8452_transient_event[] = {
1052 {
Martin Kepplingerc5d0db02015-07-05 19:50:18 +02001053 .type = IIO_EV_TYPE_MAG,
Martin Fuzzey28e34272015-06-01 15:39:52 +02001054 .dir = IIO_EV_DIR_RISING,
1055 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
Martin Fuzzey5dbbd192015-06-01 15:39:54 +02001056 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
Martin Fuzzey1e798412015-06-01 15:39:56 +02001057 BIT(IIO_EV_INFO_PERIOD) |
1058 BIT(IIO_EV_INFO_HIGH_PASS_FILTER_3DB)
Martin Fuzzey28e34272015-06-01 15:39:52 +02001059 },
1060};
1061
Martin Kepplinger60f562e2015-09-01 13:45:10 +02001062static const struct iio_event_spec mma8452_motion_event[] = {
1063 {
1064 .type = IIO_EV_TYPE_MAG,
1065 .dir = IIO_EV_DIR_RISING,
1066 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
1067 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
1068 BIT(IIO_EV_INFO_PERIOD)
1069 },
1070};
1071
Martin Fuzzey28e34272015-06-01 15:39:52 +02001072/*
1073 * Threshold is configured in fixed 8G/127 steps regardless of
1074 * currently selected scale for measurement.
1075 */
1076static IIO_CONST_ATTR_NAMED(accel_transient_scale, in_accel_scale, "0.617742");
1077
1078static struct attribute *mma8452_event_attributes[] = {
1079 &iio_const_attr_accel_transient_scale.dev_attr.attr,
1080 NULL,
1081};
1082
1083static struct attribute_group mma8452_event_attribute_group = {
1084 .attrs = mma8452_event_attributes,
Martin Fuzzey28e34272015-06-01 15:39:52 +02001085};
1086
Martin Kepplinger4b042662016-01-16 15:35:20 +01001087#define MMA8452_FREEFALL_CHANNEL(modifier) { \
1088 .type = IIO_ACCEL, \
1089 .modified = 1, \
1090 .channel2 = modifier, \
1091 .scan_index = -1, \
1092 .event_spec = mma8452_freefall_event, \
1093 .num_event_specs = ARRAY_SIZE(mma8452_freefall_event), \
1094}
1095
1096#define MMA8652_FREEFALL_CHANNEL(modifier) { \
1097 .type = IIO_ACCEL, \
1098 .modified = 1, \
1099 .channel2 = modifier, \
1100 .scan_index = -1, \
1101 .event_spec = mma8652_freefall_event, \
1102 .num_event_specs = ARRAY_SIZE(mma8652_freefall_event), \
1103}
1104
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001105#define MMA8452_CHANNEL(axis, idx, bits) { \
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001106 .type = IIO_ACCEL, \
1107 .modified = 1, \
1108 .channel2 = IIO_MOD_##axis, \
1109 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
Hartmut Knaack686027f2015-08-02 22:43:51 +02001110 BIT(IIO_CHAN_INFO_CALIBBIAS), \
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001111 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
Hartmut Knaack686027f2015-08-02 22:43:51 +02001112 BIT(IIO_CHAN_INFO_SCALE) | \
Martin Kepplingered859fc2016-04-25 14:08:25 +02001113 BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY) | \
1114 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001115 .scan_index = idx, \
1116 .scan_type = { \
1117 .sign = 's', \
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001118 .realbits = (bits), \
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001119 .storagebits = 16, \
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001120 .shift = 16 - (bits), \
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001121 .endianness = IIO_BE, \
1122 }, \
Martin Fuzzey28e34272015-06-01 15:39:52 +02001123 .event_spec = mma8452_transient_event, \
1124 .num_event_specs = ARRAY_SIZE(mma8452_transient_event), \
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001125}
1126
Martin Kepplinger417e0082015-09-01 13:45:11 +02001127#define MMA8652_CHANNEL(axis, idx, bits) { \
1128 .type = IIO_ACCEL, \
1129 .modified = 1, \
1130 .channel2 = IIO_MOD_##axis, \
1131 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1132 BIT(IIO_CHAN_INFO_CALIBBIAS), \
1133 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
Martin Kepplingered859fc2016-04-25 14:08:25 +02001134 BIT(IIO_CHAN_INFO_SCALE) | \
1135 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
Martin Kepplinger417e0082015-09-01 13:45:11 +02001136 .scan_index = idx, \
1137 .scan_type = { \
1138 .sign = 's', \
1139 .realbits = (bits), \
1140 .storagebits = 16, \
1141 .shift = 16 - (bits), \
1142 .endianness = IIO_BE, \
1143 }, \
1144 .event_spec = mma8452_motion_event, \
1145 .num_event_specs = ARRAY_SIZE(mma8452_motion_event), \
1146}
1147
Martin Kepplinger244a93f2016-01-16 15:35:22 +01001148static const struct iio_chan_spec mma8451_channels[] = {
1149 MMA8452_CHANNEL(X, idx_x, 14),
1150 MMA8452_CHANNEL(Y, idx_y, 14),
1151 MMA8452_CHANNEL(Z, idx_z, 14),
1152 IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
1153 MMA8452_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
1154};
1155
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001156static const struct iio_chan_spec mma8452_channels[] = {
Martin Kepplingere60378c2015-12-15 17:45:00 +01001157 MMA8452_CHANNEL(X, idx_x, 12),
1158 MMA8452_CHANNEL(Y, idx_y, 12),
1159 MMA8452_CHANNEL(Z, idx_z, 12),
1160 IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
Martin Kepplinger4b042662016-01-16 15:35:20 +01001161 MMA8452_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001162};
1163
Martin Kepplingerc5ea1b582015-09-01 13:45:09 +02001164static const struct iio_chan_spec mma8453_channels[] = {
Martin Kepplingere60378c2015-12-15 17:45:00 +01001165 MMA8452_CHANNEL(X, idx_x, 10),
1166 MMA8452_CHANNEL(Y, idx_y, 10),
1167 MMA8452_CHANNEL(Z, idx_z, 10),
1168 IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
Martin Kepplinger4b042662016-01-16 15:35:20 +01001169 MMA8452_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
Martin Kepplingerc5ea1b582015-09-01 13:45:09 +02001170};
1171
Martin Kepplinger417e0082015-09-01 13:45:11 +02001172static const struct iio_chan_spec mma8652_channels[] = {
Martin Kepplingere60378c2015-12-15 17:45:00 +01001173 MMA8652_CHANNEL(X, idx_x, 12),
1174 MMA8652_CHANNEL(Y, idx_y, 12),
1175 MMA8652_CHANNEL(Z, idx_z, 12),
1176 IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
Martin Kepplinger4b042662016-01-16 15:35:20 +01001177 MMA8652_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
Martin Kepplinger417e0082015-09-01 13:45:11 +02001178};
1179
1180static const struct iio_chan_spec mma8653_channels[] = {
Martin Kepplingere60378c2015-12-15 17:45:00 +01001181 MMA8652_CHANNEL(X, idx_x, 10),
1182 MMA8652_CHANNEL(Y, idx_y, 10),
1183 MMA8652_CHANNEL(Z, idx_z, 10),
1184 IIO_CHAN_SOFT_TIMESTAMP(idx_ts),
Martin Kepplinger4b042662016-01-16 15:35:20 +01001185 MMA8652_FREEFALL_CHANNEL(IIO_MOD_X_AND_Y_AND_Z),
Martin Kepplinger417e0082015-09-01 13:45:11 +02001186};
1187
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001188enum {
Martin Kepplinger244a93f2016-01-16 15:35:22 +01001189 mma8451,
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001190 mma8452,
Martin Kepplingerc5ea1b582015-09-01 13:45:09 +02001191 mma8453,
Martin Kepplinger417e0082015-09-01 13:45:11 +02001192 mma8652,
1193 mma8653,
Martin Kepplingere8731182016-03-09 12:01:29 +01001194 fxls8471,
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001195};
1196
1197static const struct mma_chip_info mma_chip_info_table[] = {
Martin Kepplinger244a93f2016-01-16 15:35:22 +01001198 [mma8451] = {
1199 .chip_id = MMA8451_DEVICE_ID,
1200 .channels = mma8451_channels,
1201 .num_channels = ARRAY_SIZE(mma8451_channels),
1202 /*
1203 * Hardware has fullscale of -2G, -4G, -8G corresponding to
1204 * raw value -8192 for 14 bit, -2048 for 12 bit or -512 for 10
1205 * bit.
1206 * The userspace interface uses m/s^2 and we declare micro units
1207 * So scale factor for 12 bit here is given by:
Martin Kepplinger8b8ff3a2016-03-03 09:24:01 +01001208 * g * N * 1000000 / 2048 for N = 2, 4, 8 and g=9.80665
Martin Kepplinger244a93f2016-01-16 15:35:22 +01001209 */
1210 .mma_scales = { {0, 2394}, {0, 4788}, {0, 9577} },
1211 .ev_cfg = MMA8452_TRANSIENT_CFG,
1212 .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
1213 .ev_cfg_chan_shift = 1,
1214 .ev_src = MMA8452_TRANSIENT_SRC,
1215 .ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE,
1216 .ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE,
1217 .ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE,
1218 .ev_ths = MMA8452_TRANSIENT_THS,
1219 .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
1220 .ev_count = MMA8452_TRANSIENT_COUNT,
1221 },
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001222 [mma8452] = {
1223 .chip_id = MMA8452_DEVICE_ID,
1224 .channels = mma8452_channels,
1225 .num_channels = ARRAY_SIZE(mma8452_channels),
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001226 .mma_scales = { {0, 9577}, {0, 19154}, {0, 38307} },
1227 .ev_cfg = MMA8452_TRANSIENT_CFG,
1228 .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
1229 .ev_cfg_chan_shift = 1,
1230 .ev_src = MMA8452_TRANSIENT_SRC,
1231 .ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE,
1232 .ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE,
1233 .ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE,
1234 .ev_ths = MMA8452_TRANSIENT_THS,
1235 .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
1236 .ev_count = MMA8452_TRANSIENT_COUNT,
1237 },
Martin Kepplingerc5ea1b582015-09-01 13:45:09 +02001238 [mma8453] = {
1239 .chip_id = MMA8453_DEVICE_ID,
1240 .channels = mma8453_channels,
1241 .num_channels = ARRAY_SIZE(mma8453_channels),
1242 .mma_scales = { {0, 38307}, {0, 76614}, {0, 153228} },
1243 .ev_cfg = MMA8452_TRANSIENT_CFG,
1244 .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
1245 .ev_cfg_chan_shift = 1,
1246 .ev_src = MMA8452_TRANSIENT_SRC,
1247 .ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE,
1248 .ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE,
1249 .ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE,
1250 .ev_ths = MMA8452_TRANSIENT_THS,
1251 .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
1252 .ev_count = MMA8452_TRANSIENT_COUNT,
1253 },
Martin Kepplinger417e0082015-09-01 13:45:11 +02001254 [mma8652] = {
1255 .chip_id = MMA8652_DEVICE_ID,
1256 .channels = mma8652_channels,
1257 .num_channels = ARRAY_SIZE(mma8652_channels),
1258 .mma_scales = { {0, 9577}, {0, 19154}, {0, 38307} },
1259 .ev_cfg = MMA8452_FF_MT_CFG,
1260 .ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
1261 .ev_cfg_chan_shift = 3,
1262 .ev_src = MMA8452_FF_MT_SRC,
1263 .ev_src_xe = MMA8452_FF_MT_SRC_XHE,
1264 .ev_src_ye = MMA8452_FF_MT_SRC_YHE,
1265 .ev_src_ze = MMA8452_FF_MT_SRC_ZHE,
1266 .ev_ths = MMA8452_FF_MT_THS,
1267 .ev_ths_mask = MMA8452_FF_MT_THS_MASK,
1268 .ev_count = MMA8452_FF_MT_COUNT,
1269 },
1270 [mma8653] = {
1271 .chip_id = MMA8653_DEVICE_ID,
1272 .channels = mma8653_channels,
1273 .num_channels = ARRAY_SIZE(mma8653_channels),
1274 .mma_scales = { {0, 38307}, {0, 76614}, {0, 153228} },
1275 .ev_cfg = MMA8452_FF_MT_CFG,
1276 .ev_cfg_ele = MMA8452_FF_MT_CFG_ELE,
1277 .ev_cfg_chan_shift = 3,
1278 .ev_src = MMA8452_FF_MT_SRC,
1279 .ev_src_xe = MMA8452_FF_MT_SRC_XHE,
1280 .ev_src_ye = MMA8452_FF_MT_SRC_YHE,
1281 .ev_src_ze = MMA8452_FF_MT_SRC_ZHE,
1282 .ev_ths = MMA8452_FF_MT_THS,
1283 .ev_ths_mask = MMA8452_FF_MT_THS_MASK,
1284 .ev_count = MMA8452_FF_MT_COUNT,
1285 },
Martin Kepplingere8731182016-03-09 12:01:29 +01001286 [fxls8471] = {
1287 .chip_id = FXLS8471_DEVICE_ID,
1288 .channels = mma8451_channels,
1289 .num_channels = ARRAY_SIZE(mma8451_channels),
1290 .mma_scales = { {0, 2394}, {0, 4788}, {0, 9577} },
1291 .ev_cfg = MMA8452_TRANSIENT_CFG,
1292 .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE,
1293 .ev_cfg_chan_shift = 1,
1294 .ev_src = MMA8452_TRANSIENT_SRC,
1295 .ev_src_xe = MMA8452_TRANSIENT_SRC_XTRANSE,
1296 .ev_src_ye = MMA8452_TRANSIENT_SRC_YTRANSE,
1297 .ev_src_ze = MMA8452_TRANSIENT_SRC_ZTRANSE,
1298 .ev_ths = MMA8452_TRANSIENT_THS,
1299 .ev_ths_mask = MMA8452_TRANSIENT_THS_MASK,
1300 .ev_count = MMA8452_TRANSIENT_COUNT,
1301 },
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001302};
1303
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001304static struct attribute *mma8452_attributes[] = {
1305 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1306 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
Martin Fuzzey1e798412015-06-01 15:39:56 +02001307 &iio_dev_attr_in_accel_filter_high_pass_3db_frequency_available.dev_attr.attr,
Martin Kepplingered859fc2016-04-25 14:08:25 +02001308 &iio_dev_attr_in_accel_oversampling_ratio_available.dev_attr.attr,
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001309 NULL
1310};
1311
1312static const struct attribute_group mma8452_group = {
1313 .attrs = mma8452_attributes,
1314};
1315
1316static const struct iio_info mma8452_info = {
1317 .attrs = &mma8452_group,
1318 .read_raw = &mma8452_read_raw,
1319 .write_raw = &mma8452_write_raw,
Martin Fuzzey28e34272015-06-01 15:39:52 +02001320 .event_attrs = &mma8452_event_attribute_group,
1321 .read_event_value = &mma8452_read_thresh,
1322 .write_event_value = &mma8452_write_thresh,
1323 .read_event_config = &mma8452_read_event_config,
1324 .write_event_config = &mma8452_write_event_config,
Martin Fuzzey2a17698c2015-05-13 12:26:40 +02001325 .debugfs_reg_access = &mma8452_reg_access_dbg,
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001326 .driver_module = THIS_MODULE,
1327};
1328
1329static const unsigned long mma8452_scan_masks[] = {0x7, 0};
1330
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +02001331static int mma8452_data_rdy_trigger_set_state(struct iio_trigger *trig,
1332 bool state)
1333{
1334 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1335 struct mma8452_data *data = iio_priv(indio_dev);
Martin Kepplinger96c0cb22016-03-03 09:24:03 +01001336 int reg, ret;
1337
1338 ret = mma8452_set_runtime_pm_state(data->client, state);
1339 if (ret)
1340 return ret;
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +02001341
1342 reg = i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG4);
1343 if (reg < 0)
1344 return reg;
1345
1346 if (state)
1347 reg |= MMA8452_INT_DRDY;
1348 else
1349 reg &= ~MMA8452_INT_DRDY;
1350
1351 return mma8452_change_config(data, MMA8452_CTRL_REG4, reg);
1352}
1353
1354static int mma8452_validate_device(struct iio_trigger *trig,
1355 struct iio_dev *indio_dev)
1356{
1357 struct iio_dev *indio = iio_trigger_get_drvdata(trig);
1358
1359 if (indio != indio_dev)
1360 return -EINVAL;
1361
1362 return 0;
1363}
1364
1365static const struct iio_trigger_ops mma8452_trigger_ops = {
1366 .set_trigger_state = mma8452_data_rdy_trigger_set_state,
1367 .validate_device = mma8452_validate_device,
1368 .owner = THIS_MODULE,
1369};
1370
1371static int mma8452_trigger_setup(struct iio_dev *indio_dev)
1372{
1373 struct mma8452_data *data = iio_priv(indio_dev);
1374 struct iio_trigger *trig;
1375 int ret;
1376
1377 trig = devm_iio_trigger_alloc(&data->client->dev, "%s-dev%d",
1378 indio_dev->name,
1379 indio_dev->id);
1380 if (!trig)
1381 return -ENOMEM;
1382
1383 trig->dev.parent = &data->client->dev;
1384 trig->ops = &mma8452_trigger_ops;
1385 iio_trigger_set_drvdata(trig, indio_dev);
1386
1387 ret = iio_trigger_register(trig);
1388 if (ret)
1389 return ret;
1390
1391 indio_dev->trig = trig;
Hartmut Knaack686027f2015-08-02 22:43:51 +02001392
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +02001393 return 0;
1394}
1395
1396static void mma8452_trigger_cleanup(struct iio_dev *indio_dev)
1397{
1398 if (indio_dev->trig)
1399 iio_trigger_unregister(indio_dev->trig);
1400}
1401
Martin Fuzzeyecabae72015-05-13 12:26:38 +02001402static int mma8452_reset(struct i2c_client *client)
1403{
1404 int i;
1405 int ret;
1406
1407 ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG2,
1408 MMA8452_CTRL_REG2_RST);
1409 if (ret < 0)
1410 return ret;
1411
1412 for (i = 0; i < 10; i++) {
1413 usleep_range(100, 200);
1414 ret = i2c_smbus_read_byte_data(client, MMA8452_CTRL_REG2);
1415 if (ret == -EIO)
1416 continue; /* I2C comm reset */
1417 if (ret < 0)
1418 return ret;
1419 if (!(ret & MMA8452_CTRL_REG2_RST))
1420 return 0;
1421 }
1422
1423 return -ETIMEDOUT;
1424}
1425
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001426static const struct of_device_id mma8452_dt_ids[] = {
Martin Kepplinger244a93f2016-01-16 15:35:22 +01001427 { .compatible = "fsl,mma8451", .data = &mma_chip_info_table[mma8451] },
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001428 { .compatible = "fsl,mma8452", .data = &mma_chip_info_table[mma8452] },
Martin Kepplingerc5ea1b582015-09-01 13:45:09 +02001429 { .compatible = "fsl,mma8453", .data = &mma_chip_info_table[mma8453] },
Martin Kepplinger417e0082015-09-01 13:45:11 +02001430 { .compatible = "fsl,mma8652", .data = &mma_chip_info_table[mma8652] },
1431 { .compatible = "fsl,mma8653", .data = &mma_chip_info_table[mma8653] },
Martin Kepplingere8731182016-03-09 12:01:29 +01001432 { .compatible = "fsl,fxls8471", .data = &mma_chip_info_table[fxls8471] },
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001433 { }
1434};
1435MODULE_DEVICE_TABLE(of, mma8452_dt_ids);
1436
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001437static int mma8452_probe(struct i2c_client *client,
1438 const struct i2c_device_id *id)
1439{
1440 struct mma8452_data *data;
1441 struct iio_dev *indio_dev;
1442 int ret;
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001443 const struct of_device_id *match;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001444
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001445 match = of_match_device(mma8452_dt_ids, &client->dev);
1446 if (!match) {
1447 dev_err(&client->dev, "unknown device model\n");
1448 return -ENODEV;
1449 }
1450
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001451 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1452 if (!indio_dev)
1453 return -ENOMEM;
1454
1455 data = iio_priv(indio_dev);
1456 data->client = client;
1457 mutex_init(&data->lock);
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001458 data->chip_info = match->data;
1459
Martin Kepplinger417e0082015-09-01 13:45:11 +02001460 ret = i2c_smbus_read_byte_data(client, MMA8452_WHO_AM_I);
1461 if (ret < 0)
1462 return ret;
1463
1464 switch (ret) {
Martin Kepplinger244a93f2016-01-16 15:35:22 +01001465 case MMA8451_DEVICE_ID:
Martin Kepplinger417e0082015-09-01 13:45:11 +02001466 case MMA8452_DEVICE_ID:
1467 case MMA8453_DEVICE_ID:
1468 case MMA8652_DEVICE_ID:
1469 case MMA8653_DEVICE_ID:
Martin Kepplingere8731182016-03-09 12:01:29 +01001470 case FXLS8471_DEVICE_ID:
Martin Kepplinger417e0082015-09-01 13:45:11 +02001471 if (ret == data->chip_info->chip_id)
1472 break;
1473 default:
1474 return -ENODEV;
1475 }
1476
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001477 dev_info(&client->dev, "registering %s accelerometer; ID 0x%x\n",
1478 match->compatible, data->chip_info->chip_id);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001479
1480 i2c_set_clientdata(client, indio_dev);
1481 indio_dev->info = &mma8452_info;
1482 indio_dev->name = id->name;
1483 indio_dev->dev.parent = &client->dev;
1484 indio_dev->modes = INDIO_DIRECT_MODE;
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001485 indio_dev->channels = data->chip_info->channels;
1486 indio_dev->num_channels = data->chip_info->num_channels;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001487 indio_dev->available_scan_masks = mma8452_scan_masks;
1488
Martin Fuzzeyecabae72015-05-13 12:26:38 +02001489 ret = mma8452_reset(client);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001490 if (ret < 0)
1491 return ret;
1492
1493 data->data_cfg = MMA8452_DATA_CFG_FS_2G;
1494 ret = i2c_smbus_write_byte_data(client, MMA8452_DATA_CFG,
Hartmut Knaack686027f2015-08-02 22:43:51 +02001495 data->data_cfg);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001496 if (ret < 0)
1497 return ret;
1498
Martin Fuzzey28e34272015-06-01 15:39:52 +02001499 /*
1500 * By default set transient threshold to max to avoid events if
1501 * enabling without configuring threshold.
1502 */
1503 ret = i2c_smbus_write_byte_data(client, MMA8452_TRANSIENT_THS,
1504 MMA8452_TRANSIENT_THS_MASK);
1505 if (ret < 0)
1506 return ret;
1507
1508 if (client->irq) {
1509 /*
Martin Kepplinger60f562e2015-09-01 13:45:10 +02001510 * Although we enable the interrupt sources once and for
1511 * all here the event detection itself is not enabled until
1512 * userspace asks for it by mma8452_write_event_config()
Martin Fuzzey28e34272015-06-01 15:39:52 +02001513 */
Martin Kepplinger60f562e2015-09-01 13:45:10 +02001514 int supported_interrupts = MMA8452_INT_DRDY |
1515 MMA8452_INT_TRANS |
1516 MMA8452_INT_FF_MT;
1517 int enabled_interrupts = MMA8452_INT_TRANS |
1518 MMA8452_INT_FF_MT;
Martin Kepplingerd2a3e092015-10-15 15:10:32 +02001519 int irq2;
Martin Fuzzey28e34272015-06-01 15:39:52 +02001520
Martin Kepplingerd2a3e092015-10-15 15:10:32 +02001521 irq2 = of_irq_get_byname(client->dev.of_node, "INT2");
1522
1523 if (irq2 == client->irq) {
1524 dev_dbg(&client->dev, "using interrupt line INT2\n");
1525 } else {
1526 ret = i2c_smbus_write_byte_data(client,
1527 MMA8452_CTRL_REG5,
1528 supported_interrupts);
1529 if (ret < 0)
1530 return ret;
1531
1532 dev_dbg(&client->dev, "using interrupt line INT1\n");
1533 }
Martin Fuzzey28e34272015-06-01 15:39:52 +02001534
1535 ret = i2c_smbus_write_byte_data(client,
1536 MMA8452_CTRL_REG4,
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +02001537 enabled_interrupts);
1538 if (ret < 0)
1539 return ret;
1540
1541 ret = mma8452_trigger_setup(indio_dev);
Martin Fuzzey28e34272015-06-01 15:39:52 +02001542 if (ret < 0)
1543 return ret;
1544 }
1545
Martin Fuzzeyecabae72015-05-13 12:26:38 +02001546 data->ctrl_reg1 = MMA8452_CTRL_ACTIVE |
Hartmut Knaack686027f2015-08-02 22:43:51 +02001547 (MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT);
Martin Fuzzeyecabae72015-05-13 12:26:38 +02001548 ret = i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG1,
1549 data->ctrl_reg1);
1550 if (ret < 0)
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +02001551 goto trigger_cleanup;
Martin Fuzzeyecabae72015-05-13 12:26:38 +02001552
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001553 ret = iio_triggered_buffer_setup(indio_dev, NULL,
Hartmut Knaack686027f2015-08-02 22:43:51 +02001554 mma8452_trigger_handler, NULL);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001555 if (ret < 0)
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +02001556 goto trigger_cleanup;
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001557
Martin Fuzzey28e34272015-06-01 15:39:52 +02001558 if (client->irq) {
1559 ret = devm_request_threaded_irq(&client->dev,
1560 client->irq,
1561 NULL, mma8452_interrupt,
1562 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1563 client->name, indio_dev);
1564 if (ret)
1565 goto buffer_cleanup;
1566 }
1567
Martin Kepplinger96c0cb22016-03-03 09:24:03 +01001568 ret = pm_runtime_set_active(&client->dev);
1569 if (ret < 0)
1570 goto buffer_cleanup;
1571
1572 pm_runtime_enable(&client->dev);
1573 pm_runtime_set_autosuspend_delay(&client->dev,
1574 MMA8452_AUTO_SUSPEND_DELAY_MS);
1575 pm_runtime_use_autosuspend(&client->dev);
1576
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001577 ret = iio_device_register(indio_dev);
1578 if (ret < 0)
1579 goto buffer_cleanup;
Martin Fuzzey28e34272015-06-01 15:39:52 +02001580
Martin Kepplinger4b042662016-01-16 15:35:20 +01001581 ret = mma8452_set_freefall_mode(data, false);
1582 if (ret)
1583 return ret;
1584
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001585 return 0;
1586
1587buffer_cleanup:
1588 iio_triggered_buffer_cleanup(indio_dev);
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +02001589
1590trigger_cleanup:
1591 mma8452_trigger_cleanup(indio_dev);
1592
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001593 return ret;
1594}
1595
1596static int mma8452_remove(struct i2c_client *client)
1597{
1598 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1599
1600 iio_device_unregister(indio_dev);
Martin Kepplinger96c0cb22016-03-03 09:24:03 +01001601
1602 pm_runtime_disable(&client->dev);
1603 pm_runtime_set_suspended(&client->dev);
1604 pm_runtime_put_noidle(&client->dev);
1605
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001606 iio_triggered_buffer_cleanup(indio_dev);
Martin Fuzzeyae6d9ce2015-06-01 15:39:58 +02001607 mma8452_trigger_cleanup(indio_dev);
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001608 mma8452_standby(iio_priv(indio_dev));
1609
1610 return 0;
1611}
1612
Martin Kepplinger96c0cb22016-03-03 09:24:03 +01001613#ifdef CONFIG_PM
1614static int mma8452_runtime_suspend(struct device *dev)
1615{
1616 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1617 struct mma8452_data *data = iio_priv(indio_dev);
1618 int ret;
1619
1620 mutex_lock(&data->lock);
1621 ret = mma8452_standby(data);
1622 mutex_unlock(&data->lock);
1623 if (ret < 0) {
1624 dev_err(&data->client->dev, "powering off device failed\n");
1625 return -EAGAIN;
1626 }
1627
1628 return 0;
1629}
1630
1631static int mma8452_runtime_resume(struct device *dev)
1632{
1633 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1634 struct mma8452_data *data = iio_priv(indio_dev);
1635 int ret, sleep_val;
1636
1637 ret = mma8452_active(data);
1638 if (ret < 0)
1639 return ret;
1640
1641 ret = mma8452_get_odr_index(data);
1642 sleep_val = 1000 / mma8452_samp_freq[ret][0];
1643 if (sleep_val < 20)
1644 usleep_range(sleep_val * 1000, 20000);
1645 else
1646 msleep_interruptible(sleep_val);
1647
1648 return 0;
1649}
1650#endif
1651
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001652#ifdef CONFIG_PM_SLEEP
1653static int mma8452_suspend(struct device *dev)
1654{
1655 return mma8452_standby(iio_priv(i2c_get_clientdata(
1656 to_i2c_client(dev))));
1657}
1658
1659static int mma8452_resume(struct device *dev)
1660{
1661 return mma8452_active(iio_priv(i2c_get_clientdata(
1662 to_i2c_client(dev))));
1663}
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001664#endif
1665
Martin Kepplinger96c0cb22016-03-03 09:24:03 +01001666static const struct dev_pm_ops mma8452_pm_ops = {
1667 SET_SYSTEM_SLEEP_PM_OPS(mma8452_suspend, mma8452_resume)
1668 SET_RUNTIME_PM_OPS(mma8452_runtime_suspend,
1669 mma8452_runtime_resume, NULL)
1670};
1671
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001672static const struct i2c_device_id mma8452_id[] = {
Martin Kepplingerddb851a2016-03-14 12:33:14 +01001673 { "mma8451", mma8451 },
Martin Kepplingerc3cdd6e2015-09-01 13:45:08 +02001674 { "mma8452", mma8452 },
Martin Kepplingerc5ea1b582015-09-01 13:45:09 +02001675 { "mma8453", mma8453 },
Martin Kepplinger417e0082015-09-01 13:45:11 +02001676 { "mma8652", mma8652 },
1677 { "mma8653", mma8653 },
Martin Kepplingere8731182016-03-09 12:01:29 +01001678 { "fxls8471", fxls8471 },
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001679 { }
1680};
1681MODULE_DEVICE_TABLE(i2c, mma8452_id);
1682
1683static struct i2c_driver mma8452_driver = {
1684 .driver = {
1685 .name = "mma8452",
Martin Fuzzeya3fb96a2014-11-07 14:06:00 +00001686 .of_match_table = of_match_ptr(mma8452_dt_ids),
Martin Kepplinger96c0cb22016-03-03 09:24:03 +01001687 .pm = &mma8452_pm_ops,
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001688 },
1689 .probe = mma8452_probe,
1690 .remove = mma8452_remove,
1691 .id_table = mma8452_id,
1692};
1693module_i2c_driver(mma8452_driver);
1694
1695MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
Martin Kepplingerf26ab1a2016-06-03 14:51:52 +02001696MODULE_DESCRIPTION("Freescale / NXP MMA8452 accelerometer driver");
Peter Meerwaldc7eeea92014-02-05 09:51:00 +00001697MODULE_LICENSE("GPL");