blob: e3ada395400593e88992e6767f5fdf1b7c84ad97 [file] [log] [blame]
Srinivas Ramana3cac2782017-09-13 16:31:17 +05301/*
2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14&soc {
15 tlmm: pinctrl@1000000 {
16 compatible = "qcom,msm8953-pinctrl";
17 reg = <0x1000000 0x300000>;
18 interrupts = <0 208 0>;
19 gpio-controller;
20 #gpio-cells = <2>;
21 interrupt-controller;
22 #interrupt-cells = <2>;
23
24 pmx-uartconsole {
25 uart_console_active: uart_console_active {
26 mux {
27 pins = "gpio4", "gpio5";
28 function = "blsp_uart2";
29 };
30
31 config {
32 pins = "gpio4", "gpio5";
33 drive-strength = <2>;
34 bias-disable;
35 };
36 };
37
38 uart_console_sleep: uart_console_sleep {
39 mux {
40 pins = "gpio4", "gpio5";
41 function = "blsp_uart2";
42 };
43
44 config {
45 pins = "gpio4", "gpio5";
46 drive-strength = <2>;
47 bias-pull-down;
48 };
49 };
50
51 };
52 cci {
53 cci0_active: cci0_active {
54 /* cci0 active state */
55 mux {
56 /* CLK, DATA */
57 pins = "gpio29", "gpio30";
58 function = "cci_i2c";
59 };
60
61 config {
62 pins = "gpio29", "gpio30";
63 drive-strength = <2>; /* 2 MA */
64 bias-disable; /* No PULL */
65 };
66 };
67
68 cci0_suspend: cci0_suspend {
69 /* cci0 suspended state */
70 mux {
71 /* CLK, DATA */
72 pins = "gpio29", "gpio30";
73 function = "cci_i2c";
74 };
75
76 config {
77 pins = "gpio29", "gpio30";
78 drive-strength = <2>; /* 2 MA */
79 bias-disable; /* No PULL */
80 };
81 };
82
83 cci1_active: cci1_active {
84 /* cci1 active state */
85 mux {
86 /* CLK, DATA */
87 pins = "gpio31", "gpio32";
88 function = "cci_i2c";
89 };
90
91 config {
92 pins = "gpio31", "gpio32";
93 drive-strength = <2>; /* 2 MA */
94 bias-disable; /* No PULL */
95 };
96 };
97
98 cci1_suspend: cci1_suspend {
99 /* cci1 suspended state */
100 mux {
101 /* CLK, DATA */
102 pins = "gpio31", "gpio32";
103 function = "cci_i2c";
104 };
105
106 config {
107 pins = "gpio31", "gpio32";
108 drive-strength = <2>; /* 2 MA */
109 bias-disable; /* No PULL */
110 };
111 };
112 };
113
114 /*sensors */
115 cam_sensor_mclk0_default: cam_sensor_mclk0_default {
116 /* MCLK0 */
117 mux {
118 /* CLK, DATA */
119 pins = "gpio26";
120 function = "cam_mclk";
121 };
122
123 config {
124 pins = "gpio26";
125 bias-disable; /* No PULL */
126 drive-strength = <2>; /* 2 MA */
127 };
128 };
129
130 cam_sensor_mclk0_sleep: cam_sensor_mclk0_sleep {
131 /* MCLK0 */
132 mux {
133 /* CLK, DATA */
134 pins = "gpio26";
135 function = "cam_mclk";
136 };
137
138 config {
139 pins = "gpio26";
140 bias-pull-down; /* PULL DOWN */
141 drive-strength = <2>; /* 2 MA */
142 };
143 };
144
145 cam_sensor_rear_default: cam_sensor_rear_default {
146 /* RESET, STANDBY */
147 mux {
148 pins = "gpio40", "gpio39";
149 function = "gpio";
150 };
151
152 config {
153 pins = "gpio40","gpio39";
154 bias-disable; /* No PULL */
155 drive-strength = <2>; /* 2 MA */
156 };
157 };
158
159 cam_sensor_rear_sleep: cam_sensor_rear_sleep {
160 /* RESET, STANDBY */
161 mux {
162 pins = "gpio40","gpio39";
163 function = "gpio";
164 };
165
166 config {
167 pins = "gpio40","gpio39";
168 bias-disable; /* No PULL */
169 drive-strength = <2>; /* 2 MA */
170 };
171 };
172
173 cam_sensor_rear_vana: cam_sensor_rear_vdig {
174 /* VDIG */
175 mux {
176 pins = "gpio134";
177 function = "gpio";
178 };
179
180 config {
181 pins = "gpio134";
182 bias-disable; /* No PULL */
183 drive-strength = <2>; /* 2 MA */
184 };
185 };
186
187 cam_sensor_rear_vana_sleep: cam_sensor_rear_vdig_sleep {
188 /* VDIG */
189 mux {
190 pins = "gpio134";
191 function = "gpio";
192 };
193
194 config {
195 pins = "gpio134";
196 bias-disable; /* No PULL */
197 drive-strength = <2>; /* 2 MA */
198 };
199 };
200
201 cam_sensor_mclk1_default: cam_sensor_mclk1_default {
202 /* MCLK1 */
203 mux {
204 /* CLK, DATA */
205 pins = "gpio27";
206 function = "cam_mclk";
207 };
208
209 config {
210 pins = "gpio27";
211 bias-disable; /* No PULL */
212 drive-strength = <2>; /* 2 MA */
213 };
214 };
215
216 cam_sensor_mclk1_sleep: cam_sensor_mclk1_sleep {
217 /* MCLK1 */
218 mux {
219 /* CLK, DATA */
220 pins = "gpio27";
221 function = "cam_mclk";
222 };
223
224 config {
225 pins = "gpio27";
226 bias-pull-down; /* PULL DOWN */
227 drive-strength = <2>; /* 2 MA */
228 };
229 };
230
231 cam_sensor_front_default: cam_sensor_front_default {
232 /* RESET, STANDBY */
233 mux {
234 pins = "gpio131","gpio132";
235 function = "gpio";
236 };
237
238 config {
239 pins = "gpio131","gpio132";
240 bias-disable; /* No PULL */
241 drive-strength = <2>; /* 2 MA */
242 };
243 };
244
245 cam_sensor_front_sleep: cam_sensor_front_sleep {
246 /* RESET, STANDBY */
247 mux {
248 pins = "gpio131","gpio132";
249 function = "gpio";
250 };
251
252 config {
253 pins = "gpio131","gpio132";
254 bias-disable; /* No PULL */
255 drive-strength = <2>; /* 2 MA */
256 };
257 };
258
259 cam_sensor_mclk2_default: cam_sensor_mclk2_default {
260 /* MCLK2 */
261 mux {
262 /* CLK, DATA */
263 pins = "gpio28";
264 function = "cam_mclk";
265 };
266
267 config {
268 pins = "gpio28";
269 bias-disable; /* No PULL */
270 drive-strength = <2>; /* 2 MA */
271 };
272 };
273
274 cam_sensor_mclk2_sleep: cam_sensor_mclk2_sleep {
275 /* MCLK2 */
276 mux {
277 /* CLK, DATA */
278 pins = "gpio28";
279 function = "cam_mclk";
280 };
281
282 config {
283 pins = "gpio28";
284 bias-pull-down; /* PULL DOWN */
285 drive-strength = <2>; /* 2 MA */
286 };
287 };
288
289 cam_sensor_front1_default: cam_sensor_front1_default {
290 /* RESET, STANDBY */
291 mux {
292 pins = "gpio129", "gpio130";
293 function = "gpio";
294 };
295
296 config {
297 pins = "gpio129", "gpio130";
298 bias-disable; /* No PULL */
299 drive-strength = <2>; /* 2 MA */
300 };
301 };
302
303 cam_sensor_front1_sleep: cam_sensor_front1_sleep {
304 /* RESET, STANDBY */
305 mux {
306 pins = "gpio129", "gpio130";
307 function = "gpio";
308 };
309
310 config {
311 pins = "gpio129", "gpio130";
312 bias-disable; /* No PULL */
313 drive-strength = <2>; /* 2 MA */
314 };
315 };
316
317 pmx_adv7533_int: pmx_adv7533_int {
318 adv7533_int_active: adv7533_int_active {
319 mux {
320 pins = "gpio90";
321 function = "gpio";
322 };
323
324 config {
325 pins = "gpio90";
326 drive-strength = <16>;
327 bias-disable;
328 };
329 };
330
331 adv7533_int_suspend: adv7533_int_suspend {
332 mux {
333 pins = "gpio90";
334 function = "gpio";
335 };
336
337 config {
338 pins = "gpio90";
339 drive-strength = <16>;
340 bias-disable;
341 };
342 };
343
344 };
345
346 pmx_mdss: pmx_mdss {
347 mdss_dsi_active: mdss_dsi_active {
348 mux {
349 pins = "gpio61", "gpio59";
350 function = "gpio";
351 };
352
353 config {
354 pins = "gpio61", "gpio59";
355 drive-strength = <8>; /* 8 mA */
356 bias-disable = <0>; /* no pull */
357 output-high;
358 };
359 };
360
361 mdss_dsi_suspend: mdss_dsi_suspend {
362 mux {
363 pins = "gpio61", "gpio59";
364 function = "gpio";
365 };
366
367 config {
368 pins = "gpio61", "gpio59";
369 drive-strength = <2>; /* 2 mA */
370 bias-pull-down; /* pull down */
371 };
372 };
373 };
374
375 pmx_mdss_te {
376 mdss_te_active: mdss_te_active {
377 mux {
378 pins = "gpio24";
379 function = "mdp_vsync";
380 };
381 config {
382 pins = "gpio24";
383 drive-strength = <2>; /* 8 mA */
384 bias-pull-down; /* pull down*/
385 };
386 };
387
388 mdss_te_suspend: mdss_te_suspend {
389 mux {
390 pins = "gpio24";
391 function = "mdp_vsync";
392 };
393 config {
394 pins = "gpio24";
395 drive-strength = <2>; /* 2 mA */
396 bias-pull-down; /* pull down */
397 };
398 };
399 };
400
401 hsuart_active: default {
402 mux {
403 pins = "gpio12", "gpio13", "gpio14", "gpio15";
404 function = "blsp_uart4";
405 };
406
407 config {
408 pins = "gpio12", "gpio13", "gpio14", "gpio15";
409 drive-strength = <16>;
410 bias-disable;
411 };
412 };
413
414 hsuart_sleep: sleep {
415 mux {
416 pins = "gpio12", "gpio13", "gpio14", "gpio15";
417 function = "gpio";
418 };
419
420 config {
421 pins = "gpio12", "gpio13", "gpio14", "gpio15";
422 drive-strength = <2>;
423 bias-disable;
424 };
425 };
426
427 /* SDC pin type */
428 sdc1_clk_on: sdc1_clk_on {
429 config {
430 pins = "sdc1_clk";
431 bias-disable; /* NO pull */
432 drive-strength = <16>; /* 16 MA */
433 };
434 };
435
436 sdc1_clk_off: sdc1_clk_off {
437 config {
438 pins = "sdc1_clk";
439 bias-disable; /* NO pull */
440 drive-strength = <2>; /* 2 MA */
441 };
442 };
443
444 sdc1_cmd_on: sdc1_cmd_on {
445 config {
446 pins = "sdc1_cmd";
447 bias-pull-up; /* pull up */
448 drive-strength = <10>; /* 10 MA */
449 };
450 };
451
452 sdc1_cmd_off: sdc1_cmd_off {
453 config {
454 pins = "sdc1_cmd";
455 num-grp-pins = <1>;
456 bias-pull-up; /* pull up */
457 drive-strength = <2>; /* 2 MA */
458 };
459 };
460
461 sdc1_data_on: sdc1_data_on {
462 config {
463 pins = "sdc1_data";
464 bias-pull-up; /* pull up */
465 drive-strength = <10>; /* 10 MA */
466 };
467 };
468
469 sdc1_data_off: sdc1_data_off {
470 config {
471 pins = "sdc1_data";
472 bias-pull-up; /* pull up */
473 drive-strength = <2>; /* 2 MA */
474 };
475 };
476
477 sdc1_rclk_on: sdc1_rclk_on {
478 config {
479 pins = "sdc1_rclk";
480 bias-pull-down; /* pull down */
481 };
482 };
483
484 sdc1_rclk_off: sdc1_rclk_off {
485 config {
486 pins = "sdc1_rclk";
487 bias-pull-down; /* pull down */
488 };
489 };
490
491 sdc2_clk_on: sdc2_clk_on {
492 config {
493 pins = "sdc2_clk";
494 drive-strength = <16>; /* 16 MA */
495 bias-disable; /* NO pull */
496 };
497 };
498
499 sdc2_clk_off: sdc2_clk_off {
500 config {
501 pins = "sdc2_clk";
502 bias-disable; /* NO pull */
503 drive-strength = <2>; /* 2 MA */
504 };
505 };
506
507 sdc2_cmd_on: sdc2_cmd_on {
508 config {
509 pins = "sdc2_cmd";
510 bias-pull-up; /* pull up */
511 drive-strength = <10>; /* 10 MA */
512 };
513 };
514
515 sdc2_cmd_off: sdc2_cmd_off {
516 config {
517 pins = "sdc2_cmd";
518 bias-pull-up; /* pull up */
519 drive-strength = <2>; /* 2 MA */
520 };
521 };
522
523 sdc2_data_on: sdc2_data_on {
524 config {
525 pins = "sdc2_data";
526 bias-pull-up; /* pull up */
527 drive-strength = <10>; /* 10 MA */
528 };
529 };
530
531 sdc2_data_off: sdc2_data_off {
532 config {
533 pins = "sdc2_data";
534 bias-pull-up; /* pull up */
535 drive-strength = <2>; /* 2 MA */
536 };
537 };
538
539 sdc2_cd_on: cd_on {
540 mux {
541 pins = "gpio133";
542 function = "gpio";
543 };
544
545 config {
546 pins = "gpio133";
547 drive-strength = <2>;
548 bias-pull-up;
549 };
550 };
551
552 sdc2_cd_off: cd_off {
553 mux {
554 pins = "gpio133";
555 function = "gpio";
556 };
557
558 config {
559 pins = "gpio133";
560 drive-strength = <2>;
561 bias-disable;
562 };
563 };
564
565 i2c_2 {
566 i2c_2_active: i2c_2_active {
567 /* active state */
568 mux {
569 pins = "gpio6", "gpio7";
570 function = "blsp_i2c2";
571 };
572
573 config {
574 pins = "gpio6", "gpio7";
575 drive-strength = <2>;
576 bias-disable;
577 };
578 };
579
580 i2c_2_sleep: i2c_2_sleep {
581 /* suspended state */
582 mux {
583 pins = "gpio6", "gpio7";
584 function = "gpio";
585 };
586
587 config {
588 pins = "gpio6", "gpio7";
589 drive-strength = <2>;
590 bias-disable;
591 };
592 };
593 };
594
595 i2c_3 {
596 i2c_3_active: i2c_3_active {
597 /* active state */
598 mux {
599 pins = "gpio10", "gpio11";
600 function = "blsp_i2c3";
601 };
602
603 config {
604 pins = "gpio10", "gpio11";
605 drive-strength = <2>;
606 bias-disable;
607 };
608 };
609
610 i2c_3_sleep: i2c_3_sleep {
611 /* suspended state */
612 mux {
613 pins = "gpio10", "gpio11";
614 function = "gpio";
615 };
616
617 config {
618 pins = "gpio10", "gpio11";
619 drive-strength = <2>;
620 bias-disable;
621 };
622 };
623 };
624
625 i2c_5 {
626 i2c_5_active: i2c_5_active {
627 /* active state */
628 mux {
629 pins = "gpio18", "gpio19";
630 function = "blsp_i2c5";
631 };
632
633 config {
634 pins = "gpio18", "gpio19";
635 drive-strength = <2>;
636 bias-disable;
637 };
638 };
639
640 i2c_5_sleep: i2c_5_sleep {
641 /* suspended state */
642 mux {
643 pins = "gpio18", "gpio19";
644 function = "gpio";
645 };
646
647 config {
648 pins = "gpio18", "gpio19";
649 drive-strength = <2>;
650 bias-disable;
651 };
652 };
653 };
654
655 pmx_rd_nfc_int {
656 /*qcom,pins = <&gp 17>;*/
657 pins = "gpio17";
658 qcom,pin-func = <0>;
659 qcom,num-grp-pins = <1>;
660 label = "pmx_nfc_int";
661
662 nfc_int_active: active {
663 drive-strength = <6>;
664 bias-pull-up;
665 };
666
667 nfc_int_suspend: suspend {
668 drive-strength = <6>;
669 bias-pull-up;
670 };
671 };
672
673 pmx_nfc_reset {
674 /*qcom,pins = <&gp 16>;*/
675 pins = "gpio16";
676 qcom,pin-func = <0>;
677 qcom,num-grp-pins = <1>;
678 label = "pmx_nfc_disable";
679
680 nfc_disable_active: active {
681 drive-strength = <6>;
682 bias-pull-up;
683 };
684
685 nfc_disable_suspend: suspend {
686 drive-strength = <6>;
687 bias-disable;
688 };
689 };
690
691 wcnss_pmux_5wire {
692 /* Active configuration of bus pins */
693 wcnss_default: wcnss_default {
694 wcss_wlan2 {
695 pins = "gpio76";
696 function = "wcss_wlan2";
697 };
698 wcss_wlan1 {
699 pins = "gpio77";
700 function = "wcss_wlan1";
701 };
702 wcss_wlan0 {
703 pins = "gpio78";
704 function = "wcss_wlan0";
705 };
706 wcss_wlan {
707 pins = "gpio79", "gpio80";
708 function = "wcss_wlan";
709 };
710
711 config {
712 pins = "gpio76", "gpio77",
713 "gpio78", "gpio79",
714 "gpio80";
715 drive-strength = <6>; /* 6 MA */
716 bias-pull-up; /* PULL UP */
717 };
718 };
719
720 wcnss_sleep: wcnss_sleep {
721 wcss_wlan2 {
722 pins = "gpio76";
723 function = "wcss_wlan2";
724 };
725 wcss_wlan1 {
726 pins = "gpio77";
727 function = "wcss_wlan1";
728 };
729 wcss_wlan0 {
730 pins = "gpio78";
731 function = "wcss_wlan0";
732 };
733 wcss_wlan {
734 pins = "gpio79", "gpio80";
735 function = "wcss_wlan";
736 };
737
738 config {
739 pins = "gpio76", "gpio77",
740 "gpio78", "gpio79",
741 "gpio80";
742 drive-strength = <2>; /* 2 MA */
743 bias-pull-down; /* PULL Down */
744 };
745 };
746 };
747
748 wcnss_pmux_gpio: wcnss_pmux_gpio {
749 wcnss_gpio_default: wcnss_gpio_default {
750 /* Active configuration of bus pins */
751 mux {
752 /* Uses general purpose pins */
753 pins = "gpio76", "gpio77",
754 "gpio78", "gpio79",
755 "gpio80";
756 function = "gpio";
757 };
758
759 config {
760 pins = "gpio76", "gpio77",
761 "gpio78", "gpio79",
762 "gpio80";
763 drive-strength = <6>; /* 6 MA */
764 bias-pull-up; /* PULL UP */
765 };
766 };
767 };
768
769 wcd9xxx_intr {
770 wcd_intr_default: wcd_intr_default{
771 mux {
772 pins = "gpio73";
773 function = "gpio";
774 };
775
776 config {
777 pins = "gpio73";
778 drive-strength = <2>; /* 2 mA */
779 bias-pull-down; /* pull down */
780 input-enable;
781 };
782 };
783 };
784
785 cdc_reset_ctrl {
786 cdc_reset_sleep: cdc_reset_sleep {
787 mux {
788 pins = "gpio67";
789 function = "gpio";
790 };
791 config {
792 pins = "gpio67";
793 drive-strength = <16>;
794 bias-disable;
795 output-low;
796 };
797 };
798 cdc_reset_active:cdc_reset_active {
799 mux {
800 pins = "gpio67";
801 function = "gpio";
802 };
803 config {
804 pins = "gpio67";
805 drive-strength = <16>;
806 bias-pull-down;
807 output-high;
808 };
809 };
810 };
811
812 cdc_mclk2_pin {
813 cdc_mclk2_sleep: cdc_mclk2_sleep {
814 mux {
815 pins = "gpio66";
816 function = "pri_mi2s";
817 };
818 config {
819 pins = "gpio66";
820 drive-strength = <2>; /* 2 mA */
821 bias-pull-down; /* PULL DOWN */
822 };
823 };
824 cdc_mclk2_active: cdc_mclk2_active {
825 mux {
826 pins = "gpio66";
827 function = "pri_mi2s";
828 };
829 config {
830 pins = "gpio66";
831 drive-strength = <8>; /* 8 mA */
832 bias-disable; /* NO PULL */
833 };
834 };
835 };
836
837 cdc-pdm-2-lines {
838 cdc_pdm_lines_2_act: pdm_lines_2_on {
839 mux {
840 pins = "gpio70", "gpio71", "gpio72";
841 function = "cdc_pdm0";
842 };
843
844 config {
845 pins = "gpio70", "gpio71", "gpio72";
846 drive-strength = <8>;
847 };
848 };
849
850 cdc_pdm_lines_2_sus: pdm_lines_2_off {
851 mux {
852 pins = "gpio70", "gpio71", "gpio72";
853 function = "cdc_pdm0";
854 };
855
856 config {
857 pins = "gpio70", "gpio71", "gpio72";
858 drive-strength = <2>;
859 bias-disable;
860 };
861 };
862 };
863
864 cdc-pdm-lines {
865 cdc_pdm_lines_act: pdm_lines_on {
866 mux {
867 pins = "gpio69", "gpio73", "gpio74";
868 function = "cdc_pdm0";
869 };
870
871 config {
872 pins = "gpio69", "gpio73", "gpio74";
873 drive-strength = <8>;
874 };
875 };
876 cdc_pdm_lines_sus: pdm_lines_off {
877 mux {
878 pins = "gpio69", "gpio73", "gpio74";
879 function = "cdc_pdm0";
880 };
881
882 config {
883 pins = "gpio69", "gpio73", "gpio74";
884 drive-strength = <2>;
885 bias-disable;
886 };
887 };
888 };
889
890 cdc-pdm-comp-lines {
891 cdc_pdm_comp_lines_act: pdm_comp_lines_on {
892 mux {
893 pins = "gpio67", "gpio68";
894 function = "cdc_pdm0";
895 };
896
897 config {
898 pins = "gpio67", "gpio68";
899 drive-strength = <8>;
900 };
901 };
902
903 cdc_pdm_comp_lines_sus: pdm_comp_lines_off {
904 mux {
905 pins = "gpio67", "gpio68";
906 function = "cdc_pdm0";
907 };
908
909 config {
910 pins = "gpio67", "gpio68";
911 drive-strength = <2>;
912 bias-disable;
913 };
914 };
915 };
916
917 cross-conn-det {
918 cross_conn_det_act: lines_on {
919 mux {
920 pins = "gpio63";
921 function = "gpio";
922 };
923
924 config {
925 pins = "gpio63";
926 drive-strength = <8>;
927 output-low;
928 bias-pull-down;
929 };
930 };
931
932 cross_conn_det_sus: lines_off {
933 mux {
934 pins = "gpio63";
935 function = "gpio";
936 };
937
938 config {
939 pins = "gpio63";
940 drive-strength = <2>;
941 bias-pull-down;
942 };
943 };
944 };
945
946 /* WSA VI sense */
947 wsa-vi {
948 wsa_vi_on: wsa_vi_on {
949 mux {
950 pins = "gpio94", "gpio95";
951 function = "wsa_io";
952 };
953
954 config {
955 pins = "gpio94", "gpio95";
956 drive-strength = <8>; /* 8 MA */
957 bias-disable; /* NO pull */
958 };
959 };
960
961 wsa_vi_off: wsa_vi_off {
962 mux {
963 pins = "gpio94", "gpio95";
964 function = "wsa_io";
965 };
966
967 config {
968 pins = "gpio94", "gpio95";
969 drive-strength = <2>; /* 2 MA */
970 bias-pull-down;
971 };
972 };
973 };
974
975 /* WSA Reset */
976 wsa_reset {
977 wsa_reset_on: wsa_reset_on {
978 mux {
979 pins = "gpio96";
980 function = "gpio";
981 };
982
983 config {
984 pins = "gpio96";
985 drive-strength = <2>; /* 2 MA */
986 output-high;
987 };
988 };
989
990 wsa_reset_off: wsa_reset_off {
991 mux {
992 pins = "gpio96";
993 function = "gpio";
994 };
995
996 config {
997 pins = "gpio96";
998 drive-strength = <2>; /* 2 MA */
999 output-low;
1000 };
1001 };
1002 };
1003
1004 /* WSA CLK */
1005 wsa_clk {
1006 wsa_clk_on: wsa_clk_on {
1007 mux {
1008 pins = "gpio25";
1009 function = "pri_mi2s_mclk_a";
1010 };
1011
1012 config {
1013 pins = "gpio25";
1014 drive-strength = <8>; /* 8 MA */
1015 output-high;
1016 };
1017 };
1018
1019 wsa_clk_off: wsa_clk_off {
1020 mux {
1021 pins = "gpio25";
1022 function = "pri_mi2s_mclk_a";
1023 };
1024
1025 config {
1026 pins = "gpio25";
1027 drive-strength = <2>; /* 2 MA */
1028 output-low;
1029 bias-pull-down;
1030 };
1031 };
1032 };
1033
1034 pri-tlmm-lines {
1035 pri_tlmm_lines_act: pri_tlmm_lines_act {
1036 mux {
1037 pins = "gpio91", "gpio93";
1038 function = "pri_mi2s";
1039 };
1040
1041 config {
1042 pins = "gpio91", "gpio93";
1043 drive-strength = <8>;
1044 };
1045 };
1046
1047 pri_tlmm_lines_sus: pri_tlmm_lines_sus {
1048 mux {
1049 pins = "gpio91", "gpio93";
1050 function = "pri_mi2s";
1051 };
1052
1053 config {
1054 pins = "gpio91", "gpio93";
1055 drive-strength = <2>;
1056 bias-pull-down;
1057 };
1058 };
1059 };
1060
1061 pri-tlmm-ws-lines {
1062 pri_tlmm_ws_act: pri_tlmm_ws_act {
1063 mux {
1064 pins = "gpio92";
1065 function = "pri_mi2s_ws";
1066 };
1067
1068 config {
1069 pins = "gpio92";
1070 drive-strength = <8>;
1071 };
1072 };
1073
1074 pri_tlmm_ws_sus: pri_tlmm_ws_sus {
1075 mux {
1076 pins = "gpio92";
1077 function = "pri_mi2s_ws";
1078 };
1079
1080 config {
1081 pins = "gpio92";
1082 drive-strength = <2>;
1083 bias-pull-down;
1084 };
1085 };
1086 };
1087
1088 spi3 {
1089 spi3_default: spi3_default {
1090 /* active state */
1091 mux {
1092 /* MOSI, MISO, CLK */
1093 pins = "gpio8", "gpio9", "gpio11";
1094 function = "blsp_spi3";
1095 };
1096
1097 config {
1098 pins = "gpio8", "gpio9", "gpio11";
1099 drive-strength = <12>; /* 12 MA */
1100 bias-disable = <0>; /* No PULL */
1101 };
1102 };
1103
1104 spi3_sleep: spi3_sleep {
1105 /* suspended state */
1106 mux {
1107 /* MOSI, MISO, CLK */
1108 pins = "gpio8", "gpio9", "gpio11";
1109 function = "gpio";
1110 };
1111
1112 config {
1113 pins = "gpio8", "gpio9", "gpio11";
1114 drive-strength = <2>; /* 2 MA */
1115 bias-pull-down; /* PULL Down */
1116 };
1117 };
1118
1119 spi3_cs0_active: cs0_active {
1120 /* CS */
1121 mux {
1122 pins = "gpio10";
1123 function = "blsp_spi3";
1124 };
1125
1126 config {
1127 pins = "gpio10";
1128 drive-strength = <2>;
1129 bias-disable = <0>;
1130 };
1131 };
1132
1133 spi3_cs0_sleep: cs0_sleep {
1134 /* CS */
1135 mux {
1136 pins = "gpio10";
1137 function = "gpio";
1138 };
1139
1140 config {
1141 pins = "gpio10";
1142 drive-strength = <2>;
1143 bias-disable = <0>;
1144 };
1145 };
1146 };
1147
1148 /* add pingrp for touchscreen */
1149 pmx_ts_int_active {
1150 ts_int_active: ts_int_active {
1151 mux {
1152 pins = "gpio65";
1153 function = "gpio";
1154 };
1155
1156 config {
1157 pins = "gpio65";
1158 drive-strength = <8>;
1159 bias-pull-up;
1160 };
1161 };
1162 };
1163
1164 pmx_ts_int_suspend {
1165 ts_int_suspend: ts_int_suspend {
1166 mux {
1167 pins = "gpio65";
1168 function = "gpio";
1169 };
1170
1171 config {
1172 pins = "gpio65";
1173 drive-strength = <2>;
1174 bias-pull-down;
1175 };
1176 };
1177 };
1178
1179 pmx_ts_reset_active {
1180 ts_reset_active: ts_reset_active {
1181 mux {
1182 pins = "gpio64";
1183 function = "gpio";
1184 };
1185
1186 config {
1187 pins = "gpio64";
1188 drive-strength = <8>;
1189 bias-pull-up;
1190 };
1191 };
1192 };
1193
1194 pmx_ts_reset_suspend {
1195 ts_reset_suspend: ts_reset_suspend {
1196 mux {
1197 pins = "gpio64";
1198 function = "gpio";
1199 };
1200
1201 config {
1202 pins = "gpio64";
1203 drive-strength = <2>;
1204 bias-pull-down;
1205 };
1206 };
1207 };
1208
1209 pmx_ts_release {
1210 ts_release: ts_release {
1211 mux {
1212 pins = "gpio65", "gpio64";
1213 function = "gpio";
1214 };
1215
1216 config {
1217 pins = "gpio65", "gpio64";
1218 drive-strength = <2>;
1219 bias-pull-down;
1220 };
1221 };
1222 };
1223
1224 tlmm_gpio_key {
1225 gpio_key_active: gpio_key_active {
1226 mux {
1227 pins = "gpio85", "gpio86", "gpio87";
1228 function = "gpio";
1229 };
1230
1231 config {
1232 pins = "gpio85", "gpio86", "gpio87";
1233 drive-strength = <2>;
1234 bias-pull-up;
1235 };
1236 };
1237
1238 gpio_key_suspend: gpio_key_suspend {
1239 mux {
1240 pins = "gpio85", "gpio86", "gpio87";
1241 function = "gpio";
1242 };
1243
1244 config {
1245 pins = "gpio85", "gpio86", "gpio87";
1246 drive-strength = <2>;
1247 bias-pull-up;
1248 };
1249 };
1250 };
1251 pmx_qdsd_clk {
1252 qdsd_clk_sdcard: clk_sdcard {
1253 config {
1254 pins = "qdsd_clk";
1255 bias-disable;/* NO pull */
1256 drive-strength = <16>; /* 16 MA */
1257 };
1258 };
1259 qdsd_clk_trace: clk_trace {
1260 config {
1261 pins = "qdsd_clk";
1262 bias-pull-down; /* pull down */
1263 drive-strength = <2>; /* 2 MA */
1264 };
1265 };
1266 qdsd_clk_swdtrc: clk_swdtrc {
1267 config {
1268 pins = "qdsd_clk";
1269 bias-pull-down; /* pull down */
1270 drive-strength = <2>; /* 2 MA */
1271 };
1272 };
1273 qdsd_clk_spmi: clk_spmi {
1274 config {
1275 pins = "qdsd_clk";
1276 bias-pull-down; /* pull down */
1277 drive-strength = <2>; /* 2 MA */
1278 };
1279 };
1280 };
1281
1282 pmx_qdsd_cmd {
1283 qdsd_cmd_sdcard: cmd_sdcard {
1284 config {
1285 pins = "qdsd_cmd";
1286 bias-pull-down; /* pull down */
1287 drive-strength = <8>; /* 8 MA */
1288 };
1289 };
1290 qdsd_cmd_trace: cmd_trace {
1291 config {
1292 pins = "qdsd_cmd";
1293 bias-pull-down; /* pull down */
1294 drive-strength = <2>; /* 2 MA */
1295 };
1296 };
1297 qdsd_cmd_swduart: cmd_uart {
1298 config {
1299 pins = "qdsd_cmd";
1300 bias-pull-up; /* pull up */
1301 drive-strength = <2>; /* 2 MA */
1302 };
1303 };
1304 qdsd_cmd_swdtrc: cmd_swdtrc {
1305 config {
1306 pins = "qdsd_cmd";
1307 bias-pull-up; /* pull up */
1308 drive-strength = <2>; /* 2 MA */
1309 };
1310 };
1311 qdsd_cmd_jtag: cmd_jtag {
1312 config {
1313 pins = "qdsd_cmd";
1314 bias-disable; /* NO pull */
1315 drive-strength = <8>; /* 8 MA */
1316 };
1317 };
1318 qdsd_cmd_spmi: cmd_spmi {
1319 config {
1320 pins = "qdsd_cmd";
1321 bias-pull-down; /* pull down */
1322 drive-strength = <10>; /* 10 MA */
1323 };
1324 };
1325 };
1326
1327 pmx_qdsd_data0 {
1328 qdsd_data0_sdcard: data0_sdcard {
1329 config {
1330 pins = "qdsd_data0";
1331 bias-pull-down; /* pull down */
1332 drive-strength = <8>; /* 8 MA */
1333 };
1334 };
1335 qdsd_data0_trace: data0_trace {
1336 config {
1337 pins = "qdsd_data0";
1338 bias-pull-down; /* pull down */
1339 drive-strength = <8>; /* 8 MA */
1340 };
1341 };
1342 qdsd_data0_swduart: data0_uart {
1343 config {
1344 pins = "qdsd_data0";
1345 bias-pull-down; /* pull down */
1346 drive-strength = <2>; /* 2 MA */
1347 };
1348 };
1349 qdsd_data0_swdtrc: data0_swdtrc {
1350 config {
1351 pins = "qdsd_data0";
1352 bias-pull-down; /* pull down */
1353 drive-strength = <2>; /* 2 MA */
1354 };
1355 };
1356 qdsd_data0_jtag: data0_jtag {
1357 config {
1358 pins = "qdsd_data0";
1359 bias-pull-up; /* pull up */
1360 drive-strength = <2>; /* 2 MA */
1361 };
1362 };
1363 qdsd_data0_spmi: data0_spmi {
1364 config {
1365 pins = "qdsd_data0";
1366 bias-pull-down; /* pull down */
1367 drive-strength = <2>; /* 2 MA */
1368 };
1369 };
1370 };
1371
1372 pmx_qdsd_data1 {
1373 qdsd_data1_sdcard: data1_sdcard {
1374 config {
1375 pins = "qdsd_data1";
1376 bias-pull-down; /* pull down */
1377 drive-strength = <8>; /* 8 MA */
1378 };
1379 };
1380 qdsd_data1_trace: data1_trace {
1381 config {
1382 pins = "qdsd_data1";
1383 bias-pull-down; /* pull down */
1384 drive-strength = <8>; /* 8 MA */
1385 };
1386 };
1387 qdsd_data1_swduart: data1_uart {
1388 config {
1389 pins = "qdsd_data1";
1390 bias-pull-down; /* pull down */
1391 drive-strength = <2>; /* 2 MA */
1392 };
1393 };
1394 qdsd_data1_swdtrc: data1_swdtrc {
1395 config {
1396 pins = "qdsd_data1";
1397 bias-pull-down; /* pull down */
1398 drive-strength = <2>; /* 2 MA */
1399 };
1400 };
1401 qdsd_data1_jtag: data1_jtag {
1402 config {
1403 pins = "qdsd_data1";
1404 bias-pull-down; /* pull down */
1405 drive-strength = <2>; /* 2 MA */
1406 };
1407 };
1408 };
1409
1410 pmx_qdsd_data2 {
1411 qdsd_data2_sdcard: data2_sdcard {
1412 config {
1413 pins = "qdsd_data2";
1414 bias-pull-down; /* pull down */
1415 drive-strength = <8>; /* 8 MA */
1416 };
1417 };
1418 qdsd_data2_trace: data2_trace {
1419 config {
1420 pins = "qdsd_data2";
1421 bias-pull-down; /* pull down */
1422 drive-strength = <8>; /* 8 MA */
1423 };
1424 };
1425 qdsd_data2_swduart: data2_uart {
1426 config {
1427 pins = "qdsd_data2";
1428 bias-pull-down; /* pull down */
1429 drive-strength = <2>; /* 2 MA */
1430 };
1431 };
1432 qdsd_data2_swdtrc: data2_swdtrc {
1433 config {
1434 pins = "qdsd_data2";
1435 bias-pull-down; /* pull down */
1436 drive-strength = <2>; /* 2 MA */
1437 };
1438 };
1439 qdsd_data2_jtag: data2_jtag {
1440 config {
1441 pins = "qdsd_data2";
1442 bias-pull-up; /* pull up */
1443 drive-strength = <8>; /* 8 MA */
1444 };
1445 };
1446 };
1447
1448 pmx_qdsd_data3 {
1449 qdsd_data3_sdcard: data3_sdcard {
1450 config {
1451 pins = "qdsd_data3";
1452 bias-pull-down; /* pull down */
1453 drive-strength = <8>; /* 8 MA */
1454 };
1455 };
1456 qdsd_data3_trace: data3_trace {
1457 config {
1458 pins = "qdsd_data3";
1459 bias-pull-down; /* pull down */
1460 drive-strength = <8>; /* 8 MA */
1461 };
1462 };
1463 qdsd_data3_swduart: data3_uart {
1464 config {
1465 pins = "qdsd_data3";
1466 bias-pull-up; /* pull up */
1467 drive-strength = <2>; /* 2 MA */
1468 };
1469 };
1470 qdsd_data3_swdtrc: data3_swdtrc {
1471 config {
1472 pins = "qdsd_data3";
1473 bias-pull-up; /* pull up */
1474 drive-strength = <2>; /* 2 MA */
1475 };
1476 };
1477 qdsd_data3_jtag: data3_jtag {
1478 config {
1479 pins = "qdsd_data3";
1480 bias-pull-up; /* pull up */
1481 drive-strength = <2>; /* 2 MA */
1482 };
1483 };
1484 qdsd_data3_spmi: data3_spmi {
1485 config {
1486 pins = "qdsd_data3";
1487 bias-pull-down; /* pull down */
1488 drive-strength = <8>; /* 8 MA */
1489 };
1490 };
1491 };
1492
1493 typec_ssmux_config: typec_ssmux_config {
1494 mux {
1495 pins = "gpio139";
1496 function = "gpio";
1497 };
1498
1499 config {
1500 pins = "gpio139";
1501 drive-strength = <2>;
1502 bias-disable;
1503 };
1504 };
1505 };
1506};