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gerrit-public.fairphone.software / kernel / msm-4.9 / 3cac2785a2a8272d303618626b508cf367386781 / . / arch / arm64 / boot / dts / qcom / msm8953.dtsi
blob: f17ac32f81d2607a96e91f28f65f4f8d50dac20e [file] [log] [blame]
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530[diff] [blame^]1/*
2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include "skeleton64.dtsi"
15#include <dt-bindings/gpio/gpio.h>
16
17/ {
18 model = "Qualcomm Technologies, Inc. MSM 8953";
19 compatible = "qcom,msm8953";
20 qcom,msm-id = <293 0x0>;
21 interrupt-parent = <&intc>;
22
23 chosen {
24 bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1";
25 };
26
27 reserved-memory {
28 #address-cells = <2>;
29 #size-cells = <2>;
30 ranges;
31
32 other_ext_mem: other_ext_region@0 {
33 compatible = "removed-dma-pool";
34 no-map;
35 reg = <0x0 0x85b00000 0x0 0xd00000>;
36 };
37
38 modem_mem: modem_region@0 {
39 compatible = "removed-dma-pool";
40 no-map-fixup;
41 reg = <0x0 0x86c00000 0x0 0x6a00000>;
42 };
43
44 adsp_fw_mem: adsp_fw_region@0 {
45 compatible = "removed-dma-pool";
46 no-map;
47 reg = <0x0 0x8d600000 0x0 0x1100000>;
48 };
49
50 wcnss_fw_mem: wcnss_fw_region@0 {
51 compatible = "removed-dma-pool";
52 no-map;
53 reg = <0x0 0x8e700000 0x0 0x700000>;
54 };
55
56 venus_mem: venus_region@0 {
57 compatible = "shared-dma-pool";
58 reusable;
59 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
60 alignment = <0 0x400000>;
61 size = <0 0x0800000>;
62 };
63
64 secure_mem: secure_region@0 {
65 compatible = "shared-dma-pool";
66 reusable;
67 alignment = <0 0x400000>;
68 size = <0 0x09800000>;
69 };
70
71 qseecom_mem: qseecom_region@0 {
72 compatible = "shared-dma-pool";
73 reusable;
74 alignment = <0 0x400000>;
75 size = <0 0x1000000>;
76 };
77
78 adsp_mem: adsp_region@0 {
79 compatible = "shared-dma-pool";
80 reusable;
81 size = <0 0x400000>;
82 };
83
84 dfps_data_mem: dfps_data_mem@90000000 {
85 reg = <0 0x90000000 0 0x1000>;
86 label = "dfps_data_mem";
87 };
88
89 cont_splash_mem: splash_region@0x90001000 {
90 reg = <0x0 0x90001000 0x0 0x13ff000>;
91 label = "cont_splash_mem";
92 };
93
94 gpu_mem: gpu_region@0 {
95 compatible = "shared-dma-pool";
96 reusable;
97 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
98 alignment = <0 0x400000>;
99 size = <0 0x800000>;
100 };
101 };
102
103 aliases {
104 /* smdtty devices */
105 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
106 sdhc2 = &sdhc_2; /* SDC2 for SD card */
107 };
108
109 soc: soc { };
110
111};
112
113#include "msm8953-pinctrl.dtsi"
114#include "msm8953-cpu.dtsi"
115
116
117&soc {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 ranges = <0 0 0 0xffffffff>;
121 compatible = "simple-bus";
122
123 apc_apm: apm@b111000 {
124 compatible = "qcom,msm8953-apm";
125 reg = <0xb111000 0x1000>;
126 reg-names = "pm-apcc-glb";
127 qcom,apm-post-halt-delay = <0x2>;
128 qcom,apm-halt-clk-delay = <0x11>;
129 qcom,apm-resume-clk-delay = <0x10>;
130 qcom,apm-sel-switch-delay = <0x01>;
131 };
132
133 intc: interrupt-controller@b000000 {
134 compatible = "qcom,msm-qgic2";
135 interrupt-controller;
136 #interrupt-cells = <3>;
137 reg = <0x0b000000 0x1000>,
138 <0x0b002000 0x1000>;
139 };
140
141 qcom,msm-gladiator@b1c0000 {
142 compatible = "qcom,msm-gladiator";
143 reg = <0x0b1c0000 0x4000>;
144 reg-names = "gladiator_base";
145 interrupts = <0 22 0>;
146 };
147
148 timer {
149 compatible = "arm,armv8-timer";
150 interrupts = <1 2 0xff08>,
151 <1 3 0xff08>,
152 <1 4 0xff08>,
153 <1 1 0xff08>;
154 clock-frequency = <19200000>;
155 };
156
157 timer@b120000 {
158 #address-cells = <1>;
159 #size-cells = <1>;
160 ranges;
161 compatible = "arm,armv7-timer-mem";
162 reg = <0xb120000 0x1000>;
163 clock-frequency = <19200000>;
164
165 frame@b121000 {
166 frame-number = <0>;
167 interrupts = <0 8 0x4>,
168 <0 7 0x4>;
169 reg = <0xb121000 0x1000>,
170 <0xb122000 0x1000>;
171 };
172
173 frame@b123000 {
174 frame-number = <1>;
175 interrupts = <0 9 0x4>;
176 reg = <0xb123000 0x1000>;
177 status = "disabled";
178 };
179
180 frame@b124000 {
181 frame-number = <2>;
182 interrupts = <0 10 0x4>;
183 reg = <0xb124000 0x1000>;
184 status = "disabled";
185 };
186
187 frame@b125000 {
188 frame-number = <3>;
189 interrupts = <0 11 0x4>;
190 reg = <0xb125000 0x1000>;
191 status = "disabled";
192 };
193
194 frame@b126000 {
195 frame-number = <4>;
196 interrupts = <0 12 0x4>;
197 reg = <0xb126000 0x1000>;
198 status = "disabled";
199 };
200
201 frame@b127000 {
202 frame-number = <5>;
203 interrupts = <0 13 0x4>;
204 reg = <0xb127000 0x1000>;
205 status = "disabled";
206 };
207
208 frame@b128000 {
209 frame-number = <6>;
210 interrupts = <0 14 0x4>;
211 reg = <0xb128000 0x1000>;
212 status = "disabled";
213 };
214 };
215 qcom,rmtfs_sharedmem@00000000 {
216 compatible = "qcom,sharedmem-uio";
217 reg = <0x00000000 0x00180000>;
218 reg-names = "rmtfs";
219 qcom,client-id = <0x00000001>;
220 };
221
222 restart@4ab000 {
223 compatible = "qcom,pshold";
224 reg = <0x4ab000 0x4>,
225 <0x193d100 0x4>;
226 reg-names = "pshold-base", "tcsr-boot-misc-detect";
227 };
228
229 qcom,mpm2-sleep-counter@4a3000 {
230 compatible = "qcom,mpm2-sleep-counter";
231 reg = <0x4a3000 0x1000>;
232 clock-frequency = <32768>;
233 };
234
235 cpu-pmu {
236 compatible = "arm,armv8-pmuv3";
237 interrupts = <1 7 0xff00>;
238 };
239
240 qcom,sps {
241 compatible = "qcom,msm_sps_4k";
242 qcom,pipe-attr-ee;
243 };
244
245 blsp1_uart0: serial@78af000 {
246 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
247 reg = <0x78af000 0x200>;
248 interrupts = <0 107 0>;
249 status = "disabled";
250 };
251
252 dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
253 #dma-cells = <4>;
254 compatible = "qcom,sps-dma";
255 reg = <0x7884000 0x1f000>;
256 interrupts = <0 238 0>;
257 qcom,summing-threshold = <10>;
258 };
259
260 dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */
261 #dma-cells = <4>;
262 compatible = "qcom,sps-dma";
263 reg = <0x7ac4000 0x1f000>;
264 interrupts = <0 239 0>;
265 qcom,summing-threshold = <10>;
266 };
267
268 slim_msm: slim@c140000{
269 cell-index = <1>;
270 compatible = "qcom,slim-ngd";
271 reg = <0xc140000 0x2c000>,
272 <0xc104000 0x2a000>;
273 reg-names = "slimbus_physical", "slimbus_bam_physical";
274 interrupts = <0 163 0>, <0 180 0>;
275 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
276 qcom,apps-ch-pipes = <0x600000>;
277 qcom,ea-pc = <0x200>;
278 status = "disabled";
279 };
280
281 cpubw: qcom,cpubw {
282 compatible = "qcom,devbw";
283 governor = "cpufreq";
284 qcom,src-dst-ports = <1 512>;
285 qcom,active-only;
286 qcom,bw-tbl =
287 < 769 /* 100.8 MHz */ >,
288 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
289 < 2124 /* 278.4 MHz */ >,
290 < 2929 /* 384 MHz */ >,
291 < 3221 /* 422.4 MHz */ >, /* SVS */
292 < 4248 /* 556.8 MHz */ >,
293 < 5126 /* 672 MHz */ >,
294 < 5859 /* 768 MHz */ >, /* SVS+ */
295 < 6152 /* 806.4 MHz */ >,
296 < 6445 /* 844.8 MHz */ >, /* NOM */
297 < 7104 /* 931.2 MHz */ >; /* TURBO */
298 };
299
300 mincpubw: qcom,mincpubw {
301 compatible = "qcom,devbw";
302 governor = "cpufreq";
303 qcom,src-dst-ports = <1 512>;
304 qcom,active-only;
305 qcom,bw-tbl =
306 < 769 /* 100.8 MHz */ >,
307 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
308 < 2124 /* 278.4 MHz */ >,
309 < 2929 /* 384 MHz */ >,
310 < 3221 /* 422.4 MHz */ >, /* SVS */
311 < 4248 /* 556.8 MHz */ >,
312 < 5126 /* 672 MHz */ >,
313 < 5859 /* 768 MHz */ >, /* SVS+ */
314 < 6152 /* 806.4 MHz */ >,
315 < 6445 /* 844.8 MHz */ >, /* NOM */
316 < 7104 /* 931.2 MHz */ >; /* TURBO */
317 };
318
319 qcom,cpu-bwmon {
320 compatible = "qcom,bimc-bwmon2";
321 reg = <0x408000 0x300>, <0x401000 0x200>;
322 reg-names = "base", "global_base";
323 interrupts = <0 183 4>;
324 qcom,mport = <0>;
325 qcom,target-dev = <&cpubw>;
326 };
327
328 devfreq-cpufreq {
329 cpubw-cpufreq {
330 target-dev = <&cpubw>;
331 cpu-to-dev-map =
332 < 652800 1611>,
333 < 1036800 3221>,
334 < 1401600 5859>,
335 < 1689600 6445>,
336 < 1804800 7104>,
337 < 1958400 7104>,
338 < 2208000 7104>;
339 };
340
341 mincpubw-cpufreq {
342 target-dev = <&mincpubw>;
343 cpu-to-dev-map =
344 < 652800 1611 >,
345 < 1401600 3221 >,
346 < 2208000 5859 >;
347 };
348 };
349
350 qcom,ipc-spinlock@1905000 {
351 compatible = "qcom,ipc-spinlock-sfpb";
352 reg = <0x1905000 0x8000>;
353 qcom,num-locks = <8>;
354 };
355
356 qcom,smem@86300000 {
357 compatible = "qcom,smem";
358 reg = <0x86300000 0x100000>,
359 <0x0b011008 0x4>,
360 <0x60000 0x8000>,
361 <0x193d000 0x8>;
362 reg-names = "smem", "irq-reg-base",
363 "aux-mem1", "smem_targ_info_reg";
364 qcom,mpu-enabled;
365
366 qcom,smd-modem {
367 compatible = "qcom,smd";
368 qcom,smd-edge = <0>;
369 qcom,smd-irq-offset = <0x0>;
370 qcom,smd-irq-bitmask = <0x1000>;
371 interrupts = <0 25 1>;
372 label = "modem";
373 qcom,not-loadable;
374 };
375
376 qcom,smsm-modem {
377 compatible = "qcom,smsm";
378 qcom,smsm-edge = <0>;
379 qcom,smsm-irq-offset = <0x0>;
380 qcom,smsm-irq-bitmask = <0x2000>;
381 interrupts = <0 26 1>;
382 };
383
384 qcom,smd-wcnss {
385 compatible = "qcom,smd";
386 qcom,smd-edge = <6>;
387 qcom,smd-irq-offset = <0x0>;
388 qcom,smd-irq-bitmask = <0x20000>;
389 interrupts = <0 142 1>;
390 label = "wcnss";
391 };
392
393 qcom,smsm-wcnss {
394 compatible = "qcom,smsm";
395 qcom,smsm-edge = <6>;
396 qcom,smsm-irq-offset = <0x0>;
397 qcom,smsm-irq-bitmask = <0x80000>;
398 interrupts = <0 144 1>;
399 };
400
401 qcom,smd-adsp {
402 compatible = "qcom,smd";
403 qcom,smd-edge = <1>;
404 qcom,smd-irq-offset = <0x0>;
405 qcom,smd-irq-bitmask = <0x100>;
406 interrupts = <0 289 1>;
407 label = "adsp";
408 };
409
410 qcom,smsm-adsp {
411 compatible = "qcom,smsm";
412 qcom,smsm-edge = <1>;
413 qcom,smsm-irq-offset = <0x0>;
414 qcom,smsm-irq-bitmask = <0x200>;
415 interrupts = <0 290 1>;
416 };
417
418 qcom,smd-rpm {
419 compatible = "qcom,smd";
420 qcom,smd-edge = <15>;
421 qcom,smd-irq-offset = <0x0>;
422 qcom,smd-irq-bitmask = <0x1>;
423 interrupts = <0 168 1>;
424 label = "rpm";
425 qcom,irq-no-suspend;
426 qcom,not-loadable;
427 };
428 };
429
430 qcom,wdt@b017000 {
431 compatible = "qcom,msm-watchdog";
432 reg = <0xb017000 0x1000>;
433 reg-names = "wdt-base";
434 interrupts = <0 3 0>, <0 4 0>;
435 qcom,bark-time = <11000>;
436 qcom,pet-time = <10000>;
437 qcom,ipi-ping;
438 qcom,wakeup-enable;
439 };
440
441 qcom,chd {
442 compatible = "qcom,core-hang-detect";
443 qcom,threshold-arr = <0xb1880b0 0xb1980b0 0xb1a80b0
444 0xb1b80b0 0xb0880b0 0xb0980b0 0xb0a80b0 0xb0b80b0>;
445 qcom,config-arr = <0xb1880b8 0xb1980b8 0xb1a80b8
446 0xb1b80b8 0xb0880b8 0xb0980b8 0xb0a80b8 0xb0b80b8>;
447 };
448
449 qcom,msm-rtb {
450 compatible = "qcom,msm-rtb";
451 qcom,rtb-size = <0x100000>;
452 };
453
454 qcom,msm-imem@8600000 {
455 compatible = "qcom,msm-imem";
456 reg = <0x08600000 0x1000>;
457 ranges = <0x0 0x08600000 0x1000>;
458 #address-cells = <1>;
459 #size-cells = <1>;
460
461 mem_dump_table@10 {
462 compatible = "qcom,msm-imem-mem_dump_table";
463 reg = <0x10 8>;
464 };
465
466 restart_reason@65c {
467 compatible = "qcom,msm-imem-restart_reason";
468 reg = <0x65c 4>;
469 };
470
471 boot_stats@6b0 {
472 compatible = "qcom,msm-imem-boot_stats";
473 reg = <0x6b0 32>;
474 };
475
476 pil@94c {
477 compatible = "qcom,msm-imem-pil";
478 reg = <0x94c 200>;
479
480 };
481 };
482
483 qcom,memshare {
484 compatible = "qcom,memshare";
485
486 qcom,client_1 {
487 compatible = "qcom,memshare-peripheral";
488 qcom,peripheral-size = <0x200000>;
489 qcom,client-id = <0>;
490 qcom,allocate-boot-time;
491 label = "modem";
492 };
493
494 qcom,client_2 {
495 compatible = "qcom,memshare-peripheral";
496 qcom,peripheral-size = <0x300000>;
497 qcom,client-id = <2>;
498 label = "modem";
499 };
500
501 mem_client_3_size: qcom,client_3 {
502 compatible = "qcom,memshare-peripheral";
503 qcom,peripheral-size = <0x0>;
504 qcom,client-id = <1>;
505 label = "modem";
506 };
507 };
508 sdcc1_ice: sdcc1ice@7803000 {
509 compatible = "qcom,ice";
510 reg = <0x7803000 0x8000>;
511 interrupt-names = "sdcc_ice_nonsec_level_irq",
512 "sdcc_ice_sec_level_irq";
513 interrupts = <0 312 0>, <0 313 0>;
514 qcom,enable-ice-clk;
515 qcom,op-freq-hz = <270000000>, <0>, <0>, <0>;
516 qcom,msm-bus,name = "sdcc_ice_noc";
517 qcom,msm-bus,num-cases = <2>;
518 qcom,msm-bus,num-paths = <1>;
519 qcom,msm-bus,vectors-KBps =
520 <78 512 0 0>, /* No vote */
521 <78 512 1000 0>; /* Max. bandwidth */
522 qcom,bus-vector-names = "MIN", "MAX";
523 qcom,instance-type = "sdcc";
524 };
525
526 sdhc_1: sdhci@7824900 {
527 compatible = "qcom,sdhci-msm";
528 reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>;
529 reg-names = "hc_mem", "core_mem", "cmdq_mem";
530
531 interrupts = <0 123 0>, <0 138 0>;
532 interrupt-names = "hc_irq", "pwr_irq";
533
534 sdhc-msm-crypto = <&sdcc1_ice>;
535 qcom,bus-width = <8>;
536
537 qcom,devfreq,freq-table = <50000000 200000000>;
538
539 qcom,pm-qos-irq-type = "affine_irq";
540 qcom,pm-qos-irq-latency = <2 213>;
541
542 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
543 qcom,pm-qos-cmdq-latency-us = <2 213>, <2 213>;
544
545 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
546
547 qcom,msm-bus,name = "sdhc1";
548 qcom,msm-bus,num-cases = <9>;
549 qcom,msm-bus,num-paths = <1>;
550 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
551 <78 512 1046 3200>, /* 400 KB/s*/
552 <78 512 52286 160000>, /* 20 MB/s */
553 <78 512 65360 200000>, /* 25 MB/s */
554 <78 512 130718 400000>, /* 50 MB/s */
555 <78 512 130718 400000>, /* 100 MB/s */
556 <78 512 261438 800000>, /* 200 MB/s */
557 <78 512 261438 800000>, /* 400 MB/s */
558 <78 512 1338562 4096000>; /* Max. bandwidth */
559 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
560 100000000 200000000 400000000 4294967295>;
561
562 qcom,ice-clk-rates = <270000000 160000000>;
563 qcom,large-address-bus;
564
565 status = "disabled";
566 };
567
568 sdhc_2: sdhci@7864900 {
569 compatible = "qcom,sdhci-msm";
570 reg = <0x7864900 0x500>, <0x7864000 0x800>;
571 reg-names = "hc_mem", "core_mem";
572
573 interrupts = <0 125 0>, <0 221 0>;
574 interrupt-names = "hc_irq", "pwr_irq";
575
576 qcom,bus-width = <4>;
577
578 qcom,pm-qos-irq-type = "affine_irq";
579 qcom,pm-qos-irq-latency = <2 213>;
580
581 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
582 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
583
584 qcom,devfreq,freq-table = <50000000 200000000>;
585
586 qcom,msm-bus,name = "sdhc2";
587 qcom,msm-bus,num-cases = <8>;
588 qcom,msm-bus,num-paths = <1>;
589 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
590 <81 512 1046 3200>, /* 400 KB/s*/
591 <81 512 52286 160000>, /* 20 MB/s */
592 <81 512 65360 200000>, /* 25 MB/s */
593 <81 512 130718 400000>, /* 50 MB/s */
594 <81 512 261438 800000>, /* 100 MB/s */
595 <81 512 261438 800000>, /* 200 MB/s */
596 <81 512 1338562 4096000>; /* Max. bandwidth */
597 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
598 100000000 200000000 4294967295>;
599
600 qcom,large-address-bus;
601 status = "disabled";
602 };
603
604};
605