Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1 | /* |
| 2 | * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver |
| 3 | * |
| 4 | * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * Documentation: ARM DDI 0173B |
| 11 | */ |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/delay.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/ioport.h> |
| 16 | #include <linux/device.h> |
| 17 | #include <linux/spinlock.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/err.h> |
Russell King | a62c80e | 2006-01-07 13:52:45 +0000 | [diff] [blame] | 20 | #include <linux/amba/bus.h> |
Russell King | 88cdca9 | 2009-11-23 09:44:10 +0100 | [diff] [blame] | 21 | #include <linux/io.h> |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 22 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 23 | #include <sound/core.h> |
| 24 | #include <sound/initval.h> |
| 25 | #include <sound/ac97_codec.h> |
| 26 | #include <sound/pcm.h> |
| 27 | #include <sound/pcm_params.h> |
| 28 | |
| 29 | #include "aaci.h" |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 30 | |
| 31 | #define DRIVER_NAME "aaci-pl041" |
| 32 | |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 33 | #define FRAME_PERIOD_US 21 |
| 34 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 35 | /* |
| 36 | * PM support is not complete. Turn it off. |
| 37 | */ |
| 38 | #undef CONFIG_PM |
| 39 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 40 | static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 41 | { |
| 42 | u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num); |
| 43 | |
| 44 | /* |
| 45 | * Ensure that the slot 1/2 RX registers are empty. |
| 46 | */ |
| 47 | v = readl(aaci->base + AACI_SLFR); |
| 48 | if (v & SLFR_2RXV) |
| 49 | readl(aaci->base + AACI_SL2RX); |
| 50 | if (v & SLFR_1RXV) |
| 51 | readl(aaci->base + AACI_SL1RX); |
| 52 | |
Russell King | 7c28938 | 2011-02-05 10:41:55 +0000 | [diff] [blame] | 53 | if (maincr != readl(aaci->base + AACI_MAINCR)) { |
| 54 | writel(maincr, aaci->base + AACI_MAINCR); |
| 55 | readl(aaci->base + AACI_MAINCR); |
| 56 | udelay(1); |
| 57 | } |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 58 | } |
| 59 | |
| 60 | /* |
| 61 | * P29: |
| 62 | * The recommended use of programming the external codec through slot 1 |
| 63 | * and slot 2 data is to use the channels during setup routines and the |
| 64 | * slot register at any other time. The data written into slot 1, slot 2 |
| 65 | * and slot 12 registers is transmitted only when their corresponding |
| 66 | * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR |
| 67 | * register. |
| 68 | */ |
Kevin Hilman | 14d178a | 2007-02-07 05:46:47 +0100 | [diff] [blame] | 69 | static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg, |
| 70 | unsigned short val) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 71 | { |
| 72 | struct aaci *aaci = ac97->private_data; |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 73 | int timeout; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 74 | u32 v; |
| 75 | |
| 76 | if (ac97->num >= 4) |
| 77 | return; |
| 78 | |
Ingo Molnar | 12aa757 | 2006-01-16 16:36:05 +0100 | [diff] [blame] | 79 | mutex_lock(&aaci->ac97_sem); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 80 | |
| 81 | aaci_ac97_select_codec(aaci, ac97); |
| 82 | |
| 83 | /* |
| 84 | * P54: You must ensure that AACI_SL2TX is always written |
| 85 | * to, if required, before data is written to AACI_SL1TX. |
| 86 | */ |
| 87 | writel(val << 4, aaci->base + AACI_SL2TX); |
| 88 | writel(reg << 12, aaci->base + AACI_SL1TX); |
| 89 | |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 90 | /* Initially, wait one frame period */ |
| 91 | udelay(FRAME_PERIOD_US); |
| 92 | |
| 93 | /* And then wait an additional eight frame periods for it to be sent */ |
| 94 | timeout = FRAME_PERIOD_US * 8; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 95 | do { |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 96 | udelay(1); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 97 | v = readl(aaci->base + AACI_SLFR); |
Roel Kluin | f6f35bb | 2009-02-08 15:22:25 +0100 | [diff] [blame] | 98 | } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout); |
Kevin Hilman | 14d178a | 2007-02-07 05:46:47 +0100 | [diff] [blame] | 99 | |
Russell King | 69058cd | 2011-01-12 23:17:24 +0000 | [diff] [blame] | 100 | if (v & (SLFR_1TXB|SLFR_2TXB)) |
Kevin Hilman | 14d178a | 2007-02-07 05:46:47 +0100 | [diff] [blame] | 101 | dev_err(&aaci->dev->dev, |
| 102 | "timeout waiting for write to complete\n"); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 103 | |
Ingo Molnar | 12aa757 | 2006-01-16 16:36:05 +0100 | [diff] [blame] | 104 | mutex_unlock(&aaci->ac97_sem); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | /* |
| 108 | * Read an AC'97 register. |
| 109 | */ |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 110 | static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 111 | { |
| 112 | struct aaci *aaci = ac97->private_data; |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 113 | int timeout, retries = 10; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 114 | u32 v; |
| 115 | |
| 116 | if (ac97->num >= 4) |
| 117 | return ~0; |
| 118 | |
Ingo Molnar | 12aa757 | 2006-01-16 16:36:05 +0100 | [diff] [blame] | 119 | mutex_lock(&aaci->ac97_sem); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 120 | |
| 121 | aaci_ac97_select_codec(aaci, ac97); |
| 122 | |
| 123 | /* |
| 124 | * Write the register address to slot 1. |
| 125 | */ |
| 126 | writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX); |
| 127 | |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 128 | /* Initially, wait one frame period */ |
| 129 | udelay(FRAME_PERIOD_US); |
| 130 | |
| 131 | /* And then wait an additional eight frame periods for it to be sent */ |
| 132 | timeout = FRAME_PERIOD_US * 8; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 133 | do { |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 134 | udelay(1); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 135 | v = readl(aaci->base + AACI_SLFR); |
Roel Kluin | f6f35bb | 2009-02-08 15:22:25 +0100 | [diff] [blame] | 136 | } while ((v & SLFR_1TXB) && --timeout); |
Kevin Hilman | 14d178a | 2007-02-07 05:46:47 +0100 | [diff] [blame] | 137 | |
Russell King | 69058cd | 2011-01-12 23:17:24 +0000 | [diff] [blame] | 138 | if (v & SLFR_1TXB) { |
Kevin Hilman | 14d178a | 2007-02-07 05:46:47 +0100 | [diff] [blame] | 139 | dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n"); |
| 140 | v = ~0; |
| 141 | goto out; |
| 142 | } |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 143 | |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 144 | /* Now wait for the response frame */ |
| 145 | udelay(FRAME_PERIOD_US); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 146 | |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 147 | /* And then wait an additional eight frame periods for data */ |
| 148 | timeout = FRAME_PERIOD_US * 8; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 149 | do { |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 150 | udelay(1); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 151 | cond_resched(); |
| 152 | v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV); |
Roel Kluin | f6f35bb | 2009-02-08 15:22:25 +0100 | [diff] [blame] | 153 | } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 154 | |
Russell King | 69058cd | 2011-01-12 23:17:24 +0000 | [diff] [blame] | 155 | if (v != (SLFR_1RXV|SLFR_2RXV)) { |
Kevin Hilman | 14d178a | 2007-02-07 05:46:47 +0100 | [diff] [blame] | 156 | dev_err(&aaci->dev->dev, "timeout on RX valid\n"); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 157 | v = ~0; |
Kevin Hilman | 14d178a | 2007-02-07 05:46:47 +0100 | [diff] [blame] | 158 | goto out; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 159 | } |
| 160 | |
Kevin Hilman | 14d178a | 2007-02-07 05:46:47 +0100 | [diff] [blame] | 161 | do { |
| 162 | v = readl(aaci->base + AACI_SL1RX) >> 12; |
| 163 | if (v == reg) { |
| 164 | v = readl(aaci->base + AACI_SL2RX) >> 4; |
| 165 | break; |
| 166 | } else if (--retries) { |
| 167 | dev_warn(&aaci->dev->dev, |
| 168 | "ac97 read back fail. retry\n"); |
| 169 | continue; |
| 170 | } else { |
| 171 | dev_warn(&aaci->dev->dev, |
| 172 | "wrong ac97 register read back (%x != %x)\n", |
| 173 | v, reg); |
| 174 | v = ~0; |
| 175 | } |
| 176 | } while (retries); |
| 177 | out: |
Ingo Molnar | 12aa757 | 2006-01-16 16:36:05 +0100 | [diff] [blame] | 178 | mutex_unlock(&aaci->ac97_sem); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 179 | return v; |
| 180 | } |
| 181 | |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 182 | static inline void |
| 183 | aaci_chan_wait_ready(struct aaci_runtime *aacirun, unsigned long mask) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 184 | { |
| 185 | u32 val; |
| 186 | int timeout = 5000; |
| 187 | |
| 188 | do { |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 189 | udelay(1); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 190 | val = readl(aacirun->base + AACI_SR); |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 191 | } while (val & mask && timeout--); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 192 | } |
| 193 | |
| 194 | |
| 195 | |
| 196 | /* |
| 197 | * Interrupt support. |
| 198 | */ |
Kevin Hilman | 62578cb | 2007-02-07 05:41:37 +0100 | [diff] [blame] | 199 | static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 200 | { |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 201 | if (mask & ISR_ORINTR) { |
| 202 | dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel); |
| 203 | writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR); |
| 204 | } |
| 205 | |
| 206 | if (mask & ISR_RXTOINTR) { |
| 207 | dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel); |
| 208 | writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR); |
| 209 | } |
| 210 | |
| 211 | if (mask & ISR_RXINTR) { |
| 212 | struct aaci_runtime *aacirun = &aaci->capture; |
Russell King | ea51d0b | 2011-01-13 08:47:35 +0000 | [diff] [blame] | 213 | bool period_elapsed = false; |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 214 | void *ptr; |
| 215 | |
| 216 | if (!aacirun->substream || !aacirun->start) { |
Joe Perches | 898eb71 | 2007-10-18 03:06:30 -0700 | [diff] [blame] | 217 | dev_warn(&aaci->dev->dev, "RX interrupt???\n"); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 218 | writel(0, aacirun->base + AACI_IE); |
| 219 | return; |
| 220 | } |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 221 | |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 222 | spin_lock(&aacirun->lock); |
| 223 | |
| 224 | ptr = aacirun->ptr; |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 225 | do { |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 226 | unsigned int len = aacirun->fifo_bytes; |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 227 | u32 val; |
| 228 | |
| 229 | if (aacirun->bytes <= 0) { |
| 230 | aacirun->bytes += aacirun->period; |
Russell King | ea51d0b | 2011-01-13 08:47:35 +0000 | [diff] [blame] | 231 | period_elapsed = true; |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 232 | } |
| 233 | if (!(aacirun->cr & CR_EN)) |
| 234 | break; |
| 235 | |
| 236 | val = readl(aacirun->base + AACI_SR); |
| 237 | if (!(val & SR_RXHF)) |
| 238 | break; |
| 239 | if (!(val & SR_RXFF)) |
| 240 | len >>= 1; |
| 241 | |
| 242 | aacirun->bytes -= len; |
| 243 | |
| 244 | /* reading 16 bytes at a time */ |
| 245 | for( ; len > 0; len -= 16) { |
| 246 | asm( |
| 247 | "ldmia %1, {r0, r1, r2, r3}\n\t" |
| 248 | "stmia %0!, {r0, r1, r2, r3}" |
| 249 | : "+r" (ptr) |
| 250 | : "r" (aacirun->fifo) |
| 251 | : "r0", "r1", "r2", "r3", "cc"); |
| 252 | |
| 253 | if (ptr >= aacirun->end) |
| 254 | ptr = aacirun->start; |
| 255 | } |
| 256 | } while(1); |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 257 | |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 258 | aacirun->ptr = ptr; |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 259 | |
| 260 | spin_unlock(&aacirun->lock); |
Russell King | ea51d0b | 2011-01-13 08:47:35 +0000 | [diff] [blame] | 261 | |
| 262 | if (period_elapsed) |
| 263 | snd_pcm_period_elapsed(aacirun->substream); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 264 | } |
| 265 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 266 | if (mask & ISR_URINTR) { |
Kevin Hilman | 62578cb | 2007-02-07 05:41:37 +0100 | [diff] [blame] | 267 | dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel); |
| 268 | writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 269 | } |
| 270 | |
| 271 | if (mask & ISR_TXINTR) { |
| 272 | struct aaci_runtime *aacirun = &aaci->playback; |
Russell King | ea51d0b | 2011-01-13 08:47:35 +0000 | [diff] [blame] | 273 | bool period_elapsed = false; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 274 | void *ptr; |
| 275 | |
| 276 | if (!aacirun->substream || !aacirun->start) { |
Joe Perches | 898eb71 | 2007-10-18 03:06:30 -0700 | [diff] [blame] | 277 | dev_warn(&aaci->dev->dev, "TX interrupt???\n"); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 278 | writel(0, aacirun->base + AACI_IE); |
| 279 | return; |
| 280 | } |
| 281 | |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 282 | spin_lock(&aacirun->lock); |
| 283 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 284 | ptr = aacirun->ptr; |
| 285 | do { |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 286 | unsigned int len = aacirun->fifo_bytes; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 287 | u32 val; |
| 288 | |
| 289 | if (aacirun->bytes <= 0) { |
| 290 | aacirun->bytes += aacirun->period; |
Russell King | ea51d0b | 2011-01-13 08:47:35 +0000 | [diff] [blame] | 291 | period_elapsed = true; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 292 | } |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 293 | if (!(aacirun->cr & CR_EN)) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 294 | break; |
| 295 | |
| 296 | val = readl(aacirun->base + AACI_SR); |
| 297 | if (!(val & SR_TXHE)) |
| 298 | break; |
| 299 | if (!(val & SR_TXFE)) |
| 300 | len >>= 1; |
| 301 | |
| 302 | aacirun->bytes -= len; |
| 303 | |
| 304 | /* writing 16 bytes at a time */ |
| 305 | for ( ; len > 0; len -= 16) { |
| 306 | asm( |
| 307 | "ldmia %0!, {r0, r1, r2, r3}\n\t" |
| 308 | "stmia %1, {r0, r1, r2, r3}" |
| 309 | : "+r" (ptr) |
| 310 | : "r" (aacirun->fifo) |
| 311 | : "r0", "r1", "r2", "r3", "cc"); |
| 312 | |
| 313 | if (ptr >= aacirun->end) |
| 314 | ptr = aacirun->start; |
| 315 | } |
| 316 | } while (1); |
| 317 | |
| 318 | aacirun->ptr = ptr; |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 319 | |
| 320 | spin_unlock(&aacirun->lock); |
Russell King | ea51d0b | 2011-01-13 08:47:35 +0000 | [diff] [blame] | 321 | |
| 322 | if (period_elapsed) |
| 323 | snd_pcm_period_elapsed(aacirun->substream); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 324 | } |
| 325 | } |
| 326 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 327 | static irqreturn_t aaci_irq(int irq, void *devid) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 328 | { |
| 329 | struct aaci *aaci = devid; |
| 330 | u32 mask; |
| 331 | int i; |
| 332 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 333 | mask = readl(aaci->base + AACI_ALLINTS); |
| 334 | if (mask) { |
| 335 | u32 m = mask; |
| 336 | for (i = 0; i < 4; i++, m >>= 7) { |
| 337 | if (m & 0x7f) { |
Kevin Hilman | 62578cb | 2007-02-07 05:41:37 +0100 | [diff] [blame] | 338 | aaci_fifo_irq(aaci, i, m); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 339 | } |
| 340 | } |
| 341 | } |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 342 | |
| 343 | return mask ? IRQ_HANDLED : IRQ_NONE; |
| 344 | } |
| 345 | |
| 346 | |
| 347 | |
| 348 | /* |
| 349 | * ALSA support. |
| 350 | */ |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 351 | static struct snd_pcm_hardware aaci_hw_info = { |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 352 | .info = SNDRV_PCM_INFO_MMAP | |
| 353 | SNDRV_PCM_INFO_MMAP_VALID | |
| 354 | SNDRV_PCM_INFO_INTERLEAVED | |
| 355 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 356 | SNDRV_PCM_INFO_RESUME, |
| 357 | |
| 358 | /* |
| 359 | * ALSA doesn't support 18-bit or 20-bit packed into 32-bit |
| 360 | * words. It also doesn't support 12-bit at all. |
| 361 | */ |
| 362 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
| 363 | |
Russell King | 6ca867c | 2009-12-18 17:48:35 +0000 | [diff] [blame] | 364 | /* rates are setup from the AC'97 codec */ |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 365 | .channels_min = 2, |
Russell King | e831d80 | 2011-01-13 10:13:17 +0000 | [diff] [blame] | 366 | .channels_max = 2, |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 367 | .buffer_bytes_max = 64 * 1024, |
| 368 | .period_bytes_min = 256, |
| 369 | .period_bytes_max = PAGE_SIZE, |
| 370 | .periods_min = 4, |
| 371 | .periods_max = PAGE_SIZE / 16, |
| 372 | }; |
| 373 | |
Russell King | e831d80 | 2011-01-13 10:13:17 +0000 | [diff] [blame] | 374 | /* |
| 375 | * We can support two and four channel audio. Unfortunately |
| 376 | * six channel audio requires a non-standard channel ordering: |
| 377 | * 2 -> FL(3), FR(4) |
| 378 | * 4 -> FL(3), FR(4), SL(7), SR(8) |
| 379 | * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required) |
| 380 | * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual) |
| 381 | * This requires an ALSA configuration file to correct. |
| 382 | */ |
| 383 | static int aaci_rule_channels(struct snd_pcm_hw_params *p, |
| 384 | struct snd_pcm_hw_rule *rule) |
| 385 | { |
| 386 | static unsigned int channel_list[] = { 2, 4, 6 }; |
| 387 | struct aaci *aaci = rule->private; |
| 388 | unsigned int mask = 1 << 0, slots; |
| 389 | |
| 390 | /* pcms[0] is the our 5.1 PCM instance. */ |
| 391 | slots = aaci->ac97_bus->pcms[0].r[0].slots; |
| 392 | if (slots & (1 << AC97_SLOT_PCM_SLEFT)) { |
| 393 | mask |= 1 << 1; |
| 394 | if (slots & (1 << AC97_SLOT_LFE)) |
| 395 | mask |= 1 << 2; |
| 396 | } |
| 397 | |
| 398 | return snd_interval_list(hw_param_interval(p, rule->var), |
| 399 | ARRAY_SIZE(channel_list), channel_list, mask); |
| 400 | } |
| 401 | |
| 402 | static int aaci_pcm_open(struct snd_pcm_substream *substream) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 403 | { |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 404 | struct snd_pcm_runtime *runtime = substream->runtime; |
Russell King | e831d80 | 2011-01-13 10:13:17 +0000 | [diff] [blame] | 405 | struct aaci *aaci = substream->private_data; |
| 406 | struct aaci_runtime *aacirun; |
Russell King | b60fb51 | 2011-01-25 15:52:33 +0000 | [diff] [blame] | 407 | int ret = 0; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 408 | |
Russell King | e831d80 | 2011-01-13 10:13:17 +0000 | [diff] [blame] | 409 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 410 | aacirun = &aaci->playback; |
| 411 | } else { |
| 412 | aacirun = &aaci->capture; |
| 413 | } |
| 414 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 415 | aacirun->substream = substream; |
| 416 | runtime->private_data = aacirun; |
| 417 | runtime->hw = aaci_hw_info; |
Russell King | 6ca867c | 2009-12-18 17:48:35 +0000 | [diff] [blame] | 418 | runtime->hw.rates = aacirun->pcm->rates; |
| 419 | snd_pcm_limit_hw_rates(runtime); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 420 | |
Russell King | e831d80 | 2011-01-13 10:13:17 +0000 | [diff] [blame] | 421 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 422 | runtime->hw.channels_max = 6; |
| 423 | |
| 424 | /* Add rule describing channel dependency. */ |
| 425 | ret = snd_pcm_hw_rule_add(substream->runtime, 0, |
| 426 | SNDRV_PCM_HW_PARAM_CHANNELS, |
| 427 | aaci_rule_channels, aaci, |
| 428 | SNDRV_PCM_HW_PARAM_CHANNELS, -1); |
| 429 | if (ret) |
| 430 | return ret; |
| 431 | |
| 432 | if (aacirun->pcm->r[1].slots) |
| 433 | snd_ac97_pcm_double_rate_rules(runtime); |
| 434 | } |
Russell King | a08d565 | 2009-12-18 17:48:45 +0000 | [diff] [blame] | 435 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 436 | /* |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 437 | * ALSA wants the byte-size of the FIFOs. As we only support |
| 438 | * 16-bit samples, this is twice the FIFO depth irrespective |
| 439 | * of whether it's in compact mode or not. |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 440 | */ |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 441 | runtime->hw.fifo_size = aaci->fifo_depth * 2; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 442 | |
Russell King | b60fb51 | 2011-01-25 15:52:33 +0000 | [diff] [blame] | 443 | mutex_lock(&aaci->irq_lock); |
| 444 | if (!aaci->users++) { |
| 445 | ret = request_irq(aaci->dev->irq[0], aaci_irq, |
Yong Zhang | 88e24c3 | 2011-09-22 16:59:20 +0800 | [diff] [blame] | 446 | IRQF_SHARED, DRIVER_NAME, aaci); |
Russell King | b60fb51 | 2011-01-25 15:52:33 +0000 | [diff] [blame] | 447 | if (ret != 0) |
| 448 | aaci->users--; |
| 449 | } |
| 450 | mutex_unlock(&aaci->irq_lock); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 451 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 452 | return ret; |
| 453 | } |
| 454 | |
| 455 | |
| 456 | /* |
| 457 | * Common ALSA stuff |
| 458 | */ |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 459 | static int aaci_pcm_close(struct snd_pcm_substream *substream) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 460 | { |
| 461 | struct aaci *aaci = substream->private_data; |
| 462 | struct aaci_runtime *aacirun = substream->runtime->private_data; |
| 463 | |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 464 | WARN_ON(aacirun->cr & CR_EN); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 465 | |
| 466 | aacirun->substream = NULL; |
Russell King | b60fb51 | 2011-01-25 15:52:33 +0000 | [diff] [blame] | 467 | |
| 468 | mutex_lock(&aaci->irq_lock); |
| 469 | if (!--aaci->users) |
| 470 | free_irq(aaci->dev->irq[0], aaci); |
| 471 | mutex_unlock(&aaci->irq_lock); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 472 | |
| 473 | return 0; |
| 474 | } |
| 475 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 476 | static int aaci_pcm_hw_free(struct snd_pcm_substream *substream) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 477 | { |
| 478 | struct aaci_runtime *aacirun = substream->runtime->private_data; |
| 479 | |
| 480 | /* |
| 481 | * This must not be called with the device enabled. |
| 482 | */ |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 483 | WARN_ON(aacirun->cr & CR_EN); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 484 | |
| 485 | if (aacirun->pcm_open) |
| 486 | snd_ac97_pcm_close(aacirun->pcm); |
| 487 | aacirun->pcm_open = 0; |
| 488 | |
| 489 | /* |
| 490 | * Clear out the DMA and any allocated buffers. |
| 491 | */ |
Takashi Iwai | d679732 | 2009-11-26 15:08:54 +0100 | [diff] [blame] | 492 | snd_pcm_lib_free_pages(substream); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 493 | |
| 494 | return 0; |
| 495 | } |
| 496 | |
Russell King | 58e8a47 | 2011-01-26 16:59:39 +0000 | [diff] [blame] | 497 | /* Channel to slot mask */ |
| 498 | static const u32 channels_to_slotmask[] = { |
| 499 | [2] = CR_SL3 | CR_SL4, |
| 500 | [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8, |
| 501 | [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9, |
| 502 | }; |
| 503 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 504 | static int aaci_pcm_hw_params(struct snd_pcm_substream *substream, |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 505 | struct snd_pcm_hw_params *params) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 506 | { |
Russell King | 58e8a47 | 2011-01-26 16:59:39 +0000 | [diff] [blame] | 507 | struct aaci_runtime *aacirun = substream->runtime->private_data; |
| 508 | unsigned int channels = params_channels(params); |
| 509 | unsigned int rate = params_rate(params); |
| 510 | int dbl = rate > 48000; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 511 | int err; |
| 512 | |
| 513 | aaci_pcm_hw_free(substream); |
Russell King | 4acd57c | 2009-11-29 16:39:52 +0000 | [diff] [blame] | 514 | if (aacirun->pcm_open) { |
| 515 | snd_ac97_pcm_close(aacirun->pcm); |
| 516 | aacirun->pcm_open = 0; |
| 517 | } |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 518 | |
Russell King | 58e8a47 | 2011-01-26 16:59:39 +0000 | [diff] [blame] | 519 | /* channels is already limited to 2, 4, or 6 by aaci_rule_channels */ |
| 520 | if (dbl && channels != 2) |
| 521 | return -EINVAL; |
| 522 | |
Takashi Iwai | d679732 | 2009-11-26 15:08:54 +0100 | [diff] [blame] | 523 | err = snd_pcm_lib_malloc_pages(substream, |
| 524 | params_buffer_bytes(params)); |
Russell King | 4e30b69 | 2009-12-18 17:48:37 +0000 | [diff] [blame] | 525 | if (err >= 0) { |
Russell King | 58e8a47 | 2011-01-26 16:59:39 +0000 | [diff] [blame] | 526 | struct aaci *aaci = substream->private_data; |
Russell King | a08d565 | 2009-12-18 17:48:45 +0000 | [diff] [blame] | 527 | |
Russell King | 58e8a47 | 2011-01-26 16:59:39 +0000 | [diff] [blame] | 528 | err = snd_ac97_pcm_open(aacirun->pcm, rate, channels, |
Russell King | a08d565 | 2009-12-18 17:48:45 +0000 | [diff] [blame] | 529 | aacirun->pcm->r[dbl].slots); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 530 | |
Russell King | 4e30b69 | 2009-12-18 17:48:37 +0000 | [diff] [blame] | 531 | aacirun->pcm_open = err == 0; |
Russell King | d3aee79 | 2009-12-18 17:48:40 +0000 | [diff] [blame] | 532 | aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16; |
Russell King | 58e8a47 | 2011-01-26 16:59:39 +0000 | [diff] [blame] | 533 | aacirun->cr |= channels_to_slotmask[channels + dbl * 2]; |
Russell King | d3aee79 | 2009-12-18 17:48:40 +0000 | [diff] [blame] | 534 | |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 535 | /* |
| 536 | * fifo_bytes is the number of bytes we transfer to/from |
| 537 | * the FIFO, including padding. So that's x4. As we're |
| 538 | * in compact mode, the FIFO is half the size. |
| 539 | */ |
| 540 | aacirun->fifo_bytes = aaci->fifo_depth * 4 / 2; |
Russell King | 4e30b69 | 2009-12-18 17:48:37 +0000 | [diff] [blame] | 541 | } |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 542 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 543 | return err; |
| 544 | } |
| 545 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 546 | static int aaci_pcm_prepare(struct snd_pcm_substream *substream) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 547 | { |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 548 | struct snd_pcm_runtime *runtime = substream->runtime; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 549 | struct aaci_runtime *aacirun = runtime->private_data; |
| 550 | |
Russell King | c0dea82 | 2011-01-13 00:34:08 +0000 | [diff] [blame] | 551 | aacirun->period = snd_pcm_lib_period_bytes(substream); |
Russell King | 4e30b69 | 2009-12-18 17:48:37 +0000 | [diff] [blame] | 552 | aacirun->start = runtime->dma_area; |
Russell King | 88cdca9 | 2009-11-23 09:44:10 +0100 | [diff] [blame] | 553 | aacirun->end = aacirun->start + snd_pcm_lib_buffer_bytes(substream); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 554 | aacirun->ptr = aacirun->start; |
Russell King | c0dea82 | 2011-01-13 00:34:08 +0000 | [diff] [blame] | 555 | aacirun->bytes = aacirun->period; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 556 | |
| 557 | return 0; |
| 558 | } |
| 559 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 560 | static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 561 | { |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 562 | struct snd_pcm_runtime *runtime = substream->runtime; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 563 | struct aaci_runtime *aacirun = runtime->private_data; |
| 564 | ssize_t bytes = aacirun->ptr - aacirun->start; |
| 565 | |
| 566 | return bytes_to_frames(runtime, bytes); |
| 567 | } |
| 568 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 569 | |
| 570 | /* |
| 571 | * Playback specific ALSA stuff |
| 572 | */ |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 573 | static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun) |
| 574 | { |
| 575 | u32 ie; |
| 576 | |
| 577 | ie = readl(aacirun->base + AACI_IE); |
| 578 | ie &= ~(IE_URIE|IE_TXIE); |
| 579 | writel(ie, aacirun->base + AACI_IE); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 580 | aacirun->cr &= ~CR_EN; |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 581 | aaci_chan_wait_ready(aacirun, SR_TXB); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 582 | writel(aacirun->cr, aacirun->base + AACI_TXCR); |
| 583 | } |
| 584 | |
| 585 | static void aaci_pcm_playback_start(struct aaci_runtime *aacirun) |
| 586 | { |
| 587 | u32 ie; |
| 588 | |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 589 | aaci_chan_wait_ready(aacirun, SR_TXB); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 590 | aacirun->cr |= CR_EN; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 591 | |
| 592 | ie = readl(aacirun->base + AACI_IE); |
| 593 | ie |= IE_URIE | IE_TXIE; |
| 594 | writel(ie, aacirun->base + AACI_IE); |
| 595 | writel(aacirun->cr, aacirun->base + AACI_TXCR); |
| 596 | } |
| 597 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 598 | static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 599 | { |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 600 | struct aaci_runtime *aacirun = substream->runtime->private_data; |
| 601 | unsigned long flags; |
| 602 | int ret = 0; |
| 603 | |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 604 | spin_lock_irqsave(&aacirun->lock, flags); |
| 605 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 606 | switch (cmd) { |
| 607 | case SNDRV_PCM_TRIGGER_START: |
| 608 | aaci_pcm_playback_start(aacirun); |
| 609 | break; |
| 610 | |
| 611 | case SNDRV_PCM_TRIGGER_RESUME: |
| 612 | aaci_pcm_playback_start(aacirun); |
| 613 | break; |
| 614 | |
| 615 | case SNDRV_PCM_TRIGGER_STOP: |
| 616 | aaci_pcm_playback_stop(aacirun); |
| 617 | break; |
| 618 | |
| 619 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 620 | aaci_pcm_playback_stop(aacirun); |
| 621 | break; |
| 622 | |
| 623 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 624 | break; |
| 625 | |
| 626 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 627 | break; |
| 628 | |
| 629 | default: |
| 630 | ret = -EINVAL; |
| 631 | } |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 632 | |
| 633 | spin_unlock_irqrestore(&aacirun->lock, flags); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 634 | |
| 635 | return ret; |
| 636 | } |
| 637 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 638 | static struct snd_pcm_ops aaci_playback_ops = { |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 639 | .open = aaci_pcm_open, |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 640 | .close = aaci_pcm_close, |
| 641 | .ioctl = snd_pcm_lib_ioctl, |
Russell King | 58e8a47 | 2011-01-26 16:59:39 +0000 | [diff] [blame] | 642 | .hw_params = aaci_pcm_hw_params, |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 643 | .hw_free = aaci_pcm_hw_free, |
| 644 | .prepare = aaci_pcm_prepare, |
| 645 | .trigger = aaci_pcm_playback_trigger, |
| 646 | .pointer = aaci_pcm_pointer, |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 647 | }; |
| 648 | |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 649 | static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun) |
| 650 | { |
| 651 | u32 ie; |
| 652 | |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 653 | aaci_chan_wait_ready(aacirun, SR_RXB); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 654 | |
| 655 | ie = readl(aacirun->base + AACI_IE); |
| 656 | ie &= ~(IE_ORIE | IE_RXIE); |
| 657 | writel(ie, aacirun->base+AACI_IE); |
| 658 | |
| 659 | aacirun->cr &= ~CR_EN; |
| 660 | |
| 661 | writel(aacirun->cr, aacirun->base + AACI_RXCR); |
| 662 | } |
| 663 | |
| 664 | static void aaci_pcm_capture_start(struct aaci_runtime *aacirun) |
| 665 | { |
| 666 | u32 ie; |
| 667 | |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 668 | aaci_chan_wait_ready(aacirun, SR_RXB); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 669 | |
| 670 | #ifdef DEBUG |
| 671 | /* RX Timeout value: bits 28:17 in RXCR */ |
| 672 | aacirun->cr |= 0xf << 17; |
| 673 | #endif |
| 674 | |
| 675 | aacirun->cr |= CR_EN; |
| 676 | writel(aacirun->cr, aacirun->base + AACI_RXCR); |
| 677 | |
| 678 | ie = readl(aacirun->base + AACI_IE); |
| 679 | ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full |
| 680 | writel(ie, aacirun->base + AACI_IE); |
| 681 | } |
| 682 | |
Russell King | 8a37184 | 2007-02-20 15:44:23 +0000 | [diff] [blame] | 683 | static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd) |
| 684 | { |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 685 | struct aaci_runtime *aacirun = substream->runtime->private_data; |
| 686 | unsigned long flags; |
| 687 | int ret = 0; |
| 688 | |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 689 | spin_lock_irqsave(&aacirun->lock, flags); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 690 | |
| 691 | switch (cmd) { |
| 692 | case SNDRV_PCM_TRIGGER_START: |
| 693 | aaci_pcm_capture_start(aacirun); |
| 694 | break; |
| 695 | |
| 696 | case SNDRV_PCM_TRIGGER_RESUME: |
| 697 | aaci_pcm_capture_start(aacirun); |
| 698 | break; |
| 699 | |
| 700 | case SNDRV_PCM_TRIGGER_STOP: |
| 701 | aaci_pcm_capture_stop(aacirun); |
| 702 | break; |
| 703 | |
| 704 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 705 | aaci_pcm_capture_stop(aacirun); |
| 706 | break; |
| 707 | |
| 708 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 709 | break; |
| 710 | |
| 711 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 712 | break; |
| 713 | |
| 714 | default: |
| 715 | ret = -EINVAL; |
| 716 | } |
| 717 | |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 718 | spin_unlock_irqrestore(&aacirun->lock, flags); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 719 | |
| 720 | return ret; |
| 721 | } |
| 722 | |
Russell King | 8a37184 | 2007-02-20 15:44:23 +0000 | [diff] [blame] | 723 | static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream) |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 724 | { |
| 725 | struct snd_pcm_runtime *runtime = substream->runtime; |
| 726 | struct aaci *aaci = substream->private_data; |
| 727 | |
| 728 | aaci_pcm_prepare(substream); |
| 729 | |
| 730 | /* allow changing of sample rate */ |
| 731 | aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */ |
| 732 | aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); |
| 733 | aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate); |
| 734 | |
| 735 | /* Record select: Mic: 0, Aux: 3, Line: 4 */ |
| 736 | aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404); |
| 737 | |
| 738 | return 0; |
| 739 | } |
| 740 | |
Russell King | 8a37184 | 2007-02-20 15:44:23 +0000 | [diff] [blame] | 741 | static struct snd_pcm_ops aaci_capture_ops = { |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 742 | .open = aaci_pcm_open, |
| 743 | .close = aaci_pcm_close, |
| 744 | .ioctl = snd_pcm_lib_ioctl, |
Russell King | 58e8a47 | 2011-01-26 16:59:39 +0000 | [diff] [blame] | 745 | .hw_params = aaci_pcm_hw_params, |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 746 | .hw_free = aaci_pcm_hw_free, |
| 747 | .prepare = aaci_pcm_capture_prepare, |
| 748 | .trigger = aaci_pcm_capture_trigger, |
| 749 | .pointer = aaci_pcm_pointer, |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 750 | }; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 751 | |
| 752 | /* |
| 753 | * Power Management. |
| 754 | */ |
| 755 | #ifdef CONFIG_PM |
Ulf Hansson | b13a714 | 2013-12-03 11:04:26 +0100 | [diff] [blame] | 756 | static int aaci_do_suspend(struct snd_card *card) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 757 | { |
| 758 | struct aaci *aaci = card->private_data; |
Takashi Iwai | 792a6c5 | 2005-11-17 17:19:25 +0100 | [diff] [blame] | 759 | snd_power_change_state(card, SNDRV_CTL_POWER_D3cold); |
| 760 | snd_pcm_suspend_all(aaci->pcm); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 761 | return 0; |
| 762 | } |
| 763 | |
Ulf Hansson | b13a714 | 2013-12-03 11:04:26 +0100 | [diff] [blame] | 764 | static int aaci_do_resume(struct snd_card *card) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 765 | { |
Takashi Iwai | 792a6c5 | 2005-11-17 17:19:25 +0100 | [diff] [blame] | 766 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 767 | return 0; |
| 768 | } |
| 769 | |
Ulf Hansson | b13a714 | 2013-12-03 11:04:26 +0100 | [diff] [blame] | 770 | static int aaci_suspend(struct device *dev) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 771 | { |
Ulf Hansson | b13a714 | 2013-12-03 11:04:26 +0100 | [diff] [blame] | 772 | struct snd_card *card = dev_get_drvdata(dev); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 773 | return card ? aaci_do_suspend(card) : 0; |
| 774 | } |
| 775 | |
Ulf Hansson | b13a714 | 2013-12-03 11:04:26 +0100 | [diff] [blame] | 776 | static int aaci_resume(struct device *dev) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 777 | { |
Ulf Hansson | b13a714 | 2013-12-03 11:04:26 +0100 | [diff] [blame] | 778 | struct snd_card *card = dev_get_drvdata(dev); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 779 | return card ? aaci_do_resume(card) : 0; |
| 780 | } |
Ulf Hansson | b13a714 | 2013-12-03 11:04:26 +0100 | [diff] [blame] | 781 | |
| 782 | static SIMPLE_DEV_PM_OPS(aaci_dev_pm_ops, aaci_suspend, aaci_resume); |
| 783 | #define AACI_DEV_PM_OPS (&aaci_dev_pm_ops) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 784 | #else |
Ulf Hansson | b13a714 | 2013-12-03 11:04:26 +0100 | [diff] [blame] | 785 | #define AACI_DEV_PM_OPS NULL |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 786 | #endif |
| 787 | |
| 788 | |
Bill Pemberton | 6c9dc19 | 2012-12-06 12:35:11 -0500 | [diff] [blame] | 789 | static struct ac97_pcm ac97_defs[] = { |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 790 | [0] = { /* Front PCM */ |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 791 | .exclusive = 1, |
| 792 | .r = { |
| 793 | [0] = { |
| 794 | .slots = (1 << AC97_SLOT_PCM_LEFT) | |
| 795 | (1 << AC97_SLOT_PCM_RIGHT) | |
| 796 | (1 << AC97_SLOT_PCM_CENTER) | |
| 797 | (1 << AC97_SLOT_PCM_SLEFT) | |
| 798 | (1 << AC97_SLOT_PCM_SRIGHT) | |
| 799 | (1 << AC97_SLOT_LFE), |
| 800 | }, |
Russell King | a08d565 | 2009-12-18 17:48:45 +0000 | [diff] [blame] | 801 | [1] = { |
| 802 | .slots = (1 << AC97_SLOT_PCM_LEFT) | |
| 803 | (1 << AC97_SLOT_PCM_RIGHT) | |
| 804 | (1 << AC97_SLOT_PCM_LEFT_0) | |
| 805 | (1 << AC97_SLOT_PCM_RIGHT_0), |
| 806 | }, |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 807 | }, |
| 808 | }, |
| 809 | [1] = { /* PCM in */ |
| 810 | .stream = 1, |
| 811 | .exclusive = 1, |
| 812 | .r = { |
| 813 | [0] = { |
| 814 | .slots = (1 << AC97_SLOT_PCM_LEFT) | |
| 815 | (1 << AC97_SLOT_PCM_RIGHT), |
| 816 | }, |
| 817 | }, |
| 818 | }, |
| 819 | [2] = { /* Mic in */ |
| 820 | .stream = 1, |
| 821 | .exclusive = 1, |
| 822 | .r = { |
| 823 | [0] = { |
| 824 | .slots = (1 << AC97_SLOT_MIC), |
| 825 | }, |
| 826 | }, |
| 827 | } |
| 828 | }; |
| 829 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 830 | static struct snd_ac97_bus_ops aaci_bus_ops = { |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 831 | .write = aaci_ac97_write, |
| 832 | .read = aaci_ac97_read, |
| 833 | }; |
| 834 | |
Bill Pemberton | 6c9dc19 | 2012-12-06 12:35:11 -0500 | [diff] [blame] | 835 | static int aaci_probe_ac97(struct aaci *aaci) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 836 | { |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 837 | struct snd_ac97_template ac97_template; |
| 838 | struct snd_ac97_bus *ac97_bus; |
| 839 | struct snd_ac97 *ac97; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 840 | int ret; |
| 841 | |
| 842 | /* |
| 843 | * Assert AACIRESET for 2us |
| 844 | */ |
| 845 | writel(0, aaci->base + AACI_RESET); |
| 846 | udelay(2); |
| 847 | writel(RESET_NRST, aaci->base + AACI_RESET); |
| 848 | |
| 849 | /* |
| 850 | * Give the AC'97 codec more than enough time |
| 851 | * to wake up. (42us = ~2 frames at 48kHz.) |
| 852 | */ |
Russell King | 250c7a6 | 2011-01-12 23:42:57 +0000 | [diff] [blame] | 853 | udelay(FRAME_PERIOD_US * 2); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 854 | |
| 855 | ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus); |
| 856 | if (ret) |
| 857 | goto out; |
| 858 | |
| 859 | ac97_bus->clock = 48000; |
| 860 | aaci->ac97_bus = ac97_bus; |
| 861 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 862 | memset(&ac97_template, 0, sizeof(struct snd_ac97_template)); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 863 | ac97_template.private_data = aaci; |
| 864 | ac97_template.num = 0; |
| 865 | ac97_template.scaps = AC97_SCAP_SKIP_MODEM; |
| 866 | |
| 867 | ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97); |
| 868 | if (ret) |
| 869 | goto out; |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 870 | aaci->ac97 = ac97; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 871 | |
| 872 | /* |
| 873 | * Disable AC97 PC Beep input on audio codecs. |
| 874 | */ |
| 875 | if (ac97_is_audio(ac97)) |
| 876 | snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e); |
| 877 | |
| 878 | ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs); |
| 879 | if (ret) |
| 880 | goto out; |
| 881 | |
| 882 | aaci->playback.pcm = &ac97_bus->pcms[0]; |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 883 | aaci->capture.pcm = &ac97_bus->pcms[1]; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 884 | |
| 885 | out: |
| 886 | return ret; |
| 887 | } |
| 888 | |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 889 | static void aaci_free_card(struct snd_card *card) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 890 | { |
| 891 | struct aaci *aaci = card->private_data; |
| 892 | if (aaci->base) |
| 893 | iounmap(aaci->base); |
| 894 | } |
| 895 | |
Bill Pemberton | 6c9dc19 | 2012-12-06 12:35:11 -0500 | [diff] [blame] | 896 | static struct aaci *aaci_init_card(struct amba_device *dev) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 897 | { |
| 898 | struct aaci *aaci; |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 899 | struct snd_card *card; |
Takashi Iwai | bd7dd77 | 2008-12-28 16:45:02 +0100 | [diff] [blame] | 900 | int err; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 901 | |
Takashi Iwai | bd7dd77 | 2008-12-28 16:45:02 +0100 | [diff] [blame] | 902 | err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, |
| 903 | THIS_MODULE, sizeof(struct aaci), &card); |
| 904 | if (err < 0) |
Takashi Iwai | 631e8ad | 2008-09-01 15:31:50 +0200 | [diff] [blame] | 905 | return NULL; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 906 | |
| 907 | card->private_free = aaci_free_card; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 908 | |
| 909 | strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver)); |
| 910 | strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname)); |
| 911 | snprintf(card->longname, sizeof(card->longname), |
Russell King | f006d8fc | 2011-01-12 23:46:03 +0000 | [diff] [blame] | 912 | "%s PL%03x rev%u at 0x%08llx, irq %d", |
| 913 | card->shortname, amba_part(dev), amba_rev(dev), |
| 914 | (unsigned long long)dev->res.start, dev->irq[0]); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 915 | |
| 916 | aaci = card->private_data; |
Ingo Molnar | 12aa757 | 2006-01-16 16:36:05 +0100 | [diff] [blame] | 917 | mutex_init(&aaci->ac97_sem); |
Russell King | b60fb51 | 2011-01-25 15:52:33 +0000 | [diff] [blame] | 918 | mutex_init(&aaci->irq_lock); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 919 | aaci->card = card; |
| 920 | aaci->dev = dev; |
| 921 | |
| 922 | /* Set MAINCR to allow slot 1 and 2 data IO */ |
| 923 | aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN | |
| 924 | MAINCR_SL2RXEN | MAINCR_SL2TXEN; |
| 925 | |
| 926 | return aaci; |
| 927 | } |
| 928 | |
Bill Pemberton | 6c9dc19 | 2012-12-06 12:35:11 -0500 | [diff] [blame] | 929 | static int aaci_init_pcm(struct aaci *aaci) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 930 | { |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 931 | struct snd_pcm *pcm; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 932 | int ret; |
| 933 | |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 934 | ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 935 | if (ret == 0) { |
| 936 | aaci->pcm = pcm; |
| 937 | pcm->private_data = aaci; |
| 938 | pcm->info_flags = 0; |
| 939 | |
| 940 | strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name)); |
| 941 | |
| 942 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 943 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops); |
Takashi Iwai | d679732 | 2009-11-26 15:08:54 +0100 | [diff] [blame] | 944 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, |
Takashi Iwai | d494643 | 2009-12-18 20:25:30 +0100 | [diff] [blame] | 945 | NULL, 0, 64 * 1024); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 946 | } |
| 947 | |
| 948 | return ret; |
| 949 | } |
| 950 | |
Bill Pemberton | 6c9dc19 | 2012-12-06 12:35:11 -0500 | [diff] [blame] | 951 | static unsigned int aaci_size_fifo(struct aaci *aaci) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 952 | { |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 953 | struct aaci_runtime *aacirun = &aaci->playback; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 954 | int i; |
| 955 | |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 956 | /* |
| 957 | * Enable the channel, but don't assign it to any slots, so |
| 958 | * it won't empty onto the AC'97 link. |
| 959 | */ |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 960 | writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 961 | |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 962 | for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++) |
| 963 | writel(0, aacirun->fifo); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 964 | |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 965 | writel(0, aacirun->base + AACI_TXCR); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 966 | |
| 967 | /* |
| 968 | * Re-initialise the AACI after the FIFO depth test, to |
| 969 | * ensure that the FIFOs are empty. Unfortunately, merely |
| 970 | * disabling the channel doesn't clear the FIFO. |
| 971 | */ |
| 972 | writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR); |
Russell King | 7c28938 | 2011-02-05 10:41:55 +0000 | [diff] [blame] | 973 | readl(aaci->base + AACI_MAINCR); |
| 974 | udelay(1); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 975 | writel(aaci->maincr, aaci->base + AACI_MAINCR); |
| 976 | |
| 977 | /* |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 978 | * If we hit 4096 entries, we failed. Go back to the specified |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 979 | * fifo depth. |
| 980 | */ |
| 981 | if (i == 4096) |
| 982 | i = 8; |
| 983 | |
| 984 | return i; |
| 985 | } |
| 986 | |
Bill Pemberton | 6c9dc19 | 2012-12-06 12:35:11 -0500 | [diff] [blame] | 987 | static int aaci_probe(struct amba_device *dev, |
| 988 | const struct amba_id *id) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 989 | { |
| 990 | struct aaci *aaci; |
| 991 | int ret, i; |
| 992 | |
| 993 | ret = amba_request_regions(dev, NULL); |
| 994 | if (ret) |
| 995 | return ret; |
| 996 | |
| 997 | aaci = aaci_init_card(dev); |
Takashi Iwai | 631e8ad | 2008-09-01 15:31:50 +0200 | [diff] [blame] | 998 | if (!aaci) { |
| 999 | ret = -ENOMEM; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1000 | goto out; |
| 1001 | } |
| 1002 | |
Linus Walleij | dc890c2 | 2009-06-07 23:27:31 +0100 | [diff] [blame] | 1003 | aaci->base = ioremap(dev->res.start, resource_size(&dev->res)); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1004 | if (!aaci->base) { |
| 1005 | ret = -ENOMEM; |
| 1006 | goto out; |
| 1007 | } |
| 1008 | |
| 1009 | /* |
| 1010 | * Playback uses AACI channel 0 |
| 1011 | */ |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 1012 | spin_lock_init(&aaci->playback.lock); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1013 | aaci->playback.base = aaci->base + AACI_CSCH1; |
| 1014 | aaci->playback.fifo = aaci->base + AACI_DR1; |
| 1015 | |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 1016 | /* |
| 1017 | * Capture uses AACI channel 0 |
| 1018 | */ |
Russell King | d6a89fe | 2009-12-18 17:48:50 +0000 | [diff] [blame] | 1019 | spin_lock_init(&aaci->capture.lock); |
Kevin Hilman | 41762b8 | 2007-02-07 05:45:32 +0100 | [diff] [blame] | 1020 | aaci->capture.base = aaci->base + AACI_CSCH1; |
| 1021 | aaci->capture.fifo = aaci->base + AACI_DR1; |
| 1022 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1023 | for (i = 0; i < 4; i++) { |
viro@ZenIV.linux.org.uk | e12ba64 | 2005-09-06 02:06:57 +0100 | [diff] [blame] | 1024 | void __iomem *base = aaci->base + i * 0x14; |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1025 | |
| 1026 | writel(0, base + AACI_IE); |
| 1027 | writel(0, base + AACI_TXCR); |
| 1028 | writel(0, base + AACI_RXCR); |
| 1029 | } |
| 1030 | |
| 1031 | writel(0x1fff, aaci->base + AACI_INTCLR); |
| 1032 | writel(aaci->maincr, aaci->base + AACI_MAINCR); |
Philby John | b68b58f | 2010-03-26 21:37:51 +0530 | [diff] [blame] | 1033 | /* |
| 1034 | * Fix: ac97 read back fail errors by reading |
| 1035 | * from any arbitrary aaci register. |
| 1036 | */ |
| 1037 | readl(aaci->base + AACI_CSCH1); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1038 | ret = aaci_probe_ac97(aaci); |
| 1039 | if (ret) |
| 1040 | goto out; |
| 1041 | |
Catalin Marinas | f27f218 | 2006-02-01 19:25:58 +0000 | [diff] [blame] | 1042 | /* |
| 1043 | * Size the FIFOs (must be multiple of 16). |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 1044 | * This is the number of entries in the FIFO. |
Catalin Marinas | f27f218 | 2006-02-01 19:25:58 +0000 | [diff] [blame] | 1045 | */ |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 1046 | aaci->fifo_depth = aaci_size_fifo(aaci); |
| 1047 | if (aaci->fifo_depth & 15) { |
| 1048 | printk(KERN_WARNING "AACI: FIFO depth %d not supported\n", |
| 1049 | aaci->fifo_depth); |
Catalin Marinas | f27f218 | 2006-02-01 19:25:58 +0000 | [diff] [blame] | 1050 | ret = -ENODEV; |
| 1051 | goto out; |
| 1052 | } |
| 1053 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1054 | ret = aaci_init_pcm(aaci); |
| 1055 | if (ret) |
| 1056 | goto out; |
| 1057 | |
Takashi Iwai | a76af19 | 2005-09-05 16:56:40 +0200 | [diff] [blame] | 1058 | snd_card_set_dev(aaci->card, &dev->dev); |
| 1059 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1060 | ret = snd_card_register(aaci->card); |
| 1061 | if (ret == 0) { |
Russell King | 5d350cb | 2011-01-13 22:25:10 +0000 | [diff] [blame] | 1062 | dev_info(&dev->dev, "%s\n", aaci->card->longname); |
| 1063 | dev_info(&dev->dev, "FIFO %u entries\n", aaci->fifo_depth); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1064 | amba_set_drvdata(dev, aaci->card); |
| 1065 | return ret; |
| 1066 | } |
| 1067 | |
| 1068 | out: |
| 1069 | if (aaci) |
| 1070 | snd_card_free(aaci->card); |
| 1071 | amba_release_regions(dev); |
| 1072 | return ret; |
| 1073 | } |
| 1074 | |
Bill Pemberton | 6c9dc19 | 2012-12-06 12:35:11 -0500 | [diff] [blame] | 1075 | static int aaci_remove(struct amba_device *dev) |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1076 | { |
Takashi Iwai | ceb9e47 | 2005-11-17 15:10:16 +0100 | [diff] [blame] | 1077 | struct snd_card *card = amba_get_drvdata(dev); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1078 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1079 | if (card) { |
| 1080 | struct aaci *aaci = card->private_data; |
| 1081 | writel(0, aaci->base + AACI_MAINCR); |
| 1082 | |
| 1083 | snd_card_free(card); |
| 1084 | amba_release_regions(dev); |
| 1085 | } |
| 1086 | |
| 1087 | return 0; |
| 1088 | } |
| 1089 | |
| 1090 | static struct amba_id aaci_ids[] = { |
| 1091 | { |
| 1092 | .id = 0x00041041, |
| 1093 | .mask = 0x000fffff, |
| 1094 | }, |
| 1095 | { 0, 0 }, |
| 1096 | }; |
| 1097 | |
Dave Martin | 9d5c627 | 2011-10-05 15:50:36 +0100 | [diff] [blame] | 1098 | MODULE_DEVICE_TABLE(amba, aaci_ids); |
| 1099 | |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1100 | static struct amba_driver aaci_driver = { |
| 1101 | .drv = { |
| 1102 | .name = DRIVER_NAME, |
Ulf Hansson | b13a714 | 2013-12-03 11:04:26 +0100 | [diff] [blame] | 1103 | .pm = AACI_DEV_PM_OPS, |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1104 | }, |
| 1105 | .probe = aaci_probe, |
Bill Pemberton | 6c9dc19 | 2012-12-06 12:35:11 -0500 | [diff] [blame] | 1106 | .remove = aaci_remove, |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1107 | .id_table = aaci_ids, |
| 1108 | }; |
| 1109 | |
viresh kumar | 9e5ed09 | 2012-03-15 10:40:38 +0100 | [diff] [blame] | 1110 | module_amba_driver(aaci_driver); |
Russell King | cb5a6ff | 2005-05-12 14:04:59 +0200 | [diff] [blame] | 1111 | |
| 1112 | MODULE_LICENSE("GPL"); |
| 1113 | MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver"); |