Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Agere Systems Inc. |
| 3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs |
| 4 | * |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 5 | * Copyright © 2005 Agere Systems Inc. |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 6 | * All rights reserved. |
| 7 | * http://www.agere.com |
| 8 | * |
| 9 | *------------------------------------------------------------------------------ |
| 10 | * |
| 11 | * et1310_rx.h - Defines, structs, enums, prototypes, etc. pertaining to data |
| 12 | * reception. |
| 13 | * |
| 14 | *------------------------------------------------------------------------------ |
| 15 | * |
| 16 | * SOFTWARE LICENSE |
| 17 | * |
| 18 | * This software is provided subject to the following terms and conditions, |
| 19 | * which you should read carefully before using the software. Using this |
| 20 | * software indicates your acceptance of these terms and conditions. If you do |
| 21 | * not agree with these terms and conditions, do not use the software. |
| 22 | * |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 23 | * Copyright © 2005 Agere Systems Inc. |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 24 | * All rights reserved. |
| 25 | * |
| 26 | * Redistribution and use in source or binary forms, with or without |
| 27 | * modifications, are permitted provided that the following conditions are met: |
| 28 | * |
| 29 | * . Redistributions of source code must retain the above copyright notice, this |
| 30 | * list of conditions and the following Disclaimer as comments in the code as |
| 31 | * well as in the documentation and/or other materials provided with the |
| 32 | * distribution. |
| 33 | * |
| 34 | * . Redistributions in binary form must reproduce the above copyright notice, |
| 35 | * this list of conditions and the following Disclaimer in the documentation |
| 36 | * and/or other materials provided with the distribution. |
| 37 | * |
| 38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors |
| 39 | * may be used to endorse or promote products derived from this software |
| 40 | * without specific prior written permission. |
| 41 | * |
| 42 | * Disclaimer |
| 43 | * |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 44 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF |
| 46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY |
| 47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN |
| 48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY |
| 49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT |
| 53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH |
| 55 | * DAMAGE. |
| 56 | * |
| 57 | */ |
| 58 | |
| 59 | #ifndef __ET1310_RX_H__ |
| 60 | #define __ET1310_RX_H__ |
| 61 | |
| 62 | #include "et1310_address_map.h" |
| 63 | |
| 64 | #define USE_FBR0 true |
| 65 | |
| 66 | #ifdef USE_FBR0 |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 67 | /* #define FBR0_BUFFER_SIZE 256 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 68 | #endif |
| 69 | |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 70 | /* #define FBR1_BUFFER_SIZE 2048 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 71 | |
| 72 | #define FBR_CHUNKS 32 |
| 73 | |
| 74 | #define MAX_DESC_PER_RING_RX 1024 |
| 75 | |
| 76 | /* number of RFDs - default and min */ |
| 77 | #ifdef USE_FBR0 |
| 78 | #define RFD_LOW_WATER_MARK 40 |
| 79 | #define NIC_MIN_NUM_RFD 64 |
| 80 | #define NIC_DEFAULT_NUM_RFD 1024 |
| 81 | #else |
| 82 | #define RFD_LOW_WATER_MARK 20 |
| 83 | #define NIC_MIN_NUM_RFD 64 |
| 84 | #define NIC_DEFAULT_NUM_RFD 256 |
| 85 | #endif |
| 86 | |
| 87 | #define NUM_PACKETS_HANDLED 256 |
| 88 | |
| 89 | #define ALCATEL_BAD_STATUS 0xe47f0000 |
| 90 | #define ALCATEL_MULTICAST_PKT 0x01000000 |
| 91 | #define ALCATEL_BROADCAST_PKT 0x02000000 |
| 92 | |
| 93 | /* typedefs for Free Buffer Descriptors */ |
| 94 | typedef union _FBR_WORD2_t { |
| 95 | u32 value; |
| 96 | struct { |
| 97 | #ifdef _BIT_FIELDS_HTOL |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 98 | u32 reserved:22; /* bits 10-31 */ |
| 99 | u32 bi:10; /* bits 0-9(Buffer Index) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 100 | #else |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 101 | u32 bi:10; /* bits 0-9(Buffer Index) */ |
| 102 | u32 reserved:22; /* bit 10-31 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 103 | #endif |
| 104 | } bits; |
| 105 | } FBR_WORD2_t, *PFBR_WORD2_t; |
| 106 | |
| 107 | typedef struct _FBR_DESC_t { |
| 108 | u32 addr_lo; |
| 109 | u32 addr_hi; |
| 110 | FBR_WORD2_t word2; |
| 111 | } FBR_DESC_t, *PFBR_DESC_t; |
| 112 | |
| 113 | /* Typedefs for Packet Status Ring Descriptors */ |
| 114 | typedef union _PKT_STAT_DESC_WORD0_t { |
| 115 | u32 value; |
| 116 | struct { |
| 117 | #ifdef _BIT_FIELDS_HTOL |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 118 | /* top 16 bits are from the Alcatel Status Word as enumerated in */ |
| 119 | /* PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 120 | #if 0 |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 121 | u32 asw_trunc:1; /* bit 31(Rx frame truncated) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 122 | #endif |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 123 | u32 asw_long_evt:1; /* bit 31(Rx long event) */ |
| 124 | u32 asw_VLAN_tag:1; /* bit 30(VLAN tag detected) */ |
| 125 | u32 asw_unsupported_op:1; /* bit 29(unsupported OP code) */ |
| 126 | u32 asw_pause_frame:1; /* bit 28(is a pause frame) */ |
| 127 | u32 asw_control_frame:1; /* bit 27(is a control frame) */ |
| 128 | u32 asw_dribble_nibble:1; /* bit 26(spurious bits after EOP) */ |
| 129 | u32 asw_broadcast:1; /* bit 25(has a broadcast address) */ |
| 130 | u32 asw_multicast:1; /* bit 24(has a multicast address) */ |
| 131 | u32 asw_OK:1; /* bit 23(valid CRC + no code error) */ |
| 132 | u32 asw_too_long:1; /* bit 22(frame length > 1518 bytes) */ |
| 133 | u32 asw_len_chk_err:1; /* bit 21(frame length field incorrect) */ |
| 134 | u32 asw_CRC_err:1; /* bit 20(CRC error) */ |
| 135 | u32 asw_code_err:1; /* bit 19(one or more nibbles signalled as errors) */ |
| 136 | u32 asw_false_carrier_event:1; /* bit 18(bad carrier since last good packet) */ |
| 137 | u32 asw_RX_DV_event:1; /* bit 17(short receive event detected) */ |
| 138 | u32 asw_prev_pkt_dropped:1;/* bit 16(e.g. IFG too small on previous) */ |
| 139 | u32 unused:5; /* bits 11-15 */ |
| 140 | u32 vp:1; /* bit 10(VLAN Packet) */ |
| 141 | u32 jp:1; /* bit 9(Jumbo Packet) */ |
| 142 | u32 ft:1; /* bit 8(Frame Truncated) */ |
| 143 | u32 drop:1; /* bit 7(Drop packet) */ |
| 144 | u32 rxmac_error:1; /* bit 6(RXMAC Error Indicator) */ |
| 145 | u32 wol:1; /* bit 5(WOL Event) */ |
| 146 | u32 tcpp:1; /* bit 4(TCP checksum pass) */ |
| 147 | u32 tcpa:1; /* bit 3(TCP checksum assist) */ |
| 148 | u32 ipp:1; /* bit 2(IP checksum pass) */ |
| 149 | u32 ipa:1; /* bit 1(IP checksum assist) */ |
| 150 | u32 hp:1; /* bit 0(hash pass) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 151 | #else |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 152 | u32 hp:1; /* bit 0(hash pass) */ |
| 153 | u32 ipa:1; /* bit 1(IP checksum assist) */ |
| 154 | u32 ipp:1; /* bit 2(IP checksum pass) */ |
| 155 | u32 tcpa:1; /* bit 3(TCP checksum assist) */ |
| 156 | u32 tcpp:1; /* bit 4(TCP checksum pass) */ |
| 157 | u32 wol:1; /* bit 5(WOL Event) */ |
| 158 | u32 rxmac_error:1; /* bit 6(RXMAC Error Indicator) */ |
| 159 | u32 drop:1; /* bit 7(Drop packet) */ |
| 160 | u32 ft:1; /* bit 8(Frame Truncated) */ |
| 161 | u32 jp:1; /* bit 9(Jumbo Packet) */ |
| 162 | u32 vp:1; /* bit 10(VLAN Packet) */ |
| 163 | u32 unused:5; /* bits 11-15 */ |
| 164 | u32 asw_prev_pkt_dropped:1;/* bit 16(e.g. IFG too small on previous) */ |
| 165 | u32 asw_RX_DV_event:1; /* bit 17(short receive event detected) */ |
| 166 | u32 asw_false_carrier_event:1; /* bit 18(bad carrier since last good packet) */ |
| 167 | u32 asw_code_err:1; /* bit 19(one or more nibbles signalled as errors) */ |
| 168 | u32 asw_CRC_err:1; /* bit 20(CRC error) */ |
| 169 | u32 asw_len_chk_err:1; /* bit 21(frame length field incorrect) */ |
| 170 | u32 asw_too_long:1; /* bit 22(frame length > 1518 bytes) */ |
| 171 | u32 asw_OK:1; /* bit 23(valid CRC + no code error) */ |
| 172 | u32 asw_multicast:1; /* bit 24(has a multicast address) */ |
| 173 | u32 asw_broadcast:1; /* bit 25(has a broadcast address) */ |
| 174 | u32 asw_dribble_nibble:1; /* bit 26(spurious bits after EOP) */ |
| 175 | u32 asw_control_frame:1; /* bit 27(is a control frame) */ |
| 176 | u32 asw_pause_frame:1; /* bit 28(is a pause frame) */ |
| 177 | u32 asw_unsupported_op:1; /* bit 29(unsupported OP code) */ |
| 178 | u32 asw_VLAN_tag:1; /* bit 30(VLAN tag detected) */ |
| 179 | u32 asw_long_evt:1; /* bit 31(Rx long event) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 180 | #if 0 |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 181 | u32 asw_trunc:1; /* bit 31(Rx frame truncated) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 182 | #endif |
| 183 | #endif |
| 184 | } bits; |
| 185 | } PKT_STAT_DESC_WORD0_t, *PPKT_STAT_WORD0_t; |
| 186 | |
| 187 | typedef union _PKT_STAT_DESC_WORD1_t { |
| 188 | u32 value; |
| 189 | struct { |
| 190 | #ifdef _BIT_FIELDS_HTOL |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 191 | u32 unused:4; /* bits 28-31 */ |
| 192 | u32 ri:2; /* bits 26-27(Ring Index) */ |
| 193 | u32 bi:10; /* bits 16-25(Buffer Index) */ |
| 194 | u32 length:16; /* bit 0-15(length in bytes) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 195 | #else |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 196 | u32 length:16; /* bit 0-15(length in bytes) */ |
| 197 | u32 bi:10; /* bits 16-25(Buffer Index) */ |
| 198 | u32 ri:2; /* bits 26-27(Ring Index) */ |
| 199 | u32 unused:4; /* bits 28-31 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 200 | #endif |
| 201 | } bits; |
| 202 | } PKT_STAT_DESC_WORD1_t, *PPKT_STAT_WORD1_t; |
| 203 | |
| 204 | typedef struct _PKT_STAT_DESC_t { |
| 205 | PKT_STAT_DESC_WORD0_t word0; |
| 206 | PKT_STAT_DESC_WORD1_t word1; |
| 207 | } PKT_STAT_DESC_t, *PPKT_STAT_DESC_t; |
| 208 | |
| 209 | /* Typedefs for the RX DMA status word */ |
| 210 | |
| 211 | /* |
| 212 | * RXSTAT_WORD0_t structure holds part of the status bits of the Rx DMA engine |
| 213 | * that get copied out to memory by the ET-1310. Word 0 is a 32 bit word |
| 214 | * whichcontains Free Buffer ring 0 and 1 available offset. |
| 215 | */ |
| 216 | typedef union _rxstat_word0_t { |
| 217 | u32 value; |
| 218 | struct { |
| 219 | #ifdef _BIT_FIELDS_HTOL |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 220 | u32 FBR1unused:5; /* bits 27-31 */ |
| 221 | u32 FBR1wrap:1; /* bit 26 */ |
| 222 | u32 FBR1offset:10; /* bits 16-25 */ |
| 223 | u32 FBR0unused:5; /* bits 11-15 */ |
| 224 | u32 FBR0wrap:1; /* bit 10 */ |
| 225 | u32 FBR0offset:10; /* bits 0-9 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 226 | #else |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 227 | u32 FBR0offset:10; /* bits 0-9 */ |
| 228 | u32 FBR0wrap:1; /* bit 10 */ |
| 229 | u32 FBR0unused:5; /* bits 11-15 */ |
| 230 | u32 FBR1offset:10; /* bits 16-25 */ |
| 231 | u32 FBR1wrap:1; /* bit 26 */ |
| 232 | u32 FBR1unused:5; /* bits 27-31 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 233 | #endif |
| 234 | } bits; |
| 235 | } RXSTAT_WORD0_t, *PRXSTAT_WORD0_t; |
| 236 | |
| 237 | /* |
| 238 | * RXSTAT_WORD1_t structure holds part of the status bits of the Rx DMA engine |
| 239 | * that get copied out to memory by the ET-1310. Word 3 is a 32 bit word |
| 240 | * which contains the Packet Status Ring available offset. |
| 241 | */ |
| 242 | typedef union _rxstat_word1_t { |
| 243 | u32 value; |
| 244 | struct { |
| 245 | #ifdef _BIT_FIELDS_HTOL |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 246 | u32 PSRunused:3; /* bits 29-31 */ |
| 247 | u32 PSRwrap:1; /* bit 28 */ |
| 248 | u32 PSRoffset:12; /* bits 16-27 */ |
| 249 | u32 reserved:16; /* bits 0-15 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 250 | #else |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 251 | u32 reserved:16; /* bits 0-15 */ |
| 252 | u32 PSRoffset:12; /* bits 16-27 */ |
| 253 | u32 PSRwrap:1; /* bit 28 */ |
| 254 | u32 PSRunused:3; /* bits 29-31 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 255 | #endif |
| 256 | } bits; |
| 257 | } RXSTAT_WORD1_t, *PRXSTAT_WORD1_t; |
| 258 | |
| 259 | /* |
| 260 | * RX_STATUS_BLOCK_t is sructure representing the status of the Rx DMA engine |
| 261 | * it sits in free memory, and is pointed to by 0x101c / 0x1020 |
| 262 | */ |
| 263 | typedef struct _rx_status_block_t { |
| 264 | RXSTAT_WORD0_t Word0; |
| 265 | RXSTAT_WORD1_t Word1; |
| 266 | } RX_STATUS_BLOCK_t, *PRX_STATUS_BLOCK_t; |
| 267 | |
| 268 | /* |
| 269 | * Structure for look-up table holding free buffer ring pointers |
| 270 | */ |
| 271 | typedef struct _FbrLookupTable { |
| 272 | void *Va[MAX_DESC_PER_RING_RX]; |
| 273 | void *Buffer1[MAX_DESC_PER_RING_RX]; |
| 274 | void *Buffer2[MAX_DESC_PER_RING_RX]; |
| 275 | u32 PAHigh[MAX_DESC_PER_RING_RX]; |
| 276 | u32 PALow[MAX_DESC_PER_RING_RX]; |
| 277 | } FBRLOOKUPTABLE, *PFBRLOOKUPTABLE; |
| 278 | |
| 279 | typedef enum { |
| 280 | ONE_PACKET_INTERRUPT, |
| 281 | FOUR_PACKET_INTERRUPT |
| 282 | } eRX_INTERRUPT_STATE_t, *PeRX_INTERRUPT_STATE_t; |
| 283 | |
| 284 | /* |
| 285 | * Structure to hold the skb's in a list |
| 286 | */ |
| 287 | typedef struct rx_skb_list_elem { |
| 288 | struct list_head skb_list_elem; |
| 289 | dma_addr_t dma_addr; |
| 290 | struct sk_buff *skb; |
| 291 | } RX_SKB_LIST_ELEM, *PRX_SKB_LIST_ELEM; |
| 292 | |
| 293 | /* |
| 294 | * RX_RING_t is sructure representing the adaptor's local reference(s) to the |
| 295 | * rings |
| 296 | */ |
| 297 | typedef struct _rx_ring_t { |
| 298 | #ifdef USE_FBR0 |
| 299 | void *pFbr0RingVa; |
| 300 | dma_addr_t pFbr0RingPa; |
| 301 | void *Fbr0MemVa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; |
| 302 | dma_addr_t Fbr0MemPa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; |
| 303 | uint64_t Fbr0Realpa; |
| 304 | uint64_t Fbr0offset; |
| 305 | DMA10W_t local_Fbr0_full; |
| 306 | u32 Fbr0NumEntries; |
| 307 | u32 Fbr0BufferSize; |
| 308 | #endif |
| 309 | void *pFbr1RingVa; |
| 310 | dma_addr_t pFbr1RingPa; |
| 311 | void *Fbr1MemVa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; |
| 312 | dma_addr_t Fbr1MemPa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; |
| 313 | uint64_t Fbr1Realpa; |
| 314 | uint64_t Fbr1offset; |
| 315 | FBRLOOKUPTABLE *Fbr[2]; |
| 316 | DMA10W_t local_Fbr1_full; |
| 317 | u32 Fbr1NumEntries; |
| 318 | u32 Fbr1BufferSize; |
| 319 | |
| 320 | void *pPSRingVa; |
| 321 | dma_addr_t pPSRingPa; |
| 322 | uint64_t pPSRingRealPa; |
| 323 | uint64_t pPSRingOffset; |
| 324 | RXDMA_PSR_FULL_OFFSET_t local_psr_full; |
| 325 | u32 PsrNumEntries; |
| 326 | |
| 327 | void *pRxStatusVa; |
| 328 | dma_addr_t pRxStatusPa; |
| 329 | uint64_t RxStatusRealPA; |
| 330 | uint64_t RxStatusOffset; |
| 331 | |
| 332 | struct list_head RecvBufferPool; |
| 333 | |
| 334 | /* RECV */ |
| 335 | struct list_head RecvList; |
| 336 | struct list_head RecvPendingList; |
| 337 | u32 nReadyRecv; |
| 338 | |
| 339 | u32 NumRfd; |
| 340 | |
| 341 | bool UnfinishedReceives; |
| 342 | |
| 343 | struct list_head RecvPacketPool; |
| 344 | |
| 345 | /* lookaside lists */ |
| 346 | struct kmem_cache *RecvLookaside; |
| 347 | } RX_RING_t, *PRX_RING_t; |
| 348 | |
| 349 | /* Forward reference of RFD */ |
| 350 | struct _MP_RFD; |
| 351 | |
| 352 | /* Forward declaration of the private adapter structure */ |
| 353 | struct et131x_adapter; |
| 354 | |
| 355 | /* PROTOTYPES for Initialization */ |
| 356 | int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter); |
| 357 | void et131x_rx_dma_memory_free(struct et131x_adapter *adapter); |
| 358 | int et131x_rfd_resources_alloc(struct et131x_adapter *adapter, |
| 359 | struct _MP_RFD *pMpRfd); |
| 360 | void et131x_rfd_resources_free(struct et131x_adapter *adapter, |
| 361 | struct _MP_RFD *pMpRfd); |
| 362 | int et131x_init_recv(struct et131x_adapter *adapter); |
| 363 | |
| 364 | void ConfigRxDmaRegs(struct et131x_adapter *adapter); |
| 365 | void SetRxDmaTimer(struct et131x_adapter *adapter); |
| 366 | void et131x_rx_dma_disable(struct et131x_adapter *adapter); |
| 367 | void et131x_rx_dma_enable(struct et131x_adapter *adapter); |
| 368 | |
| 369 | void et131x_reset_recv(struct et131x_adapter *adapter); |
| 370 | |
| 371 | void et131x_handle_recv_interrupt(struct et131x_adapter *adapter); |
| 372 | |
| 373 | #endif /* __ET1310_RX_H__ */ |