Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Agere Systems Inc. |
| 3 | * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs |
| 4 | * |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 5 | * Copyright © 2005 Agere Systems Inc. |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 6 | * All rights reserved. |
| 7 | * http://www.agere.com |
| 8 | * |
| 9 | *------------------------------------------------------------------------------ |
| 10 | * |
| 11 | * et1310_tx.h - Defines, structs, enums, prototypes, etc. pertaining to data |
| 12 | * transmission. |
| 13 | * |
| 14 | *------------------------------------------------------------------------------ |
| 15 | * |
| 16 | * SOFTWARE LICENSE |
| 17 | * |
| 18 | * This software is provided subject to the following terms and conditions, |
| 19 | * which you should read carefully before using the software. Using this |
| 20 | * software indicates your acceptance of these terms and conditions. If you do |
| 21 | * not agree with these terms and conditions, do not use the software. |
| 22 | * |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 23 | * Copyright © 2005 Agere Systems Inc. |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 24 | * All rights reserved. |
| 25 | * |
| 26 | * Redistribution and use in source or binary forms, with or without |
| 27 | * modifications, are permitted provided that the following conditions are met: |
| 28 | * |
| 29 | * . Redistributions of source code must retain the above copyright notice, this |
| 30 | * list of conditions and the following Disclaimer as comments in the code as |
| 31 | * well as in the documentation and/or other materials provided with the |
| 32 | * distribution. |
| 33 | * |
| 34 | * . Redistributions in binary form must reproduce the above copyright notice, |
| 35 | * this list of conditions and the following Disclaimer in the documentation |
| 36 | * and/or other materials provided with the distribution. |
| 37 | * |
| 38 | * . Neither the name of Agere Systems Inc. nor the names of the contributors |
| 39 | * may be used to endorse or promote products derived from this software |
| 40 | * without specific prior written permission. |
| 41 | * |
| 42 | * Disclaimer |
| 43 | * |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 44 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 45 | * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF |
| 46 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY |
| 47 | * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN |
| 48 | * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY |
| 49 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 50 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 51 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 52 | * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT |
| 53 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 54 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH |
| 55 | * DAMAGE. |
| 56 | * |
| 57 | */ |
| 58 | |
| 59 | #ifndef __ET1310_TX_H__ |
| 60 | #define __ET1310_TX_H__ |
| 61 | |
| 62 | |
| 63 | /* Typedefs for Tx Descriptor Ring */ |
| 64 | |
| 65 | /* |
| 66 | * TXDESC_WORD2_t structure holds part of the control bits in the Tx Descriptor |
| 67 | * ring for the ET-1310 |
| 68 | */ |
| 69 | typedef union _txdesc_word2_t { |
| 70 | u32 value; |
| 71 | struct { |
| 72 | #ifdef _BIT_FIELDS_HTOL |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 73 | u32 vlan_prio:3; /* bits 29-31(VLAN priority) */ |
| 74 | u32 vlan_cfi:1; /* bit 28(cfi) */ |
| 75 | u32 vlan_tag:12; /* bits 16-27(VLAN tag) */ |
| 76 | u32 length_in_bytes:16; /* bits 0-15(packet length) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 77 | #else |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 78 | u32 length_in_bytes:16; /* bits 0-15(packet length) */ |
| 79 | u32 vlan_tag:12; /* bits 16-27(VLAN tag) */ |
| 80 | u32 vlan_cfi:1; /* bit 28(cfi) */ |
| 81 | u32 vlan_prio:3; /* bits 29-31(VLAN priority) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 82 | #endif /* _BIT_FIELDS_HTOL */ |
| 83 | } bits; |
| 84 | } TXDESC_WORD2_t, *PTXDESC_WORD2_t; |
| 85 | |
| 86 | /* |
| 87 | * TXDESC_WORD3_t structure holds part of the control bits in the Tx Descriptor |
| 88 | * ring for the ET-1310 |
| 89 | */ |
| 90 | typedef union _txdesc_word3_t { |
| 91 | u32 value; |
| 92 | struct { |
| 93 | #ifdef _BIT_FIELDS_HTOL |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 94 | u32 unused:17; /* bits 15-31 */ |
| 95 | u32 udpa:1; /* bit 14(UDP checksum assist) */ |
| 96 | u32 tcpa:1; /* bit 13(TCP checksum assist) */ |
| 97 | u32 ipa:1; /* bit 12(IP checksum assist) */ |
| 98 | u32 vlan:1; /* bit 11(append VLAN tag) */ |
| 99 | u32 hp:1; /* bit 10(Packet is a Huge packet) */ |
| 100 | u32 pp:1; /* bit 9(pad packet) */ |
| 101 | u32 mac:1; /* bit 8(MAC override) */ |
| 102 | u32 crc:1; /* bit 7(append CRC) */ |
| 103 | u32 e:1; /* bit 6(Tx frame has error) */ |
| 104 | u32 pf:1; /* bit 5(send pause frame) */ |
| 105 | u32 bp:1; /* bit 4(Issue half-duplex backpressure (XON/XOFF) */ |
| 106 | u32 cw:1; /* bit 3(Control word - no packet data) */ |
| 107 | u32 ir:1; /* bit 2(interrupt the processor when this pkt sent) */ |
| 108 | u32 f:1; /* bit 1(first packet in the sequence) */ |
| 109 | u32 l:1; /* bit 0(last packet in the sequence) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 110 | #else |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 111 | u32 l:1; /* bit 0(last packet in the sequence) */ |
| 112 | u32 f:1; /* bit 1(first packet in the sequence) */ |
| 113 | u32 ir:1; /* bit 2(interrupt the processor when this pkt sent) */ |
| 114 | u32 cw:1; /* bit 3(Control word - no packet data) */ |
| 115 | u32 bp:1; /* bit 4(Issue half-duplex backpressure (XON/XOFF) */ |
| 116 | u32 pf:1; /* bit 5(send pause frame) */ |
| 117 | u32 e:1; /* bit 6(Tx frame has error) */ |
| 118 | u32 crc:1; /* bit 7(append CRC) */ |
| 119 | u32 mac:1; /* bit 8(MAC override) */ |
| 120 | u32 pp:1; /* bit 9(pad packet) */ |
| 121 | u32 hp:1; /* bit 10(Packet is a Huge packet) */ |
| 122 | u32 vlan:1; /* bit 11(append VLAN tag) */ |
| 123 | u32 ipa:1; /* bit 12(IP checksum assist) */ |
| 124 | u32 tcpa:1; /* bit 13(TCP checksum assist) */ |
| 125 | u32 udpa:1; /* bit 14(UDP checksum assist) */ |
| 126 | u32 unused:17; /* bits 15-31 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 127 | #endif /* _BIT_FIELDS_HTOL */ |
| 128 | } bits; |
| 129 | } TXDESC_WORD3_t, *PTXDESC_WORD3_t; |
| 130 | |
| 131 | /* TX_DESC_ENTRY_t is sructure representing each descriptor on the ring */ |
| 132 | typedef struct _tx_desc_entry_t { |
| 133 | u32 DataBufferPtrHigh; |
| 134 | u32 DataBufferPtrLow; |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 135 | TXDESC_WORD2_t word2; /* control words how to xmit the */ |
| 136 | TXDESC_WORD3_t word3; /* data (detailed above) */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 137 | } TX_DESC_ENTRY_t, *PTX_DESC_ENTRY_t; |
| 138 | |
| 139 | |
| 140 | /* Typedefs for Tx DMA engine status writeback */ |
| 141 | |
| 142 | /* |
| 143 | * TX_STATUS_BLOCK_t is sructure representing the status of the Tx DMA engine |
| 144 | * it sits in free memory, and is pointed to by 0x101c / 0x1020 |
| 145 | */ |
| 146 | typedef union _tx_status_block_t { |
| 147 | u32 value; |
| 148 | struct { |
| 149 | #ifdef _BIT_FIELDS_HTOL |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 150 | u32 unused:21; /* bits 11-31 */ |
| 151 | u32 serv_cpl_wrap:1; /* bit 10 */ |
| 152 | u32 serv_cpl:10; /* bits 0-9 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 153 | #else |
Alan Cox | 64f9303 | 2009-06-10 17:30:41 +0100 | [diff] [blame] | 154 | u32 serv_cpl:10; /* bits 0-9 */ |
| 155 | u32 serv_cpl_wrap:1; /* bit 10 */ |
| 156 | u32 unused:21; /* bits 11-31 */ |
Greg Kroah-Hartman | cfb739b | 2008-04-03 17:30:53 -0700 | [diff] [blame] | 157 | #endif |
| 158 | } bits; |
| 159 | } TX_STATUS_BLOCK_t, *PTX_STATUS_BLOCK_t; |
| 160 | |
| 161 | /* TCB (Transmit Control Block) */ |
| 162 | typedef struct _MP_TCB { |
| 163 | struct _MP_TCB *Next; |
| 164 | u32 Flags; |
| 165 | u32 Count; |
| 166 | u32 PacketStaleCount; |
| 167 | struct sk_buff *Packet; |
| 168 | u32 PacketLength; |
| 169 | DMA10W_t WrIndex; |
| 170 | DMA10W_t WrIndexStart; |
| 171 | } MP_TCB, *PMP_TCB; |
| 172 | |
| 173 | /* Structure to hold the skb's in a list */ |
| 174 | typedef struct tx_skb_list_elem { |
| 175 | struct list_head skb_list_elem; |
| 176 | struct sk_buff *skb; |
| 177 | } TX_SKB_LIST_ELEM, *PTX_SKB_LIST_ELEM; |
| 178 | |
| 179 | /* TX_RING_t is sructure representing our local reference(s) to the ring */ |
| 180 | typedef struct _tx_ring_t { |
| 181 | /* TCB (Transmit Control Block) memory and lists */ |
| 182 | PMP_TCB MpTcbMem; |
| 183 | |
| 184 | /* List of TCBs that are ready to be used */ |
| 185 | PMP_TCB TCBReadyQueueHead; |
| 186 | PMP_TCB TCBReadyQueueTail; |
| 187 | |
| 188 | /* list of TCBs that are currently being sent. NOTE that access to all |
| 189 | * three of these (including nBusySend) are controlled via the |
| 190 | * TCBSendQLock. This lock should be secured prior to incementing / |
| 191 | * decrementing nBusySend, or any queue manipulation on CurrSendHead / |
| 192 | * Tail |
| 193 | */ |
| 194 | PMP_TCB CurrSendHead; |
| 195 | PMP_TCB CurrSendTail; |
| 196 | int32_t nBusySend; |
| 197 | |
| 198 | /* List of packets (not TCBs) that were queued for lack of resources */ |
| 199 | struct list_head SendWaitQueue; |
| 200 | int32_t nWaitSend; |
| 201 | |
| 202 | /* The actual descriptor ring */ |
| 203 | PTX_DESC_ENTRY_t pTxDescRingVa; |
| 204 | dma_addr_t pTxDescRingPa; |
| 205 | uint64_t pTxDescRingAdjustedPa; |
| 206 | uint64_t TxDescOffset; |
| 207 | |
| 208 | /* ReadyToSend indicates where we last wrote to in the descriptor ring. */ |
| 209 | DMA10W_t txDmaReadyToSend; |
| 210 | |
| 211 | /* The location of the write-back status block */ |
| 212 | PTX_STATUS_BLOCK_t pTxStatusVa; |
| 213 | dma_addr_t pTxStatusPa; |
| 214 | |
| 215 | /* A Block of zeroes used to pad packets that are less than 60 bytes */ |
| 216 | void *pTxDummyBlkVa; |
| 217 | dma_addr_t pTxDummyBlkPa; |
| 218 | |
| 219 | TXMAC_ERR_t TxMacErr; |
| 220 | |
| 221 | /* Variables to track the Tx interrupt coalescing features */ |
| 222 | int32_t TxPacketsSinceLastinterrupt; |
| 223 | } TX_RING_t, *PTX_RING_t; |
| 224 | |
| 225 | /* Forward declaration of the frag-list for the following prototypes */ |
| 226 | typedef struct _MP_FRAG_LIST MP_FRAG_LIST, *PMP_FRAG_LIST; |
| 227 | |
| 228 | /* Forward declaration of the private adapter structure */ |
| 229 | struct et131x_adapter; |
| 230 | |
| 231 | /* PROTOTYPES for et1310_tx.c */ |
| 232 | int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter); |
| 233 | void et131x_tx_dma_memory_free(struct et131x_adapter *adapter); |
| 234 | void ConfigTxDmaRegs(struct et131x_adapter *pAdapter); |
| 235 | void et131x_init_send(struct et131x_adapter *adapter); |
| 236 | void et131x_tx_dma_disable(struct et131x_adapter *pAdapter); |
| 237 | void et131x_tx_dma_enable(struct et131x_adapter *pAdapter); |
| 238 | void et131x_handle_send_interrupt(struct et131x_adapter *pAdapter); |
| 239 | void et131x_free_busy_send_packets(struct et131x_adapter *pAdapter); |
| 240 | int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev); |
| 241 | |
| 242 | #endif /* __ET1310_TX_H__ */ |