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Alexander Shiyan161b96c2012-11-07 21:30:29 +04001/*
2 * CLPS711X SPI bus driver
3 *
Alexander Shiyan98984792014-01-10 17:02:05 +04004 * Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
Alexander Shiyan161b96c2012-11-07 21:30:29 +04005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/io.h>
13#include <linux/clk.h>
14#include <linux/init.h>
15#include <linux/gpio.h>
16#include <linux/delay.h>
17#include <linux/module.h>
18#include <linux/interrupt.h>
19#include <linux/platform_device.h>
Alexander Shiyan3dc92592014-03-22 10:57:35 +040020#include <linux/regmap.h>
21#include <linux/mfd/syscon.h>
22#include <linux/mfd/syscon/clps711x.h>
Alexander Shiyan161b96c2012-11-07 21:30:29 +040023#include <linux/spi/spi.h>
24#include <linux/platform_data/spi-clps711x.h>
25
Alexander Shiyan161b96c2012-11-07 21:30:29 +040026#define DRIVER_NAME "spi-clps711x"
27
Alexander Shiyan3dc92592014-03-22 10:57:35 +040028#define SYNCIO_FRMLEN(x) ((x) << 8)
29#define SYNCIO_TXFRMEN (1 << 14)
30
Alexander Shiyan161b96c2012-11-07 21:30:29 +040031struct spi_clps711x_data {
Alexander Shiyan3dc92592014-03-22 10:57:35 +040032 void __iomem *syncio;
33 struct regmap *syscon;
34 struct regmap *syscon1;
Alexander Shiyan161b96c2012-11-07 21:30:29 +040035 struct clk *spi_clk;
36 u32 max_speed_hz;
37
38 u8 *tx_buf;
39 u8 *rx_buf;
Alexander Shiyan8dda9d92014-02-02 10:59:49 +040040 unsigned int bpw;
Alexander Shiyan161b96c2012-11-07 21:30:29 +040041 int len;
Alexander Shiyan161b96c2012-11-07 21:30:29 +040042};
43
44static int spi_clps711x_setup(struct spi_device *spi)
45{
Alexander Shiyan161b96c2012-11-07 21:30:29 +040046 /* We are expect that SPI-device is not selected */
Alexander Shiyan3e9ea4b2014-02-02 10:59:50 +040047 gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
Alexander Shiyan161b96c2012-11-07 21:30:29 +040048
49 return 0;
50}
51
Alexander Shiyan8dda9d92014-02-02 10:59:49 +040052static void spi_clps711x_setup_xfer(struct spi_device *spi,
53 struct spi_transfer *xfer)
Alexander Shiyan161b96c2012-11-07 21:30:29 +040054{
Alexander Shiyan161b96c2012-11-07 21:30:29 +040055 struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
56
Alexander Shiyan161b96c2012-11-07 21:30:29 +040057 /* Setup SPI frequency divider */
Axel Linbed890b2014-03-02 23:24:18 +080058 if (!xfer->speed_hz || (xfer->speed_hz >= hw->max_speed_hz))
Alexander Shiyan3dc92592014-03-22 10:57:35 +040059 regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
60 SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(3));
Axel Linbed890b2014-03-02 23:24:18 +080061 else if (xfer->speed_hz >= (hw->max_speed_hz / 2))
Alexander Shiyan3dc92592014-03-22 10:57:35 +040062 regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
63 SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(2));
Axel Linbed890b2014-03-02 23:24:18 +080064 else if (xfer->speed_hz >= (hw->max_speed_hz / 8))
Alexander Shiyan3dc92592014-03-22 10:57:35 +040065 regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
66 SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(1));
Alexander Shiyan161b96c2012-11-07 21:30:29 +040067 else
Alexander Shiyan3dc92592014-03-22 10:57:35 +040068 regmap_update_bits(hw->syscon1, SYSCON_OFFSET,
69 SYSCON1_ADCKSEL_MASK, SYSCON1_ADCKSEL(0));
Alexander Shiyan161b96c2012-11-07 21:30:29 +040070}
71
Axel Linbf5c2e22014-02-18 17:15:54 +080072static int spi_clps711x_prepare_message(struct spi_master *master,
73 struct spi_message *msg)
Alexander Shiyan161b96c2012-11-07 21:30:29 +040074{
Alexander Shiyan3dc92592014-03-22 10:57:35 +040075 struct spi_clps711x_data *hw = spi_master_get_devdata(master);
Alexander Shiyan8dda9d92014-02-02 10:59:49 +040076 struct spi_device *spi = msg->spi;
Alexander Shiyan161b96c2012-11-07 21:30:29 +040077
Alexander Shiyan3dc92592014-03-22 10:57:35 +040078 /* Setup mode for transfer */
79 return regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCKNSEN,
80 (spi->mode & SPI_CPHA) ?
81 SYSCON3_ADCCKNSEN : 0);
Alexander Shiyan161b96c2012-11-07 21:30:29 +040082}
83
Axel Linbf5c2e22014-02-18 17:15:54 +080084static int spi_clps711x_transfer_one(struct spi_master *master,
85 struct spi_device *spi,
86 struct spi_transfer *xfer)
87{
88 struct spi_clps711x_data *hw = spi_master_get_devdata(master);
89 u8 data;
90
91 spi_clps711x_setup_xfer(spi, xfer);
92
93 hw->len = xfer->len;
Axel Linbed890b2014-03-02 23:24:18 +080094 hw->bpw = xfer->bits_per_word;
Axel Linbf5c2e22014-02-18 17:15:54 +080095 hw->tx_buf = (u8 *)xfer->tx_buf;
96 hw->rx_buf = (u8 *)xfer->rx_buf;
97
98 /* Initiate transfer */
99 data = hw->tx_buf ? *hw->tx_buf++ : 0;
Alexander Shiyan3dc92592014-03-22 10:57:35 +0400100 writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN, hw->syncio);
101
Axel Linbf5c2e22014-02-18 17:15:54 +0800102 return 1;
103}
104
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400105static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
106{
Axel Linbf5c2e22014-02-18 17:15:54 +0800107 struct spi_master *master = dev_id;
108 struct spi_clps711x_data *hw = spi_master_get_devdata(master);
Alexander Shiyanc7a26f12014-02-02 10:59:48 +0400109 u8 data;
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400110
111 /* Handle RX */
Alexander Shiyan3dc92592014-03-22 10:57:35 +0400112 data = readb(hw->syncio);
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400113 if (hw->rx_buf)
Alexander Shiyanc7a26f12014-02-02 10:59:48 +0400114 *hw->rx_buf++ = data;
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400115
116 /* Handle TX */
Alexander Shiyanc7a26f12014-02-02 10:59:48 +0400117 if (--hw->len > 0) {
118 data = hw->tx_buf ? *hw->tx_buf++ : 0;
Alexander Shiyan3dc92592014-03-22 10:57:35 +0400119 writel(data | SYNCIO_FRMLEN(hw->bpw) | SYNCIO_TXFRMEN,
120 hw->syncio);
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400121 } else
Axel Linbf5c2e22014-02-18 17:15:54 +0800122 spi_finalize_current_transfer(master);
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400123
124 return IRQ_HANDLED;
125}
126
Grant Likelyfd4a3192012-12-07 16:57:14 +0000127static int spi_clps711x_probe(struct platform_device *pdev)
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400128{
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400129 struct spi_clps711x_data *hw;
130 struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev);
Alexander Shiyan3dc92592014-03-22 10:57:35 +0400131 struct spi_master *master;
132 struct resource *res;
133 int i, irq, ret;
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400134
135 if (!pdata) {
136 dev_err(&pdev->dev, "No platform data supplied\n");
137 return -EINVAL;
138 }
139
140 if (pdata->num_chipselect < 1) {
141 dev_err(&pdev->dev, "At least one CS must be defined\n");
142 return -EINVAL;
143 }
144
Alexander Shiyan3dc92592014-03-22 10:57:35 +0400145 irq = platform_get_irq(pdev, 0);
146 if (irq < 0)
147 return irq;
148
Alexander Shiyan3e9ea4b2014-02-02 10:59:50 +0400149 master = spi_alloc_master(&pdev->dev, sizeof(*hw));
150 if (!master)
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400151 return -ENOMEM;
Alexander Shiyan3e9ea4b2014-02-02 10:59:50 +0400152
153 master->cs_gpios = devm_kzalloc(&pdev->dev, sizeof(int) *
154 pdata->num_chipselect, GFP_KERNEL);
155 if (!master->cs_gpios) {
156 ret = -ENOMEM;
157 goto err_out;
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400158 }
159
160 master->bus_num = pdev->id;
161 master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
Alexander Shiyan8dda9d92014-02-02 10:59:49 +0400162 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8);
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400163 master->num_chipselect = pdata->num_chipselect;
164 master->setup = spi_clps711x_setup;
Axel Linbf5c2e22014-02-18 17:15:54 +0800165 master->prepare_message = spi_clps711x_prepare_message;
166 master->transfer_one = spi_clps711x_transfer_one;
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400167
168 hw = spi_master_get_devdata(master);
169
170 for (i = 0; i < master->num_chipselect; i++) {
Alexander Shiyan3e9ea4b2014-02-02 10:59:50 +0400171 master->cs_gpios[i] = pdata->chipselect[i];
Axel Linfcba2122014-03-04 12:59:53 +0800172 ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i],
173 DRIVER_NAME);
174 if (ret) {
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400175 dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400176 goto err_out;
177 }
178 }
179
180 hw->spi_clk = devm_clk_get(&pdev->dev, "spi");
181 if (IS_ERR(hw->spi_clk)) {
182 dev_err(&pdev->dev, "Can't get clocks\n");
183 ret = PTR_ERR(hw->spi_clk);
184 goto err_out;
185 }
186 hw->max_speed_hz = clk_get_rate(hw->spi_clk);
187
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400188 platform_set_drvdata(pdev, master);
189
Alexander Shiyan3dc92592014-03-22 10:57:35 +0400190 hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3");
191 if (IS_ERR(hw->syscon)) {
192 ret = PTR_ERR(hw->syscon);
Sachin Kamatc7083792013-09-27 15:32:53 +0530193 goto err_out;
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400194 }
195
Alexander Shiyan3dc92592014-03-22 10:57:35 +0400196 hw->syscon1 = syscon_regmap_lookup_by_pdevname("syscon.1");
197 if (IS_ERR(hw->syscon1)) {
198 ret = PTR_ERR(hw->syscon1);
199 goto err_out;
200 }
201
202 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
203 hw->syncio = devm_ioremap_resource(&pdev->dev, res);
204 if (IS_ERR(hw->syncio)) {
205 ret = PTR_ERR(hw->syncio);
206 goto err_out;
207 }
208
209 /* Disable extended mode due hardware problems */
210 regmap_update_bits(hw->syscon, SYSCON_OFFSET, SYSCON3_ADCCON, 0);
211
212 /* Clear possible pending interrupt */
213 readl(hw->syncio);
214
215 ret = devm_request_irq(&pdev->dev, irq, spi_clps711x_isr, 0,
216 dev_name(&pdev->dev), master);
217 if (ret)
218 goto err_out;
219
Jingoo Hanc493fc42013-09-24 13:27:48 +0900220 ret = devm_spi_register_master(&pdev->dev, master);
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400221 if (!ret) {
222 dev_info(&pdev->dev,
223 "SPI bus driver initialized. Master clock %u Hz\n",
224 hw->max_speed_hz);
225 return 0;
226 }
227
228 dev_err(&pdev->dev, "Failed to register master\n");
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400229
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400230err_out:
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400231 spi_master_put(master);
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400232
233 return ret;
234}
235
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400236static struct platform_driver clps711x_spi_driver = {
237 .driver = {
238 .name = DRIVER_NAME,
239 .owner = THIS_MODULE,
240 },
241 .probe = spi_clps711x_probe,
Alexander Shiyan161b96c2012-11-07 21:30:29 +0400242};
243module_platform_driver(clps711x_spi_driver);
244
245MODULE_LICENSE("GPL");
246MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
247MODULE_DESCRIPTION("CLPS711X SPI bus driver");
Axel Lin350a9b32014-01-14 17:01:54 +0800248MODULE_ALIAS("platform:" DRIVER_NAME);