Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. |
| 3 | * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. |
| 4 | * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved. |
Jack Morgenstein | 51a379d | 2008-07-25 10:32:52 -0700 | [diff] [blame] | 5 | * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved. |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 6 | * Copyright (c) 2004 Voltaire, Inc. All rights reserved. |
| 7 | * |
| 8 | * This software is available to you under a choice of one of two |
| 9 | * licenses. You may choose to be licensed under the terms of the GNU |
| 10 | * General Public License (GPL) Version 2, available from the file |
| 11 | * COPYING in the main directory of this source tree, or the |
| 12 | * OpenIB.org BSD license below: |
| 13 | * |
| 14 | * Redistribution and use in source and binary forms, with or |
| 15 | * without modification, are permitted provided that the following |
| 16 | * conditions are met: |
| 17 | * |
| 18 | * - Redistributions of source code must retain the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer. |
| 21 | * |
| 22 | * - Redistributions in binary form must reproduce the above |
| 23 | * copyright notice, this list of conditions and the following |
| 24 | * disclaimer in the documentation and/or other materials |
| 25 | * provided with the distribution. |
| 26 | * |
| 27 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 28 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 29 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 30 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 31 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 32 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 33 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 34 | * SOFTWARE. |
| 35 | */ |
| 36 | |
| 37 | #ifndef MLX4_H |
| 38 | #define MLX4_H |
| 39 | |
Michael S. Tsirkin | 525f5f4 | 2007-07-09 20:12:20 -0700 | [diff] [blame] | 40 | #include <linux/mutex.h> |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 41 | #include <linux/radix-tree.h> |
Hadar Hen Zion | 4af1c04 | 2012-07-05 04:03:41 +0000 | [diff] [blame] | 42 | #include <linux/rbtree.h> |
Jack Morgenstein | ee49bd9 | 2007-07-12 17:50:45 +0300 | [diff] [blame] | 43 | #include <linux/timer.h> |
Thomas Gleixner | 3142788 | 2010-01-29 20:39:02 +0000 | [diff] [blame] | 44 | #include <linux/semaphore.h> |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 45 | #include <linux/workqueue.h> |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 46 | |
| 47 | #include <linux/mlx4/device.h> |
Roland Dreier | 37608ee | 2008-04-16 21:01:08 -0700 | [diff] [blame] | 48 | #include <linux/mlx4/driver.h> |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 49 | #include <linux/mlx4/doorbell.h> |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 50 | #include <linux/mlx4/cmd.h> |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 51 | |
| 52 | #define DRV_NAME "mlx4_core" |
Jack Morgenstein | ab9c17a | 2011-12-13 04:18:30 +0000 | [diff] [blame] | 53 | #define PFX DRV_NAME ": " |
Yevgeny Petrilin | 7d4b6bc | 2011-12-13 04:18:45 +0000 | [diff] [blame] | 54 | #define DRV_VERSION "1.1" |
| 55 | #define DRV_RELDATE "Dec, 2011" |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 56 | |
Hadar Hen Zion | 0ff1fb6 | 2012-07-05 04:03:46 +0000 | [diff] [blame] | 57 | #define MLX4_FS_UDP_UC_EN (1 << 1) |
| 58 | #define MLX4_FS_TCP_UC_EN (1 << 2) |
| 59 | #define MLX4_FS_NUM_OF_L2_ADDR 8 |
| 60 | #define MLX4_FS_MGM_LOG_ENTRY_SIZE 7 |
| 61 | #define MLX4_FS_NUM_MCG (1 << 17) |
| 62 | |
| 63 | enum { |
| 64 | MLX4_FS_L2_HASH = 0, |
| 65 | MLX4_FS_L2_L3_L4_HASH, |
| 66 | }; |
| 67 | |
Amir Vadai | e5395e9 | 2012-04-04 21:33:25 +0000 | [diff] [blame] | 68 | #define MLX4_NUM_UP 8 |
| 69 | #define MLX4_NUM_TC 8 |
| 70 | #define MLX4_RATELIMIT_UNITS 3 /* 100 Mbps */ |
| 71 | #define MLX4_RATELIMIT_DEFAULT 0xffff |
| 72 | |
| 73 | struct mlx4_set_port_prio2tc_context { |
| 74 | u8 prio2tc[4]; |
| 75 | }; |
| 76 | |
| 77 | struct mlx4_port_scheduler_tc_cfg_be { |
| 78 | __be16 pg; |
| 79 | __be16 bw_precentage; |
| 80 | __be16 max_bw_units; /* 3-100Mbps, 4-1Gbps, other values - reserved */ |
| 81 | __be16 max_bw_value; |
| 82 | }; |
| 83 | |
| 84 | struct mlx4_set_port_scheduler_context { |
| 85 | struct mlx4_port_scheduler_tc_cfg_be tc[MLX4_NUM_TC]; |
| 86 | }; |
| 87 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 88 | enum { |
| 89 | MLX4_HCR_BASE = 0x80680, |
| 90 | MLX4_HCR_SIZE = 0x0001c, |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 91 | MLX4_CLR_INT_SIZE = 0x00008, |
| 92 | MLX4_SLAVE_COMM_BASE = 0x0, |
| 93 | MLX4_COMM_PAGESIZE = 0x1000 |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 94 | }; |
| 95 | |
| 96 | enum { |
Eugenia Emantayev | 0ec2c0f | 2011-12-13 04:16:02 +0000 | [diff] [blame] | 97 | MLX4_MAX_MGM_ENTRY_SIZE = 0x1000, |
| 98 | MLX4_MAX_QP_PER_MGM = 4 * (MLX4_MAX_MGM_ENTRY_SIZE / 16 - 2), |
| 99 | MLX4_MTT_ENTRY_PER_SEG = 8, |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 100 | }; |
| 101 | |
| 102 | enum { |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 103 | MLX4_NUM_PDS = 1 << 15 |
| 104 | }; |
| 105 | |
| 106 | enum { |
| 107 | MLX4_CMPT_TYPE_QP = 0, |
| 108 | MLX4_CMPT_TYPE_SRQ = 1, |
| 109 | MLX4_CMPT_TYPE_CQ = 2, |
| 110 | MLX4_CMPT_TYPE_EQ = 3, |
| 111 | MLX4_CMPT_NUM_TYPE |
| 112 | }; |
| 113 | |
| 114 | enum { |
| 115 | MLX4_CMPT_SHIFT = 24, |
| 116 | MLX4_NUM_CMPTS = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT |
| 117 | }; |
| 118 | |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 119 | enum mlx4_mr_state { |
| 120 | MLX4_MR_DISABLED = 0, |
| 121 | MLX4_MR_EN_HW, |
| 122 | MLX4_MR_EN_SW |
| 123 | }; |
| 124 | |
| 125 | #define MLX4_COMM_TIME 10000 |
| 126 | enum { |
| 127 | MLX4_COMM_CMD_RESET, |
| 128 | MLX4_COMM_CMD_VHCR0, |
| 129 | MLX4_COMM_CMD_VHCR1, |
| 130 | MLX4_COMM_CMD_VHCR2, |
| 131 | MLX4_COMM_CMD_VHCR_EN, |
| 132 | MLX4_COMM_CMD_VHCR_POST, |
| 133 | MLX4_COMM_CMD_FLR = 254 |
| 134 | }; |
| 135 | |
| 136 | /*The flag indicates that the slave should delay the RESET cmd*/ |
| 137 | #define MLX4_DELAY_RESET_SLAVE 0xbbbbbbb |
| 138 | /*indicates how many retries will be done if we are in the middle of FLR*/ |
| 139 | #define NUM_OF_RESET_RETRIES 10 |
| 140 | #define SLEEP_TIME_IN_RESET (2 * 1000) |
| 141 | enum mlx4_resource { |
| 142 | RES_QP, |
| 143 | RES_CQ, |
| 144 | RES_SRQ, |
| 145 | RES_XRCD, |
| 146 | RES_MPT, |
| 147 | RES_MTT, |
| 148 | RES_MAC, |
| 149 | RES_VLAN, |
| 150 | RES_EQ, |
| 151 | RES_COUNTER, |
Hadar Hen Zion | 1b9c6b0 | 2012-07-05 04:03:47 +0000 | [diff] [blame] | 152 | RES_FS_RULE, |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 153 | MLX4_NUM_OF_RESOURCE_TYPE |
| 154 | }; |
| 155 | |
| 156 | enum mlx4_alloc_mode { |
| 157 | RES_OP_RESERVE, |
| 158 | RES_OP_RESERVE_AND_MAP, |
| 159 | RES_OP_MAP_ICM, |
| 160 | }; |
| 161 | |
Jack Morgenstein | b892495 | 2012-05-15 10:35:02 +0000 | [diff] [blame] | 162 | enum mlx4_res_tracker_free_type { |
| 163 | RES_TR_FREE_ALL, |
| 164 | RES_TR_FREE_SLAVES_ONLY, |
| 165 | RES_TR_FREE_STRUCTS_ONLY, |
| 166 | }; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 167 | |
| 168 | /* |
| 169 | *Virtual HCR structures. |
| 170 | * mlx4_vhcr is the sw representation, in machine endianess |
| 171 | * |
| 172 | * mlx4_vhcr_cmd is the formalized structure, the one that is passed |
| 173 | * to FW to go through communication channel. |
| 174 | * It is big endian, and has the same structure as the physical HCR |
| 175 | * used by command interface |
| 176 | */ |
| 177 | struct mlx4_vhcr { |
| 178 | u64 in_param; |
| 179 | u64 out_param; |
| 180 | u32 in_modifier; |
| 181 | u32 errno; |
| 182 | u16 op; |
| 183 | u16 token; |
| 184 | u8 op_modifier; |
| 185 | u8 e_bit; |
| 186 | }; |
| 187 | |
| 188 | struct mlx4_vhcr_cmd { |
| 189 | __be64 in_param; |
| 190 | __be32 in_modifier; |
| 191 | __be64 out_param; |
| 192 | __be16 token; |
| 193 | u16 reserved; |
| 194 | u8 status; |
| 195 | u8 flags; |
| 196 | __be16 opcode; |
| 197 | }; |
| 198 | |
| 199 | struct mlx4_cmd_info { |
| 200 | u16 opcode; |
| 201 | bool has_inbox; |
| 202 | bool has_outbox; |
| 203 | bool out_is_imm; |
| 204 | bool encode_slave_id; |
| 205 | int (*verify)(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, |
| 206 | struct mlx4_cmd_mailbox *inbox); |
| 207 | int (*wrapper)(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, |
| 208 | struct mlx4_cmd_mailbox *inbox, |
| 209 | struct mlx4_cmd_mailbox *outbox, |
| 210 | struct mlx4_cmd_info *cmd); |
| 211 | }; |
| 212 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 213 | #ifdef CONFIG_MLX4_DEBUG |
| 214 | extern int mlx4_debug_level; |
Roland Dreier | 7b0f5df | 2008-11-04 11:18:56 -0800 | [diff] [blame] | 215 | #else /* CONFIG_MLX4_DEBUG */ |
| 216 | #define mlx4_debug_level (0) |
| 217 | #endif /* CONFIG_MLX4_DEBUG */ |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 218 | |
| 219 | #define mlx4_dbg(mdev, format, arg...) \ |
Joe Perches | 0a645e8 | 2010-07-10 07:22:46 +0000 | [diff] [blame] | 220 | do { \ |
| 221 | if (mlx4_debug_level) \ |
| 222 | dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ##arg); \ |
| 223 | } while (0) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 224 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 225 | #define mlx4_err(mdev, format, arg...) \ |
Joe Perches | 0a645e8 | 2010-07-10 07:22:46 +0000 | [diff] [blame] | 226 | dev_err(&mdev->pdev->dev, format, ##arg) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 227 | #define mlx4_info(mdev, format, arg...) \ |
Joe Perches | 0a645e8 | 2010-07-10 07:22:46 +0000 | [diff] [blame] | 228 | dev_info(&mdev->pdev->dev, format, ##arg) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 229 | #define mlx4_warn(mdev, format, arg...) \ |
Joe Perches | 0a645e8 | 2010-07-10 07:22:46 +0000 | [diff] [blame] | 230 | dev_warn(&mdev->pdev->dev, format, ##arg) |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 231 | |
Eugenia Emantayev | 0ec2c0f | 2011-12-13 04:16:02 +0000 | [diff] [blame] | 232 | extern int mlx4_log_num_mgm_entry_size; |
Marcel Apfelbaum | 2b8fb28 | 2011-12-13 04:16:56 +0000 | [diff] [blame] | 233 | extern int log_mtts_per_seg; |
Eugenia Emantayev | 0ec2c0f | 2011-12-13 04:16:02 +0000 | [diff] [blame] | 234 | |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 235 | #define MLX4_MAX_NUM_SLAVES (MLX4_MAX_NUM_PF + MLX4_MAX_NUM_VF) |
| 236 | #define ALL_SLAVES 0xff |
| 237 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 238 | struct mlx4_bitmap { |
| 239 | u32 last; |
| 240 | u32 top; |
| 241 | u32 max; |
Yevgeny Petrilin | 93fc9e1 | 2008-10-22 10:25:29 -0700 | [diff] [blame] | 242 | u32 reserved_top; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 243 | u32 mask; |
Eli Cohen | 42d1e01 | 2011-03-22 22:38:45 +0000 | [diff] [blame] | 244 | u32 avail; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 245 | spinlock_t lock; |
| 246 | unsigned long *table; |
| 247 | }; |
| 248 | |
| 249 | struct mlx4_buddy { |
| 250 | unsigned long **bits; |
Roland Dreier | e4044cf | 2008-07-22 14:19:40 -0700 | [diff] [blame] | 251 | unsigned int *num_free; |
Yishai Hadas | 3de819e | 2012-08-13 08:15:07 +0000 | [diff] [blame^] | 252 | u32 max_order; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 253 | spinlock_t lock; |
| 254 | }; |
| 255 | |
| 256 | struct mlx4_icm; |
| 257 | |
| 258 | struct mlx4_icm_table { |
| 259 | u64 virt; |
| 260 | int num_icm; |
Yishai Hadas | 3de819e | 2012-08-13 08:15:07 +0000 | [diff] [blame^] | 261 | u32 num_obj; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 262 | int obj_size; |
| 263 | int lowmem; |
Jack Morgenstein | 5b0bf5e | 2007-08-01 12:28:20 +0300 | [diff] [blame] | 264 | int coherent; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 265 | struct mutex mutex; |
| 266 | struct mlx4_icm **icm; |
| 267 | }; |
| 268 | |
Eli Cohen | c82e9aa | 2011-12-13 04:15:24 +0000 | [diff] [blame] | 269 | /* |
| 270 | * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits. |
| 271 | */ |
| 272 | struct mlx4_mpt_entry { |
| 273 | __be32 flags; |
| 274 | __be32 qpn; |
| 275 | __be32 key; |
| 276 | __be32 pd_flags; |
| 277 | __be64 start; |
| 278 | __be64 length; |
| 279 | __be32 lkey; |
| 280 | __be32 win_cnt; |
| 281 | u8 reserved1[3]; |
| 282 | u8 mtt_rep; |
Marcel Apfelbaum | 2b8fb28 | 2011-12-13 04:16:56 +0000 | [diff] [blame] | 283 | __be64 mtt_addr; |
Eli Cohen | c82e9aa | 2011-12-13 04:15:24 +0000 | [diff] [blame] | 284 | __be32 mtt_sz; |
| 285 | __be32 entity_size; |
| 286 | __be32 first_byte_offset; |
| 287 | } __packed; |
| 288 | |
| 289 | /* |
| 290 | * Must be packed because start is 64 bits but only aligned to 32 bits. |
| 291 | */ |
| 292 | struct mlx4_eq_context { |
| 293 | __be32 flags; |
| 294 | u16 reserved1[3]; |
| 295 | __be16 page_offset; |
| 296 | u8 log_eq_size; |
| 297 | u8 reserved2[4]; |
| 298 | u8 eq_period; |
| 299 | u8 reserved3; |
| 300 | u8 eq_max_count; |
| 301 | u8 reserved4[3]; |
| 302 | u8 intr; |
| 303 | u8 log_page_size; |
| 304 | u8 reserved5[2]; |
| 305 | u8 mtt_base_addr_h; |
| 306 | __be32 mtt_base_addr_l; |
| 307 | u32 reserved6[2]; |
| 308 | __be32 consumer_index; |
| 309 | __be32 producer_index; |
| 310 | u32 reserved7[4]; |
| 311 | }; |
| 312 | |
| 313 | struct mlx4_cq_context { |
| 314 | __be32 flags; |
| 315 | u16 reserved1[3]; |
| 316 | __be16 page_offset; |
| 317 | __be32 logsize_usrpage; |
| 318 | __be16 cq_period; |
| 319 | __be16 cq_max_count; |
| 320 | u8 reserved2[3]; |
| 321 | u8 comp_eqn; |
| 322 | u8 log_page_size; |
| 323 | u8 reserved3[2]; |
| 324 | u8 mtt_base_addr_h; |
| 325 | __be32 mtt_base_addr_l; |
| 326 | __be32 last_notified_index; |
| 327 | __be32 solicit_producer_index; |
| 328 | __be32 consumer_index; |
| 329 | __be32 producer_index; |
| 330 | u32 reserved4[2]; |
| 331 | __be64 db_rec_addr; |
| 332 | }; |
| 333 | |
| 334 | struct mlx4_srq_context { |
| 335 | __be32 state_logsize_srqn; |
| 336 | u8 logstride; |
| 337 | u8 reserved1; |
| 338 | __be16 xrcd; |
| 339 | __be32 pg_offset_cqn; |
| 340 | u32 reserved2; |
| 341 | u8 log_page_size; |
| 342 | u8 reserved3[2]; |
| 343 | u8 mtt_base_addr_h; |
| 344 | __be32 mtt_base_addr_l; |
| 345 | __be32 pd; |
| 346 | __be16 limit_watermark; |
| 347 | __be16 wqe_cnt; |
| 348 | u16 reserved4; |
| 349 | __be16 wqe_counter; |
| 350 | u32 reserved5; |
| 351 | __be64 db_rec_addr; |
| 352 | }; |
| 353 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 354 | struct mlx4_eq { |
| 355 | struct mlx4_dev *dev; |
| 356 | void __iomem *doorbell; |
| 357 | int eqn; |
| 358 | u32 cons_index; |
| 359 | u16 irq; |
| 360 | u16 have_irq; |
| 361 | int nent; |
| 362 | struct mlx4_buf_list *page_list; |
| 363 | struct mlx4_mtt mtt; |
| 364 | }; |
| 365 | |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 366 | struct mlx4_slave_eqe { |
| 367 | u8 type; |
| 368 | u8 port; |
| 369 | u32 param; |
| 370 | }; |
| 371 | |
| 372 | struct mlx4_slave_event_eq_info { |
Marcel Apfelbaum | 803143f | 2012-01-19 09:45:46 +0000 | [diff] [blame] | 373 | int eqn; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 374 | u16 token; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 375 | }; |
| 376 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 377 | struct mlx4_profile { |
| 378 | int num_qp; |
| 379 | int rdmarc_per_qp; |
| 380 | int num_srq; |
| 381 | int num_cq; |
| 382 | int num_mcg; |
| 383 | int num_mpt; |
Roland Dreier | db5a7a6 | 2012-03-05 10:05:28 -0800 | [diff] [blame] | 384 | unsigned num_mtt; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 385 | }; |
| 386 | |
| 387 | struct mlx4_fw { |
| 388 | u64 clr_int_base; |
| 389 | u64 catas_offset; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 390 | u64 comm_base; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 391 | struct mlx4_icm *fw_icm; |
| 392 | struct mlx4_icm *aux_icm; |
| 393 | u32 catas_size; |
| 394 | u16 fw_pages; |
| 395 | u8 clr_int_bar; |
| 396 | u8 catas_bar; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 397 | u8 comm_bar; |
| 398 | }; |
| 399 | |
| 400 | struct mlx4_comm { |
| 401 | u32 slave_write; |
| 402 | u32 slave_read; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 403 | }; |
| 404 | |
Eugenia Emantayev | ffe455a | 2011-12-13 04:16:21 +0000 | [diff] [blame] | 405 | enum { |
| 406 | MLX4_MCAST_CONFIG = 0, |
| 407 | MLX4_MCAST_DISABLE = 1, |
| 408 | MLX4_MCAST_ENABLE = 2, |
| 409 | }; |
| 410 | |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 411 | #define VLAN_FLTR_SIZE 128 |
| 412 | |
| 413 | struct mlx4_vlan_fltr { |
| 414 | __be32 entry[VLAN_FLTR_SIZE]; |
| 415 | }; |
| 416 | |
Eugenia Emantayev | ffe455a | 2011-12-13 04:16:21 +0000 | [diff] [blame] | 417 | struct mlx4_mcast_entry { |
| 418 | struct list_head list; |
| 419 | u64 addr; |
| 420 | }; |
| 421 | |
Yevgeny Petrilin | b12d93d | 2011-03-22 22:38:24 +0000 | [diff] [blame] | 422 | struct mlx4_promisc_qp { |
| 423 | struct list_head list; |
| 424 | u32 qpn; |
| 425 | }; |
| 426 | |
| 427 | struct mlx4_steer_index { |
| 428 | struct list_head list; |
| 429 | unsigned int index; |
| 430 | struct list_head duplicates; |
| 431 | }; |
| 432 | |
Marcel Apfelbaum | 803143f | 2012-01-19 09:45:46 +0000 | [diff] [blame] | 433 | #define MLX4_EVENT_TYPES_NUM 64 |
| 434 | |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 435 | struct mlx4_slave_state { |
| 436 | u8 comm_toggle; |
| 437 | u8 last_cmd; |
| 438 | u8 init_port_mask; |
| 439 | bool active; |
| 440 | u8 function; |
| 441 | dma_addr_t vhcr_dma; |
| 442 | u16 mtu[MLX4_MAX_PORTS + 1]; |
| 443 | __be32 ib_cap_mask[MLX4_MAX_PORTS + 1]; |
| 444 | struct mlx4_slave_eqe eq[MLX4_MFUNC_MAX_EQES]; |
| 445 | struct list_head mcast_filters[MLX4_MAX_PORTS + 1]; |
| 446 | struct mlx4_vlan_fltr *vlan_filter[MLX4_MAX_PORTS + 1]; |
Marcel Apfelbaum | 803143f | 2012-01-19 09:45:46 +0000 | [diff] [blame] | 447 | /* event type to eq number lookup */ |
| 448 | struct mlx4_slave_event_eq_info event_eq[MLX4_EVENT_TYPES_NUM]; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 449 | u16 eq_pi; |
| 450 | u16 eq_ci; |
| 451 | spinlock_t lock; |
| 452 | /*initialized via the kzalloc*/ |
| 453 | u8 is_slave_going_down; |
| 454 | u32 cookie; |
| 455 | }; |
| 456 | |
| 457 | struct slave_list { |
| 458 | struct mutex mutex; |
| 459 | struct list_head res_list[MLX4_NUM_OF_RESOURCE_TYPE]; |
| 460 | }; |
| 461 | |
| 462 | struct mlx4_resource_tracker { |
| 463 | spinlock_t lock; |
| 464 | /* tree for each resources */ |
Hadar Hen Zion | 4af1c04 | 2012-07-05 04:03:41 +0000 | [diff] [blame] | 465 | struct rb_root res_tree[MLX4_NUM_OF_RESOURCE_TYPE]; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 466 | /* num_of_slave's lists, one per slave */ |
| 467 | struct slave_list *slave_list; |
| 468 | }; |
| 469 | |
| 470 | #define SLAVE_EVENT_EQ_SIZE 128 |
| 471 | struct mlx4_slave_event_eq { |
| 472 | u32 eqn; |
| 473 | u32 cons; |
| 474 | u32 prod; |
| 475 | struct mlx4_eqe event_eqe[SLAVE_EVENT_EQ_SIZE]; |
| 476 | }; |
| 477 | |
| 478 | struct mlx4_master_qp0_state { |
| 479 | int proxy_qp0_active; |
| 480 | int qp0_active; |
| 481 | int port_active; |
| 482 | }; |
| 483 | |
| 484 | struct mlx4_mfunc_master_ctx { |
| 485 | struct mlx4_slave_state *slave_state; |
| 486 | struct mlx4_master_qp0_state qp0_state[MLX4_MAX_PORTS + 1]; |
| 487 | int init_port_ref[MLX4_MAX_PORTS + 1]; |
| 488 | u16 max_mtu[MLX4_MAX_PORTS + 1]; |
| 489 | int disable_mcast_ref[MLX4_MAX_PORTS + 1]; |
| 490 | struct mlx4_resource_tracker res_tracker; |
| 491 | struct workqueue_struct *comm_wq; |
| 492 | struct work_struct comm_work; |
| 493 | struct work_struct slave_event_work; |
| 494 | struct work_struct slave_flr_event_work; |
| 495 | spinlock_t slave_state_lock; |
Jack Morgenstein | f5311ac | 2011-12-13 04:12:13 +0000 | [diff] [blame] | 496 | __be32 comm_arm_bit_vector[4]; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 497 | struct mlx4_eqe cmd_eqe; |
| 498 | struct mlx4_slave_event_eq slave_eq; |
| 499 | struct mutex gen_eqe_mutex[MLX4_MFUNC_MAX]; |
| 500 | }; |
| 501 | |
| 502 | struct mlx4_mfunc { |
| 503 | struct mlx4_comm __iomem *comm; |
| 504 | struct mlx4_vhcr_cmd *vhcr; |
| 505 | dma_addr_t vhcr_dma; |
| 506 | |
| 507 | struct mlx4_mfunc_master_ctx master; |
| 508 | }; |
| 509 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 510 | struct mlx4_cmd { |
| 511 | struct pci_pool *pool; |
| 512 | void __iomem *hcr; |
| 513 | struct mutex hcr_mutex; |
| 514 | struct semaphore poll_sem; |
| 515 | struct semaphore event_sem; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 516 | struct semaphore slave_sem; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 517 | int max_cmds; |
| 518 | spinlock_t context_lock; |
| 519 | int free_head; |
| 520 | struct mlx4_cmd_context *context; |
| 521 | u16 token_mask; |
| 522 | u8 use_events; |
| 523 | u8 toggle; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 524 | u8 comm_toggle; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 525 | }; |
| 526 | |
| 527 | struct mlx4_uar_table { |
| 528 | struct mlx4_bitmap bitmap; |
| 529 | }; |
| 530 | |
| 531 | struct mlx4_mr_table { |
| 532 | struct mlx4_bitmap mpt_bitmap; |
| 533 | struct mlx4_buddy mtt_buddy; |
| 534 | u64 mtt_base; |
| 535 | u64 mpt_base; |
| 536 | struct mlx4_icm_table mtt_table; |
| 537 | struct mlx4_icm_table dmpt_table; |
| 538 | }; |
| 539 | |
| 540 | struct mlx4_cq_table { |
| 541 | struct mlx4_bitmap bitmap; |
| 542 | spinlock_t lock; |
| 543 | struct radix_tree_root tree; |
| 544 | struct mlx4_icm_table table; |
| 545 | struct mlx4_icm_table cmpt_table; |
| 546 | }; |
| 547 | |
| 548 | struct mlx4_eq_table { |
| 549 | struct mlx4_bitmap bitmap; |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 550 | char *irq_names; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 551 | void __iomem *clr_int; |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 552 | void __iomem **uar_map; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 553 | u32 clr_mask; |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 554 | struct mlx4_eq *eq; |
Roland Dreier | fa0681d | 2009-09-05 20:24:49 -0700 | [diff] [blame] | 555 | struct mlx4_icm_table table; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 556 | struct mlx4_icm_table cmpt_table; |
| 557 | int have_irq; |
| 558 | u8 inta_pin; |
| 559 | }; |
| 560 | |
| 561 | struct mlx4_srq_table { |
| 562 | struct mlx4_bitmap bitmap; |
| 563 | spinlock_t lock; |
| 564 | struct radix_tree_root tree; |
| 565 | struct mlx4_icm_table table; |
| 566 | struct mlx4_icm_table cmpt_table; |
| 567 | }; |
| 568 | |
| 569 | struct mlx4_qp_table { |
| 570 | struct mlx4_bitmap bitmap; |
| 571 | u32 rdmarc_base; |
| 572 | int rdmarc_shift; |
| 573 | spinlock_t lock; |
| 574 | struct mlx4_icm_table qp_table; |
| 575 | struct mlx4_icm_table auxc_table; |
| 576 | struct mlx4_icm_table altc_table; |
| 577 | struct mlx4_icm_table rdmarc_table; |
| 578 | struct mlx4_icm_table cmpt_table; |
| 579 | }; |
| 580 | |
| 581 | struct mlx4_mcg_table { |
| 582 | struct mutex mutex; |
| 583 | struct mlx4_bitmap bitmap; |
| 584 | struct mlx4_icm_table table; |
| 585 | }; |
| 586 | |
| 587 | struct mlx4_catas_err { |
| 588 | u32 __iomem *map; |
Jack Morgenstein | ee49bd9 | 2007-07-12 17:50:45 +0300 | [diff] [blame] | 589 | struct timer_list timer; |
| 590 | struct list_head list; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 591 | }; |
| 592 | |
Yevgeny Petrilin | 2a2336f | 2008-10-22 11:44:46 -0700 | [diff] [blame] | 593 | #define MLX4_MAX_MAC_NUM 128 |
| 594 | #define MLX4_MAC_TABLE_SIZE (MLX4_MAX_MAC_NUM << 3) |
| 595 | |
| 596 | struct mlx4_mac_table { |
| 597 | __be64 entries[MLX4_MAX_MAC_NUM]; |
| 598 | int refs[MLX4_MAX_MAC_NUM]; |
| 599 | struct mutex mutex; |
| 600 | int total; |
| 601 | int max; |
| 602 | }; |
| 603 | |
| 604 | #define MLX4_MAX_VLAN_NUM 128 |
| 605 | #define MLX4_VLAN_TABLE_SIZE (MLX4_MAX_VLAN_NUM << 2) |
| 606 | |
| 607 | struct mlx4_vlan_table { |
| 608 | __be32 entries[MLX4_MAX_VLAN_NUM]; |
| 609 | int refs[MLX4_MAX_VLAN_NUM]; |
| 610 | struct mutex mutex; |
| 611 | int total; |
| 612 | int max; |
| 613 | }; |
| 614 | |
Eugenia Emantayev | ffe455a | 2011-12-13 04:16:21 +0000 | [diff] [blame] | 615 | #define SET_PORT_GEN_ALL_VALID 0x7 |
| 616 | #define SET_PORT_PROMISC_SHIFT 31 |
| 617 | #define SET_PORT_MC_PROMISC_SHIFT 30 |
| 618 | |
| 619 | enum { |
| 620 | MCAST_DIRECT_ONLY = 0, |
| 621 | MCAST_DIRECT = 1, |
| 622 | MCAST_DEFAULT = 2 |
| 623 | }; |
| 624 | |
| 625 | |
| 626 | struct mlx4_set_port_general_context { |
| 627 | u8 reserved[3]; |
| 628 | u8 flags; |
| 629 | u16 reserved2; |
| 630 | __be16 mtu; |
| 631 | u8 pptx; |
| 632 | u8 pfctx; |
| 633 | u16 reserved3; |
| 634 | u8 pprx; |
| 635 | u8 pfcrx; |
| 636 | u16 reserved4; |
| 637 | }; |
| 638 | |
| 639 | struct mlx4_set_port_rqp_calc_context { |
| 640 | __be32 base_qpn; |
| 641 | u8 rererved; |
| 642 | u8 n_mac; |
| 643 | u8 n_vlan; |
| 644 | u8 n_prio; |
| 645 | u8 reserved2[3]; |
| 646 | u8 mac_miss; |
| 647 | u8 intra_no_vlan; |
| 648 | u8 no_vlan; |
| 649 | u8 intra_vlan_miss; |
| 650 | u8 vlan_miss; |
| 651 | u8 reserved3[3]; |
| 652 | u8 no_vlan_prio; |
| 653 | __be32 promisc; |
| 654 | __be32 mcast; |
| 655 | }; |
| 656 | |
Yevgeny Petrilin | 1679200 | 2011-03-22 22:38:31 +0000 | [diff] [blame] | 657 | struct mlx4_mac_entry { |
| 658 | u64 mac; |
Hadar Hen Zion | 0ff1fb6 | 2012-07-05 04:03:46 +0000 | [diff] [blame] | 659 | u64 reg_id; |
Yevgeny Petrilin | 1679200 | 2011-03-22 22:38:31 +0000 | [diff] [blame] | 660 | }; |
| 661 | |
Yevgeny Petrilin | 2a2336f | 2008-10-22 11:44:46 -0700 | [diff] [blame] | 662 | struct mlx4_port_info { |
| 663 | struct mlx4_dev *dev; |
| 664 | int port; |
Yevgeny Petrilin | 7ff93f8 | 2008-10-22 15:38:42 -0700 | [diff] [blame] | 665 | char dev_name[16]; |
| 666 | struct device_attribute port_attr; |
| 667 | enum mlx4_port_type tmp_type; |
Or Gerlitz | 096335b | 2012-01-11 19:02:17 +0200 | [diff] [blame] | 668 | char dev_mtu_name[16]; |
| 669 | struct device_attribute port_mtu_attr; |
Yevgeny Petrilin | 2a2336f | 2008-10-22 11:44:46 -0700 | [diff] [blame] | 670 | struct mlx4_mac_table mac_table; |
Yevgeny Petrilin | 1679200 | 2011-03-22 22:38:31 +0000 | [diff] [blame] | 671 | struct radix_tree_root mac_tree; |
Yevgeny Petrilin | 2a2336f | 2008-10-22 11:44:46 -0700 | [diff] [blame] | 672 | struct mlx4_vlan_table vlan_table; |
Yevgeny Petrilin | 1679200 | 2011-03-22 22:38:31 +0000 | [diff] [blame] | 673 | int base_qpn; |
Yevgeny Petrilin | 2a2336f | 2008-10-22 11:44:46 -0700 | [diff] [blame] | 674 | }; |
| 675 | |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 676 | struct mlx4_sense { |
| 677 | struct mlx4_dev *dev; |
| 678 | u8 do_sense_port[MLX4_MAX_PORTS + 1]; |
| 679 | u8 sense_allowed[MLX4_MAX_PORTS + 1]; |
| 680 | struct delayed_work sense_poll; |
| 681 | }; |
| 682 | |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 683 | struct mlx4_msix_ctl { |
| 684 | u64 pool_bm; |
Yevgeny Petrilin | 730c41d | 2012-02-21 03:39:32 +0000 | [diff] [blame] | 685 | struct mutex pool_lock; |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 686 | }; |
| 687 | |
Yevgeny Petrilin | b12d93d | 2011-03-22 22:38:24 +0000 | [diff] [blame] | 688 | struct mlx4_steer { |
| 689 | struct list_head promisc_qps[MLX4_NUM_STEERS]; |
| 690 | struct list_head steer_entries[MLX4_NUM_STEERS]; |
Yevgeny Petrilin | b12d93d | 2011-03-22 22:38:24 +0000 | [diff] [blame] | 691 | }; |
| 692 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 693 | struct mlx4_priv { |
| 694 | struct mlx4_dev dev; |
| 695 | |
| 696 | struct list_head dev_list; |
| 697 | struct list_head ctx_list; |
| 698 | spinlock_t ctx_lock; |
| 699 | |
Yevgeny Petrilin | 6296883 | 2008-04-23 11:55:45 -0700 | [diff] [blame] | 700 | struct list_head pgdir_list; |
| 701 | struct mutex pgdir_mutex; |
| 702 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 703 | struct mlx4_fw fw; |
| 704 | struct mlx4_cmd cmd; |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 705 | struct mlx4_mfunc mfunc; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 706 | |
| 707 | struct mlx4_bitmap pd_bitmap; |
Sean Hefty | 012a8ff | 2011-06-02 09:01:33 -0700 | [diff] [blame] | 708 | struct mlx4_bitmap xrcd_bitmap; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 709 | struct mlx4_uar_table uar_table; |
| 710 | struct mlx4_mr_table mr_table; |
| 711 | struct mlx4_cq_table cq_table; |
| 712 | struct mlx4_eq_table eq_table; |
| 713 | struct mlx4_srq_table srq_table; |
| 714 | struct mlx4_qp_table qp_table; |
| 715 | struct mlx4_mcg_table mcg_table; |
Or Gerlitz | f2a3f6a | 2011-06-15 14:47:14 +0000 | [diff] [blame] | 716 | struct mlx4_bitmap counters_bitmap; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 717 | |
| 718 | struct mlx4_catas_err catas_err; |
| 719 | |
| 720 | void __iomem *clr_base; |
| 721 | |
| 722 | struct mlx4_uar driver_uar; |
| 723 | void __iomem *kar; |
Yevgeny Petrilin | 2a2336f | 2008-10-22 11:44:46 -0700 | [diff] [blame] | 724 | struct mlx4_port_info port[MLX4_MAX_PORTS + 1]; |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 725 | struct mlx4_sense sense; |
Yevgeny Petrilin | 7ff93f8 | 2008-10-22 15:38:42 -0700 | [diff] [blame] | 726 | struct mutex port_mutex; |
Yevgeny Petrilin | 0b7ca5a | 2011-03-22 22:37:47 +0000 | [diff] [blame] | 727 | struct mlx4_msix_ctl msix_ctl; |
Yevgeny Petrilin | b12d93d | 2011-03-22 22:38:24 +0000 | [diff] [blame] | 728 | struct mlx4_steer *steer; |
Eli Cohen | c1b43dc | 2011-03-22 22:38:41 +0000 | [diff] [blame] | 729 | struct list_head bf_list; |
| 730 | struct mutex bf_mutex; |
| 731 | struct io_mapping *bf_mapping; |
Jack Morgenstein | ea51b37 | 2011-12-13 04:13:48 +0000 | [diff] [blame] | 732 | int reserved_mtts; |
Hadar Hen Zion | 0ff1fb6 | 2012-07-05 04:03:46 +0000 | [diff] [blame] | 733 | int fs_hash_mode; |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 734 | }; |
| 735 | |
| 736 | static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev) |
| 737 | { |
| 738 | return container_of(dev, struct mlx4_priv, dev); |
| 739 | } |
| 740 | |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 741 | #define MLX4_SENSE_RANGE (HZ * 3) |
| 742 | |
| 743 | extern struct workqueue_struct *mlx4_wq; |
| 744 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 745 | u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap); |
| 746 | void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj); |
Yevgeny Petrilin | a3cdcbf | 2008-10-10 12:01:37 -0700 | [diff] [blame] | 747 | u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align); |
| 748 | void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt); |
Eli Cohen | 42d1e01 | 2011-03-22 22:38:45 +0000 | [diff] [blame] | 749 | u32 mlx4_bitmap_avail(struct mlx4_bitmap *bitmap); |
Yevgeny Petrilin | 93fc9e1 | 2008-10-22 10:25:29 -0700 | [diff] [blame] | 750 | int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask, |
| 751 | u32 reserved_bot, u32 resetrved_top); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 752 | void mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap); |
| 753 | |
| 754 | int mlx4_reset(struct mlx4_dev *dev); |
| 755 | |
Yevgeny Petrilin | b8dd786 | 2008-12-22 07:15:03 -0800 | [diff] [blame] | 756 | int mlx4_alloc_eq_table(struct mlx4_dev *dev); |
| 757 | void mlx4_free_eq_table(struct mlx4_dev *dev); |
| 758 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 759 | int mlx4_init_pd_table(struct mlx4_dev *dev); |
Sean Hefty | 012a8ff | 2011-06-02 09:01:33 -0700 | [diff] [blame] | 760 | int mlx4_init_xrcd_table(struct mlx4_dev *dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 761 | int mlx4_init_uar_table(struct mlx4_dev *dev); |
| 762 | int mlx4_init_mr_table(struct mlx4_dev *dev); |
| 763 | int mlx4_init_eq_table(struct mlx4_dev *dev); |
| 764 | int mlx4_init_cq_table(struct mlx4_dev *dev); |
| 765 | int mlx4_init_qp_table(struct mlx4_dev *dev); |
| 766 | int mlx4_init_srq_table(struct mlx4_dev *dev); |
| 767 | int mlx4_init_mcg_table(struct mlx4_dev *dev); |
| 768 | |
| 769 | void mlx4_cleanup_pd_table(struct mlx4_dev *dev); |
Sean Hefty | 012a8ff | 2011-06-02 09:01:33 -0700 | [diff] [blame] | 770 | void mlx4_cleanup_xrcd_table(struct mlx4_dev *dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 771 | void mlx4_cleanup_uar_table(struct mlx4_dev *dev); |
| 772 | void mlx4_cleanup_mr_table(struct mlx4_dev *dev); |
| 773 | void mlx4_cleanup_eq_table(struct mlx4_dev *dev); |
| 774 | void mlx4_cleanup_cq_table(struct mlx4_dev *dev); |
| 775 | void mlx4_cleanup_qp_table(struct mlx4_dev *dev); |
| 776 | void mlx4_cleanup_srq_table(struct mlx4_dev *dev); |
| 777 | void mlx4_cleanup_mcg_table(struct mlx4_dev *dev); |
Eli Cohen | c82e9aa | 2011-12-13 04:15:24 +0000 | [diff] [blame] | 778 | int __mlx4_qp_alloc_icm(struct mlx4_dev *dev, int qpn); |
| 779 | void __mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn); |
| 780 | int __mlx4_cq_alloc_icm(struct mlx4_dev *dev, int *cqn); |
| 781 | void __mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn); |
| 782 | int __mlx4_srq_alloc_icm(struct mlx4_dev *dev, int *srqn); |
| 783 | void __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn); |
| 784 | int __mlx4_mr_reserve(struct mlx4_dev *dev); |
| 785 | void __mlx4_mr_release(struct mlx4_dev *dev, u32 index); |
| 786 | int __mlx4_mr_alloc_icm(struct mlx4_dev *dev, u32 index); |
| 787 | void __mlx4_mr_free_icm(struct mlx4_dev *dev, u32 index); |
| 788 | u32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order); |
| 789 | void __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 first_seg, int order); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 790 | |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 791 | int mlx4_WRITE_MTT_wrapper(struct mlx4_dev *dev, int slave, |
| 792 | struct mlx4_vhcr *vhcr, |
| 793 | struct mlx4_cmd_mailbox *inbox, |
| 794 | struct mlx4_cmd_mailbox *outbox, |
| 795 | struct mlx4_cmd_info *cmd); |
| 796 | int mlx4_SYNC_TPT_wrapper(struct mlx4_dev *dev, int slave, |
| 797 | struct mlx4_vhcr *vhcr, |
| 798 | struct mlx4_cmd_mailbox *inbox, |
| 799 | struct mlx4_cmd_mailbox *outbox, |
| 800 | struct mlx4_cmd_info *cmd); |
| 801 | int mlx4_SW2HW_MPT_wrapper(struct mlx4_dev *dev, int slave, |
| 802 | struct mlx4_vhcr *vhcr, |
| 803 | struct mlx4_cmd_mailbox *inbox, |
| 804 | struct mlx4_cmd_mailbox *outbox, |
| 805 | struct mlx4_cmd_info *cmd); |
| 806 | int mlx4_HW2SW_MPT_wrapper(struct mlx4_dev *dev, int slave, |
| 807 | struct mlx4_vhcr *vhcr, |
| 808 | struct mlx4_cmd_mailbox *inbox, |
| 809 | struct mlx4_cmd_mailbox *outbox, |
| 810 | struct mlx4_cmd_info *cmd); |
| 811 | int mlx4_QUERY_MPT_wrapper(struct mlx4_dev *dev, int slave, |
| 812 | struct mlx4_vhcr *vhcr, |
| 813 | struct mlx4_cmd_mailbox *inbox, |
| 814 | struct mlx4_cmd_mailbox *outbox, |
| 815 | struct mlx4_cmd_info *cmd); |
| 816 | int mlx4_SW2HW_EQ_wrapper(struct mlx4_dev *dev, int slave, |
| 817 | struct mlx4_vhcr *vhcr, |
| 818 | struct mlx4_cmd_mailbox *inbox, |
| 819 | struct mlx4_cmd_mailbox *outbox, |
| 820 | struct mlx4_cmd_info *cmd); |
| 821 | int mlx4_DMA_wrapper(struct mlx4_dev *dev, int slave, |
| 822 | struct mlx4_vhcr *vhcr, |
| 823 | struct mlx4_cmd_mailbox *inbox, |
| 824 | struct mlx4_cmd_mailbox *outbox, |
| 825 | struct mlx4_cmd_info *cmd); |
Eli Cohen | c82e9aa | 2011-12-13 04:15:24 +0000 | [diff] [blame] | 826 | int __mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, |
| 827 | int *base); |
| 828 | void __mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt); |
| 829 | int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac); |
| 830 | void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); |
| 831 | int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac); |
| 832 | int __mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, |
| 833 | int start_index, int npages, u64 *page_list); |
Jack Morgenstein | ba062d5 | 2012-05-15 10:35:03 +0000 | [diff] [blame] | 834 | int __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx); |
| 835 | void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx); |
| 836 | int __mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn); |
| 837 | void __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn); |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 838 | |
Jack Morgenstein | ee49bd9 | 2007-07-12 17:50:45 +0300 | [diff] [blame] | 839 | void mlx4_start_catas_poll(struct mlx4_dev *dev); |
| 840 | void mlx4_stop_catas_poll(struct mlx4_dev *dev); |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 841 | void mlx4_catas_init(void); |
Jack Morgenstein | ee49bd9 | 2007-07-12 17:50:45 +0300 | [diff] [blame] | 842 | int mlx4_restart_one(struct pci_dev *pdev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 843 | int mlx4_register_device(struct mlx4_dev *dev); |
| 844 | void mlx4_unregister_device(struct mlx4_dev *dev); |
Jack Morgenstein | 00f5ce9 | 2012-06-19 11:21:40 +0300 | [diff] [blame] | 845 | void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, |
| 846 | unsigned long param); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 847 | |
| 848 | struct mlx4_dev_cap; |
| 849 | struct mlx4_init_hca_param; |
| 850 | |
| 851 | u64 mlx4_make_profile(struct mlx4_dev *dev, |
| 852 | struct mlx4_profile *request, |
| 853 | struct mlx4_dev_cap *dev_cap, |
| 854 | struct mlx4_init_hca_param *init_hca); |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 855 | void mlx4_master_comm_channel(struct work_struct *work); |
| 856 | void mlx4_gen_slave_eqe(struct work_struct *work); |
| 857 | void mlx4_master_handle_slave_flr(struct work_struct *work); |
| 858 | |
| 859 | int mlx4_ALLOC_RES_wrapper(struct mlx4_dev *dev, int slave, |
| 860 | struct mlx4_vhcr *vhcr, |
| 861 | struct mlx4_cmd_mailbox *inbox, |
| 862 | struct mlx4_cmd_mailbox *outbox, |
| 863 | struct mlx4_cmd_info *cmd); |
| 864 | int mlx4_FREE_RES_wrapper(struct mlx4_dev *dev, int slave, |
| 865 | struct mlx4_vhcr *vhcr, |
| 866 | struct mlx4_cmd_mailbox *inbox, |
| 867 | struct mlx4_cmd_mailbox *outbox, |
| 868 | struct mlx4_cmd_info *cmd); |
| 869 | int mlx4_MAP_EQ_wrapper(struct mlx4_dev *dev, int slave, |
| 870 | struct mlx4_vhcr *vhcr, struct mlx4_cmd_mailbox *inbox, |
| 871 | struct mlx4_cmd_mailbox *outbox, |
| 872 | struct mlx4_cmd_info *cmd); |
| 873 | int mlx4_COMM_INT_wrapper(struct mlx4_dev *dev, int slave, |
| 874 | struct mlx4_vhcr *vhcr, |
| 875 | struct mlx4_cmd_mailbox *inbox, |
| 876 | struct mlx4_cmd_mailbox *outbox, |
| 877 | struct mlx4_cmd_info *cmd); |
| 878 | int mlx4_HW2SW_EQ_wrapper(struct mlx4_dev *dev, int slave, |
| 879 | struct mlx4_vhcr *vhcr, |
| 880 | struct mlx4_cmd_mailbox *inbox, |
| 881 | struct mlx4_cmd_mailbox *outbox, |
| 882 | struct mlx4_cmd_info *cmd); |
| 883 | int mlx4_QUERY_EQ_wrapper(struct mlx4_dev *dev, int slave, |
| 884 | struct mlx4_vhcr *vhcr, |
| 885 | struct mlx4_cmd_mailbox *inbox, |
| 886 | struct mlx4_cmd_mailbox *outbox, |
| 887 | struct mlx4_cmd_info *cmd); |
| 888 | int mlx4_SW2HW_CQ_wrapper(struct mlx4_dev *dev, int slave, |
| 889 | struct mlx4_vhcr *vhcr, |
| 890 | struct mlx4_cmd_mailbox *inbox, |
| 891 | struct mlx4_cmd_mailbox *outbox, |
| 892 | struct mlx4_cmd_info *cmd); |
| 893 | int mlx4_HW2SW_CQ_wrapper(struct mlx4_dev *dev, int slave, |
| 894 | struct mlx4_vhcr *vhcr, |
| 895 | struct mlx4_cmd_mailbox *inbox, |
| 896 | struct mlx4_cmd_mailbox *outbox, |
| 897 | struct mlx4_cmd_info *cmd); |
| 898 | int mlx4_QUERY_CQ_wrapper(struct mlx4_dev *dev, int slave, |
| 899 | struct mlx4_vhcr *vhcr, |
| 900 | struct mlx4_cmd_mailbox *inbox, |
| 901 | struct mlx4_cmd_mailbox *outbox, |
| 902 | struct mlx4_cmd_info *cmd); |
| 903 | int mlx4_MODIFY_CQ_wrapper(struct mlx4_dev *dev, int slave, |
| 904 | struct mlx4_vhcr *vhcr, |
| 905 | struct mlx4_cmd_mailbox *inbox, |
| 906 | struct mlx4_cmd_mailbox *outbox, |
| 907 | struct mlx4_cmd_info *cmd); |
| 908 | int mlx4_SW2HW_SRQ_wrapper(struct mlx4_dev *dev, int slave, |
| 909 | struct mlx4_vhcr *vhcr, |
| 910 | struct mlx4_cmd_mailbox *inbox, |
| 911 | struct mlx4_cmd_mailbox *outbox, |
| 912 | struct mlx4_cmd_info *cmd); |
| 913 | int mlx4_HW2SW_SRQ_wrapper(struct mlx4_dev *dev, int slave, |
| 914 | struct mlx4_vhcr *vhcr, |
| 915 | struct mlx4_cmd_mailbox *inbox, |
| 916 | struct mlx4_cmd_mailbox *outbox, |
| 917 | struct mlx4_cmd_info *cmd); |
| 918 | int mlx4_QUERY_SRQ_wrapper(struct mlx4_dev *dev, int slave, |
| 919 | struct mlx4_vhcr *vhcr, |
| 920 | struct mlx4_cmd_mailbox *inbox, |
| 921 | struct mlx4_cmd_mailbox *outbox, |
| 922 | struct mlx4_cmd_info *cmd); |
| 923 | int mlx4_ARM_SRQ_wrapper(struct mlx4_dev *dev, int slave, |
| 924 | struct mlx4_vhcr *vhcr, |
| 925 | struct mlx4_cmd_mailbox *inbox, |
| 926 | struct mlx4_cmd_mailbox *outbox, |
| 927 | struct mlx4_cmd_info *cmd); |
| 928 | int mlx4_GEN_QP_wrapper(struct mlx4_dev *dev, int slave, |
| 929 | struct mlx4_vhcr *vhcr, |
| 930 | struct mlx4_cmd_mailbox *inbox, |
| 931 | struct mlx4_cmd_mailbox *outbox, |
| 932 | struct mlx4_cmd_info *cmd); |
| 933 | int mlx4_RST2INIT_QP_wrapper(struct mlx4_dev *dev, int slave, |
| 934 | struct mlx4_vhcr *vhcr, |
| 935 | struct mlx4_cmd_mailbox *inbox, |
| 936 | struct mlx4_cmd_mailbox *outbox, |
| 937 | struct mlx4_cmd_info *cmd); |
| 938 | int mlx4_INIT2RTR_QP_wrapper(struct mlx4_dev *dev, int slave, |
| 939 | struct mlx4_vhcr *vhcr, |
| 940 | struct mlx4_cmd_mailbox *inbox, |
| 941 | struct mlx4_cmd_mailbox *outbox, |
| 942 | struct mlx4_cmd_info *cmd); |
| 943 | int mlx4_2RST_QP_wrapper(struct mlx4_dev *dev, int slave, |
| 944 | struct mlx4_vhcr *vhcr, |
| 945 | struct mlx4_cmd_mailbox *inbox, |
| 946 | struct mlx4_cmd_mailbox *outbox, |
| 947 | struct mlx4_cmd_info *cmd); |
| 948 | |
| 949 | int mlx4_GEN_EQE(struct mlx4_dev *dev, int slave, struct mlx4_eqe *eqe); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 950 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 951 | int mlx4_cmd_init(struct mlx4_dev *dev); |
| 952 | void mlx4_cmd_cleanup(struct mlx4_dev *dev); |
Jack Morgenstein | ab9c17a | 2011-12-13 04:18:30 +0000 | [diff] [blame] | 953 | int mlx4_multi_func_init(struct mlx4_dev *dev); |
| 954 | void mlx4_multi_func_cleanup(struct mlx4_dev *dev); |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 955 | void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param); |
| 956 | int mlx4_cmd_use_events(struct mlx4_dev *dev); |
| 957 | void mlx4_cmd_use_polling(struct mlx4_dev *dev); |
| 958 | |
Jack Morgenstein | ab9c17a | 2011-12-13 04:18:30 +0000 | [diff] [blame] | 959 | int mlx4_comm_cmd(struct mlx4_dev *dev, u8 cmd, u16 param, |
| 960 | unsigned long timeout); |
| 961 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 962 | void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn); |
| 963 | void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type); |
| 964 | |
| 965 | void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type); |
| 966 | |
| 967 | void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type); |
| 968 | |
| 969 | void mlx4_handle_catas_err(struct mlx4_dev *dev); |
| 970 | |
Yevgeny Petrilin | ab6dc30 | 2011-04-06 23:24:42 +0000 | [diff] [blame] | 971 | int mlx4_SENSE_PORT(struct mlx4_dev *dev, int port, |
| 972 | enum mlx4_port_type *type); |
Yevgeny Petrilin | 27bf91d | 2009-03-18 19:45:11 -0700 | [diff] [blame] | 973 | void mlx4_do_sense_ports(struct mlx4_dev *dev, |
| 974 | enum mlx4_port_type *stype, |
| 975 | enum mlx4_port_type *defaults); |
| 976 | void mlx4_start_sense(struct mlx4_dev *dev); |
| 977 | void mlx4_stop_sense(struct mlx4_dev *dev); |
| 978 | void mlx4_sense_init(struct mlx4_dev *dev); |
| 979 | int mlx4_check_port_params(struct mlx4_dev *dev, |
| 980 | enum mlx4_port_type *port_type); |
| 981 | int mlx4_change_port_types(struct mlx4_dev *dev, |
| 982 | enum mlx4_port_type *port_types); |
| 983 | |
Yevgeny Petrilin | 2a2336f | 2008-10-22 11:44:46 -0700 | [diff] [blame] | 984 | void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table); |
| 985 | void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table); |
| 986 | |
Jack Morgenstein | 6634961 | 2012-06-19 11:21:44 +0300 | [diff] [blame] | 987 | int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz); |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 988 | /* resource tracker functions*/ |
| 989 | int mlx4_get_slave_from_resource_id(struct mlx4_dev *dev, |
| 990 | enum mlx4_resource resource_type, |
Hadar Hen Zion | aa1ec3d | 2012-07-05 04:03:42 +0000 | [diff] [blame] | 991 | u64 resource_id, int *slave); |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 992 | void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave_id); |
| 993 | int mlx4_init_resource_tracker(struct mlx4_dev *dev); |
| 994 | |
Jack Morgenstein | b892495 | 2012-05-15 10:35:02 +0000 | [diff] [blame] | 995 | void mlx4_free_resource_tracker(struct mlx4_dev *dev, |
| 996 | enum mlx4_res_tracker_free_type type); |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 997 | |
Jack Morgenstein | b91cb3e | 2012-05-30 09:14:53 +0000 | [diff] [blame] | 998 | int mlx4_QUERY_FW_wrapper(struct mlx4_dev *dev, int slave, |
| 999 | struct mlx4_vhcr *vhcr, |
| 1000 | struct mlx4_cmd_mailbox *inbox, |
| 1001 | struct mlx4_cmd_mailbox *outbox, |
| 1002 | struct mlx4_cmd_info *cmd); |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 1003 | int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave, |
| 1004 | struct mlx4_vhcr *vhcr, |
| 1005 | struct mlx4_cmd_mailbox *inbox, |
| 1006 | struct mlx4_cmd_mailbox *outbox, |
| 1007 | struct mlx4_cmd_info *cmd); |
| 1008 | int mlx4_INIT_PORT_wrapper(struct mlx4_dev *dev, int slave, |
| 1009 | struct mlx4_vhcr *vhcr, |
| 1010 | struct mlx4_cmd_mailbox *inbox, |
| 1011 | struct mlx4_cmd_mailbox *outbox, |
| 1012 | struct mlx4_cmd_info *cmd); |
| 1013 | int mlx4_CLOSE_PORT_wrapper(struct mlx4_dev *dev, int slave, |
| 1014 | struct mlx4_vhcr *vhcr, |
| 1015 | struct mlx4_cmd_mailbox *inbox, |
| 1016 | struct mlx4_cmd_mailbox *outbox, |
| 1017 | struct mlx4_cmd_info *cmd); |
Jack Morgenstein | b91cb3e | 2012-05-30 09:14:53 +0000 | [diff] [blame] | 1018 | int mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave, |
| 1019 | struct mlx4_vhcr *vhcr, |
| 1020 | struct mlx4_cmd_mailbox *inbox, |
| 1021 | struct mlx4_cmd_mailbox *outbox, |
| 1022 | struct mlx4_cmd_info *cmd); |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 1023 | int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave, |
| 1024 | struct mlx4_vhcr *vhcr, |
| 1025 | struct mlx4_cmd_mailbox *inbox, |
| 1026 | struct mlx4_cmd_mailbox *outbox, |
| 1027 | struct mlx4_cmd_info *cmd); |
Jack Morgenstein | 9a5aa62 | 2008-11-28 21:29:46 -0800 | [diff] [blame] | 1028 | int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps); |
Yevgeny Petrilin | 7ff93f8 | 2008-10-22 15:38:42 -0700 | [diff] [blame] | 1029 | |
Jack Morgenstein | 6634961 | 2012-06-19 11:21:44 +0300 | [diff] [blame] | 1030 | int mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port, |
| 1031 | int *gid_tbl_len, int *pkey_tbl_len); |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 1032 | |
| 1033 | int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, |
| 1034 | struct mlx4_vhcr *vhcr, |
| 1035 | struct mlx4_cmd_mailbox *inbox, |
| 1036 | struct mlx4_cmd_mailbox *outbox, |
| 1037 | struct mlx4_cmd_info *cmd); |
| 1038 | |
| 1039 | int mlx4_PROMISC_wrapper(struct mlx4_dev *dev, int slave, |
| 1040 | struct mlx4_vhcr *vhcr, |
| 1041 | struct mlx4_cmd_mailbox *inbox, |
| 1042 | struct mlx4_cmd_mailbox *outbox, |
| 1043 | struct mlx4_cmd_info *cmd); |
Yevgeny Petrilin | b12d93d | 2011-03-22 22:38:24 +0000 | [diff] [blame] | 1044 | int mlx4_qp_detach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], |
| 1045 | enum mlx4_protocol prot, enum mlx4_steer_type steer); |
| 1046 | int mlx4_qp_attach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], |
| 1047 | int block_mcast_loopback, enum mlx4_protocol prot, |
| 1048 | enum mlx4_steer_type steer); |
Jack Morgenstein | 623ed84 | 2011-12-13 04:10:33 +0000 | [diff] [blame] | 1049 | int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, |
| 1050 | struct mlx4_vhcr *vhcr, |
| 1051 | struct mlx4_cmd_mailbox *inbox, |
| 1052 | struct mlx4_cmd_mailbox *outbox, |
| 1053 | struct mlx4_cmd_info *cmd); |
| 1054 | int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave, |
| 1055 | struct mlx4_vhcr *vhcr, |
| 1056 | struct mlx4_cmd_mailbox *inbox, |
| 1057 | struct mlx4_cmd_mailbox *outbox, |
| 1058 | struct mlx4_cmd_info *cmd); |
| 1059 | int mlx4_common_set_vlan_fltr(struct mlx4_dev *dev, int function, |
| 1060 | int port, void *buf); |
| 1061 | int mlx4_common_dump_eth_stats(struct mlx4_dev *dev, int slave, u32 in_mod, |
| 1062 | struct mlx4_cmd_mailbox *outbox); |
| 1063 | int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave, |
| 1064 | struct mlx4_vhcr *vhcr, |
| 1065 | struct mlx4_cmd_mailbox *inbox, |
| 1066 | struct mlx4_cmd_mailbox *outbox, |
| 1067 | struct mlx4_cmd_info *cmd); |
| 1068 | int mlx4_PKEY_TABLE_wrapper(struct mlx4_dev *dev, int slave, |
| 1069 | struct mlx4_vhcr *vhcr, |
| 1070 | struct mlx4_cmd_mailbox *inbox, |
| 1071 | struct mlx4_cmd_mailbox *outbox, |
| 1072 | struct mlx4_cmd_info *cmd); |
| 1073 | int mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev *dev, int slave, |
| 1074 | struct mlx4_vhcr *vhcr, |
| 1075 | struct mlx4_cmd_mailbox *inbox, |
| 1076 | struct mlx4_cmd_mailbox *outbox, |
| 1077 | struct mlx4_cmd_info *cmd); |
Hadar Hen Zion | 8fcfb4d | 2012-07-05 04:03:45 +0000 | [diff] [blame] | 1078 | int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, |
| 1079 | struct mlx4_vhcr *vhcr, |
| 1080 | struct mlx4_cmd_mailbox *inbox, |
| 1081 | struct mlx4_cmd_mailbox *outbox, |
| 1082 | struct mlx4_cmd_info *cmd); |
| 1083 | int mlx4_QP_FLOW_STEERING_DETACH_wrapper(struct mlx4_dev *dev, int slave, |
| 1084 | struct mlx4_vhcr *vhcr, |
| 1085 | struct mlx4_cmd_mailbox *inbox, |
| 1086 | struct mlx4_cmd_mailbox *outbox, |
| 1087 | struct mlx4_cmd_info *cmd); |
Jack Morgenstein | f5311ac | 2011-12-13 04:12:13 +0000 | [diff] [blame] | 1088 | |
Eugenia Emantayev | 0ec2c0f | 2011-12-13 04:16:02 +0000 | [diff] [blame] | 1089 | int mlx4_get_mgm_entry_size(struct mlx4_dev *dev); |
| 1090 | int mlx4_get_qp_per_mgm(struct mlx4_dev *dev); |
| 1091 | |
Marcel Apfelbaum | 5cc914f | 2011-12-13 04:12:40 +0000 | [diff] [blame] | 1092 | static inline void set_param_l(u64 *arg, u32 val) |
| 1093 | { |
| 1094 | *((u32 *)arg) = val; |
| 1095 | } |
| 1096 | |
| 1097 | static inline void set_param_h(u64 *arg, u32 val) |
| 1098 | { |
| 1099 | *arg = (*arg & 0xffffffff) | ((u64) val << 32); |
| 1100 | } |
| 1101 | |
| 1102 | static inline u32 get_param_l(u64 *arg) |
| 1103 | { |
| 1104 | return (u32) (*arg & 0xffffffff); |
| 1105 | } |
| 1106 | |
| 1107 | static inline u32 get_param_h(u64 *arg) |
| 1108 | { |
| 1109 | return (u32)(*arg >> 32); |
| 1110 | } |
| 1111 | |
Eli Cohen | c82e9aa | 2011-12-13 04:15:24 +0000 | [diff] [blame] | 1112 | static inline spinlock_t *mlx4_tlock(struct mlx4_dev *dev) |
| 1113 | { |
| 1114 | return &mlx4_priv(dev)->mfunc.master.res_tracker.lock; |
| 1115 | } |
| 1116 | |
Jack Morgenstein | f5311ac | 2011-12-13 04:12:13 +0000 | [diff] [blame] | 1117 | #define NOT_MASKED_PD_BITS 17 |
| 1118 | |
Roland Dreier | 225c7b1 | 2007-05-08 18:00:38 -0700 | [diff] [blame] | 1119 | #endif /* MLX4_H */ |