| Catalin Marinas | 58d0ba5 | 2012-03-05 11:49:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Based on arch/arm/mm/tlb.S |
| 3 | * |
| 4 | * Copyright (C) 1997-2002 Russell King |
| 5 | * Copyright (C) 2012 ARM Ltd. |
| 6 | * Written by Catalin Marinas <catalin.marinas@arm.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 19 | */ |
| 20 | #include <linux/linkage.h> |
| 21 | #include <asm/assembler.h> |
| 22 | #include <asm/asm-offsets.h> |
| 23 | #include <asm/page.h> |
| 24 | #include <asm/tlbflush.h> |
| 25 | #include "proc-macros.S" |
| 26 | |
| 27 | /* |
| 28 | * __cpu_flush_user_tlb_range(start, end, vma) |
| 29 | * |
| 30 | * Invalidate a range of TLB entries in the specified address space. |
| 31 | * |
| 32 | * - start - start address (may not be aligned) |
| 33 | * - end - end address (exclusive, may not be aligned) |
| 34 | * - vma - vma_struct describing address range |
| 35 | */ |
| 36 | ENTRY(__cpu_flush_user_tlb_range) |
| 37 | vma_vm_mm x3, x2 // get vma->vm_mm |
| 38 | mmid x3, x3 // get vm_mm->context.id |
| 39 | dsb sy |
| 40 | lsr x0, x0, #12 // align address |
| 41 | lsr x1, x1, #12 |
| 42 | bfi x0, x3, #48, #16 // start VA and ASID |
| 43 | bfi x1, x3, #48, #16 // end VA and ASID |
| 44 | 1: tlbi vae1is, x0 // TLB invalidate by address and ASID |
| 45 | add x0, x0, #1 |
| 46 | cmp x0, x1 |
| 47 | b.lo 1b |
| 48 | dsb sy |
| 49 | ret |
| 50 | ENDPROC(__cpu_flush_user_tlb_range) |
| 51 | |
| 52 | /* |
| 53 | * __cpu_flush_kern_tlb_range(start,end) |
| 54 | * |
| 55 | * Invalidate a range of kernel TLB entries. |
| 56 | * |
| 57 | * - start - start address (may not be aligned) |
| 58 | * - end - end address (exclusive, may not be aligned) |
| 59 | */ |
| 60 | ENTRY(__cpu_flush_kern_tlb_range) |
| 61 | dsb sy |
| 62 | lsr x0, x0, #12 // align address |
| 63 | lsr x1, x1, #12 |
| 64 | 1: tlbi vaae1is, x0 // TLB invalidate by address |
| 65 | add x0, x0, #1 |
| 66 | cmp x0, x1 |
| 67 | b.lo 1b |
| 68 | dsb sy |
| 69 | isb |
| 70 | ret |
| 71 | ENDPROC(__cpu_flush_kern_tlb_range) |