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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * sata_svw.c - ServerWorks / Apple K2 SATA
3 *
4 * Maintained by: Benjamin Herrenschmidt <benh@kernel.crashing.org> and
5 * Jeff Garzik <jgarzik@pobox.com>
6 * Please ALWAYS copy linux-ide@vger.kernel.org
7 * on emails.
8 *
9 * Copyright 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 *
11 * Bits from Jeff Garzik, Copyright RedHat, Inc.
12 *
13 * This driver probably works with non-Apple versions of the
14 * Broadcom chipset...
15 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -040017 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2, or (at your option)
20 * any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; see the file COPYING. If not, write to
29 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
30 *
31 *
32 * libata documentation is available via 'make {ps|pdf}docs',
33 * as Documentation/DocBook/libata.*
34 *
35 * Hardware documentation available under NDA.
Linus Torvalds1da177e2005-04-16 15:20:36 -070036 *
37 */
38
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#include <linux/kernel.h>
40#include <linux/module.h>
41#include <linux/pci.h>
42#include <linux/init.h>
43#include <linux/blkdev.h>
44#include <linux/delay.h>
45#include <linux/interrupt.h>
Jeff Garzika9524a72005-10-30 14:39:11 -050046#include <linux/device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <scsi/scsi_host.h>
Anantha Subramanyam931506d2008-02-28 15:58:35 -080048#include <scsi/scsi_cmnd.h>
49#include <scsi/scsi.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070050#include <linux/libata.h>
51
52#ifdef CONFIG_PPC_OF
53#include <asm/prom.h>
54#include <asm/pci-bridge.h>
55#endif /* CONFIG_PPC_OF */
56
57#define DRV_NAME "sata_svw"
Jeff Garzik2a3103c2007-08-31 04:54:06 -040058#define DRV_VERSION "2.3"
Linus Torvalds1da177e2005-04-16 15:20:36 -070059
Jeff Garzik55cca652006-03-21 22:14:17 -050060enum {
Tejun Heo4447d352007-04-17 23:44:08 +090061 /* ap->flags bits */
62 K2_FLAG_SATA_8_PORTS = (1 << 24),
63 K2_FLAG_NO_ATAPI_DMA = (1 << 25),
Anantha Subramanyam931506d2008-02-28 15:58:35 -080064 K2_FLAG_BAR_POS_3 = (1 << 26),
Jeff Garzikc10340a2006-12-14 17:04:33 -050065
Jeff Garzik55cca652006-03-21 22:14:17 -050066 /* Taskfile registers offsets */
67 K2_SATA_TF_CMD_OFFSET = 0x00,
68 K2_SATA_TF_DATA_OFFSET = 0x00,
69 K2_SATA_TF_ERROR_OFFSET = 0x04,
70 K2_SATA_TF_NSECT_OFFSET = 0x08,
71 K2_SATA_TF_LBAL_OFFSET = 0x0c,
72 K2_SATA_TF_LBAM_OFFSET = 0x10,
73 K2_SATA_TF_LBAH_OFFSET = 0x14,
74 K2_SATA_TF_DEVICE_OFFSET = 0x18,
75 K2_SATA_TF_CMDSTAT_OFFSET = 0x1c,
76 K2_SATA_TF_CTL_OFFSET = 0x20,
Linus Torvalds1da177e2005-04-16 15:20:36 -070077
Jeff Garzik55cca652006-03-21 22:14:17 -050078 /* DMA base */
79 K2_SATA_DMA_CMD_OFFSET = 0x30,
Linus Torvalds1da177e2005-04-16 15:20:36 -070080
Jeff Garzik55cca652006-03-21 22:14:17 -050081 /* SCRs base */
82 K2_SATA_SCR_STATUS_OFFSET = 0x40,
83 K2_SATA_SCR_ERROR_OFFSET = 0x44,
84 K2_SATA_SCR_CONTROL_OFFSET = 0x48,
Linus Torvalds1da177e2005-04-16 15:20:36 -070085
Jeff Garzik55cca652006-03-21 22:14:17 -050086 /* Others */
87 K2_SATA_SICR1_OFFSET = 0x80,
88 K2_SATA_SICR2_OFFSET = 0x84,
89 K2_SATA_SIM_OFFSET = 0x88,
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
Jeff Garzik55cca652006-03-21 22:14:17 -050091 /* Port stride */
92 K2_SATA_PORT_OFFSET = 0x100,
Jeff Garzikc10340a2006-12-14 17:04:33 -050093
Anantha Subramanyam931506d2008-02-28 15:58:35 -080094 chip_svw4 = 0,
95 chip_svw8 = 1,
96 chip_svw42 = 2, /* bar 3 */
97 chip_svw43 = 3, /* bar 5 */
Jeff Garzikc10340a2006-12-14 17:04:33 -050098};
99
Jeff Garzikac19bff2005-10-29 13:58:21 -0400100static u8 k2_stat_check_status(struct ata_port *ap);
101
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102
Jeff Garzikc10340a2006-12-14 17:04:33 -0500103static int k2_sata_check_atapi_dma(struct ata_queued_cmd *qc)
104{
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800105 u8 cmnd = qc->scsicmd->cmnd[0];
106
Jeff Garzikc10340a2006-12-14 17:04:33 -0500107 if (qc->ap->flags & K2_FLAG_NO_ATAPI_DMA)
108 return -1; /* ATAPI DMA not supported */
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800109 else {
110 switch (cmnd) {
111 case READ_10:
112 case READ_12:
113 case READ_16:
114 case WRITE_10:
115 case WRITE_12:
116 case WRITE_16:
117 return 0;
Jeff Garzikc10340a2006-12-14 17:04:33 -0500118
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800119 default:
120 return -1;
121 }
122
123 }
Jeff Garzikc10340a2006-12-14 17:04:33 -0500124}
125
Tejun Heo82ef04f2008-07-31 17:02:40 +0900126static int k2_sata_scr_read(struct ata_link *link,
127 unsigned int sc_reg, u32 *val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128{
129 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900130 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900131 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900132 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133}
134
135
Tejun Heo82ef04f2008-07-31 17:02:40 +0900136static int k2_sata_scr_write(struct ata_link *link,
137 unsigned int sc_reg, u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138{
139 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900140 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900141 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900142 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143}
144
145
Jeff Garzik057ace52005-10-22 14:27:05 -0400146static void k2_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147{
148 struct ata_ioports *ioaddr = &ap->ioaddr;
149 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
150
151 if (tf->ctl != ap->last_ctl) {
Tejun Heo0d5ff562007-02-01 15:06:36 +0900152 writeb(tf->ctl, ioaddr->ctl_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 ap->last_ctl = tf->ctl;
154 ata_wait_idle(ap);
155 }
156 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Jeff Garzik850a9d82006-12-20 14:37:04 -0500157 writew(tf->feature | (((u16)tf->hob_feature) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900158 ioaddr->feature_addr);
Jeff Garzik850a9d82006-12-20 14:37:04 -0500159 writew(tf->nsect | (((u16)tf->hob_nsect) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900160 ioaddr->nsect_addr);
Jeff Garzik850a9d82006-12-20 14:37:04 -0500161 writew(tf->lbal | (((u16)tf->hob_lbal) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900162 ioaddr->lbal_addr);
Jeff Garzik850a9d82006-12-20 14:37:04 -0500163 writew(tf->lbam | (((u16)tf->hob_lbam) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900164 ioaddr->lbam_addr);
Jeff Garzik850a9d82006-12-20 14:37:04 -0500165 writew(tf->lbah | (((u16)tf->hob_lbah) << 8),
Tejun Heo0d5ff562007-02-01 15:06:36 +0900166 ioaddr->lbah_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167 } else if (is_addr) {
Tejun Heo0d5ff562007-02-01 15:06:36 +0900168 writew(tf->feature, ioaddr->feature_addr);
169 writew(tf->nsect, ioaddr->nsect_addr);
170 writew(tf->lbal, ioaddr->lbal_addr);
171 writew(tf->lbam, ioaddr->lbam_addr);
172 writew(tf->lbah, ioaddr->lbah_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173 }
174
175 if (tf->flags & ATA_TFLAG_DEVICE)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900176 writeb(tf->device, ioaddr->device_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177
178 ata_wait_idle(ap);
179}
180
181
182static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
183{
184 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzikac19bff2005-10-29 13:58:21 -0400185 u16 nsect, lbal, lbam, lbah, feature;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700186
Jeff Garzikac19bff2005-10-29 13:58:21 -0400187 tf->command = k2_stat_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900188 tf->device = readw(ioaddr->device_addr);
189 feature = readw(ioaddr->error_addr);
190 nsect = readw(ioaddr->nsect_addr);
191 lbal = readw(ioaddr->lbal_addr);
192 lbam = readw(ioaddr->lbam_addr);
193 lbah = readw(ioaddr->lbah_addr);
Jeff Garzikac19bff2005-10-29 13:58:21 -0400194
195 tf->feature = feature;
196 tf->nsect = nsect;
197 tf->lbal = lbal;
198 tf->lbam = lbam;
199 tf->lbah = lbah;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200
201 if (tf->flags & ATA_TFLAG_LBA48) {
Jeff Garzikac19bff2005-10-29 13:58:21 -0400202 tf->hob_feature = feature >> 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203 tf->hob_nsect = nsect >> 8;
204 tf->hob_lbal = lbal >> 8;
205 tf->hob_lbam = lbam >> 8;
206 tf->hob_lbah = lbah >> 8;
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400207 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208}
209
210/**
211 * k2_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction (MMIO)
212 * @qc: Info associated with this ATA transaction.
213 *
214 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400215 * spin_lock_irqsave(host lock)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216 */
217
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400218static void k2_bmdma_setup_mmio(struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219{
220 struct ata_port *ap = qc->ap;
221 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
222 u8 dmactl;
Jeff Garzik59f99882007-05-28 07:07:20 -0400223 void __iomem *mmio = ap->ioaddr.bmdma_addr;
224
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225 /* load PRD table addr. */
226 mb(); /* make sure PRD table writes are visible to controller */
Tejun Heof60d7012010-05-10 21:41:41 +0200227 writel(ap->bmdma_prd_dma, mmio + ATA_DMA_TABLE_OFS);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228
229 /* specify data direction, triple-check start bit is clear */
230 dmactl = readb(mmio + ATA_DMA_CMD);
231 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
232 if (!rw)
233 dmactl |= ATA_DMA_WR;
234 writeb(dmactl, mmio + ATA_DMA_CMD);
235
236 /* issue r/w command if this is not a ATA DMA command*/
237 if (qc->tf.protocol != ATA_PROT_DMA)
Tejun Heo5682ed32008-04-07 22:47:16 +0900238 ap->ops->sff_exec_command(ap, &qc->tf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239}
240
241/**
242 * k2_bmdma_start_mmio - Start a PCI IDE BMDMA transaction (MMIO)
243 * @qc: Info associated with this ATA transaction.
244 *
245 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400246 * spin_lock_irqsave(host lock)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247 */
248
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400249static void k2_bmdma_start_mmio(struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250{
251 struct ata_port *ap = qc->ap;
Jeff Garzik59f99882007-05-28 07:07:20 -0400252 void __iomem *mmio = ap->ioaddr.bmdma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253 u8 dmactl;
254
255 /* start host DMA transaction */
256 dmactl = readb(mmio + ATA_DMA_CMD);
257 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
Pavel Machekec6add92008-06-23 11:01:31 +0200258 /* This works around possible data corruption.
259
260 On certain SATA controllers that can be seen when the r/w
261 command is given to the controller before the host DMA is
262 started.
263
264 On a Read command, the controller would initiate the
265 command to the drive even before it sees the DMA
266 start. When there are very fast drives connected to the
267 controller, or when the data request hits in the drive
268 cache, there is the possibility that the drive returns a
269 part or all of the requested data to the controller before
270 the DMA start is issued. In this case, the controller
271 would become confused as to what to do with the data. In
272 the worst case when all the data is returned back to the
273 controller, the controller could hang. In other cases it
274 could return partial data returning in data
275 corruption. This problem has been seen in PPC systems and
276 can also appear on an system with very fast disks, where
277 the SATA controller is sitting behind a number of bridges,
278 and hence there is significant latency between the r/w
279 command and the start command. */
280 /* issue r/w command if the access is to ATA */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281 if (qc->tf.protocol == ATA_PROT_DMA)
Tejun Heo5682ed32008-04-07 22:47:16 +0900282 ap->ops->sff_exec_command(ap, &qc->tf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283}
284
Jeff Garzik8a60a072005-07-31 13:13:24 -0400285
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286static u8 k2_stat_check_status(struct ata_port *ap)
287{
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400288 return readl(ap->ioaddr.status_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289}
290
291#ifdef CONFIG_PPC_OF
292/*
293 * k2_sata_proc_info
294 * inout : decides on the direction of the dataflow and the meaning of the
295 * variables
296 * buffer: If inout==FALSE data is being written to it else read from it
297 * *start: If inout==FALSE start of the valid data in the buffer
298 * offset: If inout==FALSE offset from the beginning of the imaginary file
299 * from which we start writing into the buffer
300 * length: If inout==FALSE max number of bytes to be written into the buffer
301 * else number of bytes in the buffer
302 */
303static int k2_sata_proc_info(struct Scsi_Host *shost, char *page, char **start,
304 off_t offset, int count, int inout)
305{
306 struct ata_port *ap;
307 struct device_node *np;
308 int len, index;
309
310 /* Find the ata_port */
Jeff Garzik35bb94b2006-04-11 13:12:34 -0400311 ap = ata_shost_to_port(shost);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 if (ap == NULL)
313 return 0;
314
315 /* Find the OF node for the PCI device proper */
Jeff Garzikcca39742006-08-24 03:19:22 -0400316 np = pci_device_to_OF_node(to_pci_dev(ap->host->dev));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317 if (np == NULL)
318 return 0;
319
320 /* Match it to a port node */
Jeff Garzikcca39742006-08-24 03:19:22 -0400321 index = (ap == ap->host->ports[0]) ? 0 : 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322 for (np = np->child; np != NULL; np = np->sibling) {
Stephen Rothwell40cd3a42007-05-01 13:54:02 +1000323 const u32 *reg = of_get_property(np, "reg", NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324 if (!reg)
325 continue;
326 if (index == *reg)
327 break;
328 }
329 if (np == NULL)
330 return 0;
331
332 len = sprintf(page, "devspec: %s\n", np->full_name);
333
334 return len;
335}
336#endif /* CONFIG_PPC_OF */
337
338
Jeff Garzik193515d2005-11-07 00:59:37 -0500339static struct scsi_host_template k2_sata_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900340 ATA_BMDMA_SHT(DRV_NAME),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341#ifdef CONFIG_PPC_OF
342 .proc_info = k2_sata_proc_info,
343#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344};
345
346
Tejun Heo029cfd62008-03-25 12:22:49 +0900347static struct ata_port_operations k2_sata_ops = {
348 .inherits = &ata_bmdma_port_ops,
Tejun Heo5682ed32008-04-07 22:47:16 +0900349 .sff_tf_load = k2_sata_tf_load,
350 .sff_tf_read = k2_sata_tf_read,
351 .sff_check_status = k2_stat_check_status,
Jeff Garzikc10340a2006-12-14 17:04:33 -0500352 .check_atapi_dma = k2_sata_check_atapi_dma,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353 .bmdma_setup = k2_bmdma_setup_mmio,
354 .bmdma_start = k2_bmdma_start_mmio,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355 .scr_read = k2_sata_scr_read,
356 .scr_write = k2_sata_scr_write,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357};
358
Tejun Heo4447d352007-04-17 23:44:08 +0900359static const struct ata_port_info k2_port_info[] = {
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800360 /* chip_svw4 */
Tejun Heo4447d352007-04-17 23:44:08 +0900361 {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300362 .flags = ATA_FLAG_SATA | K2_FLAG_NO_ATAPI_DMA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100363 .pio_mask = ATA_PIO4,
364 .mwdma_mask = ATA_MWDMA2,
Jeff Garzikbf6263a2007-07-09 12:16:50 -0400365 .udma_mask = ATA_UDMA6,
Tejun Heo4447d352007-04-17 23:44:08 +0900366 .port_ops = &k2_sata_ops,
367 },
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800368 /* chip_svw8 */
Tejun Heo4447d352007-04-17 23:44:08 +0900369 {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300370 .flags = ATA_FLAG_SATA | K2_FLAG_NO_ATAPI_DMA |
371 K2_FLAG_SATA_8_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100372 .pio_mask = ATA_PIO4,
373 .mwdma_mask = ATA_MWDMA2,
Jeff Garzikbf6263a2007-07-09 12:16:50 -0400374 .udma_mask = ATA_UDMA6,
Tejun Heo4447d352007-04-17 23:44:08 +0900375 .port_ops = &k2_sata_ops,
376 },
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800377 /* chip_svw42 */
378 {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300379 .flags = ATA_FLAG_SATA | K2_FLAG_BAR_POS_3,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100380 .pio_mask = ATA_PIO4,
381 .mwdma_mask = ATA_MWDMA2,
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800382 .udma_mask = ATA_UDMA6,
383 .port_ops = &k2_sata_ops,
384 },
385 /* chip_svw43 */
386 {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300387 .flags = ATA_FLAG_SATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100388 .pio_mask = ATA_PIO4,
389 .mwdma_mask = ATA_MWDMA2,
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800390 .udma_mask = ATA_UDMA6,
391 .port_ops = &k2_sata_ops,
392 },
Tejun Heo4447d352007-04-17 23:44:08 +0900393};
394
Tejun Heo0d5ff562007-02-01 15:06:36 +0900395static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396{
397 port->cmd_addr = base + K2_SATA_TF_CMD_OFFSET;
398 port->data_addr = base + K2_SATA_TF_DATA_OFFSET;
399 port->feature_addr =
400 port->error_addr = base + K2_SATA_TF_ERROR_OFFSET;
401 port->nsect_addr = base + K2_SATA_TF_NSECT_OFFSET;
402 port->lbal_addr = base + K2_SATA_TF_LBAL_OFFSET;
403 port->lbam_addr = base + K2_SATA_TF_LBAM_OFFSET;
404 port->lbah_addr = base + K2_SATA_TF_LBAH_OFFSET;
405 port->device_addr = base + K2_SATA_TF_DEVICE_OFFSET;
406 port->command_addr =
407 port->status_addr = base + K2_SATA_TF_CMDSTAT_OFFSET;
408 port->altstatus_addr =
409 port->ctl_addr = base + K2_SATA_TF_CTL_OFFSET;
410 port->bmdma_addr = base + K2_SATA_DMA_CMD_OFFSET;
411 port->scr_addr = base + K2_SATA_SCR_STATUS_OFFSET;
412}
413
414
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400415static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416{
Tejun Heo4447d352007-04-17 23:44:08 +0900417 const struct ata_port_info *ppi[] =
418 { &k2_port_info[ent->driver_data], NULL };
419 struct ata_host *host;
Jeff Garzikea6ba102005-08-30 05:18:18 -0400420 void __iomem *mmio_base;
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800421 int n_ports, i, rc, bar_pos;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700422
Joe Perches06296a12011-04-15 15:52:00 -0700423 ata_print_version_once(&pdev->dev, DRV_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424
Tejun Heo4447d352007-04-17 23:44:08 +0900425 /* allocate host */
426 n_ports = 4;
427 if (ppi[0]->flags & K2_FLAG_SATA_8_PORTS)
428 n_ports = 8;
429
430 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
431 if (!host)
432 return -ENOMEM;
433
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800434 bar_pos = 5;
435 if (ppi[0]->flags & K2_FLAG_BAR_POS_3)
436 bar_pos = 3;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437 /*
438 * If this driver happens to only be useful on Apple's K2, then
439 * we should check that here as it has a normal Serverworks ID
440 */
Tejun Heo24dc5f32007-01-20 16:00:28 +0900441 rc = pcim_enable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442 if (rc)
443 return rc;
Tejun Heo4447d352007-04-17 23:44:08 +0900444
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445 /*
446 * Check if we have resources mapped at all (second function may
447 * have been disabled by firmware)
448 */
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800449 if (pci_resource_len(pdev, bar_pos) == 0) {
450 /* In IDE mode we need to pin the device to ensure that
451 pcim_release does not clear the busmaster bit in config
452 space, clearing causes busmaster DMA to fail on
453 ports 3 & 4 */
454 pcim_pin_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455 return -ENODEV;
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800456 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457
Tejun Heo0d5ff562007-02-01 15:06:36 +0900458 /* Request and iomap PCI regions */
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800459 rc = pcim_iomap_regions(pdev, 1 << bar_pos, DRV_NAME);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900460 if (rc == -EBUSY)
Tejun Heo24dc5f32007-01-20 16:00:28 +0900461 pcim_pin_device(pdev);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900462 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +0900463 return rc;
Tejun Heo4447d352007-04-17 23:44:08 +0900464 host->iomap = pcim_iomap_table(pdev);
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800465 mmio_base = host->iomap[bar_pos];
Tejun Heo4447d352007-04-17 23:44:08 +0900466
467 /* different controllers have different number of ports - currently 4 or 8 */
468 /* All ports are on the same function. Multi-function device is no
469 * longer available. This should not be seen in any system. */
Tejun Heocbcdd872007-08-18 13:14:55 +0900470 for (i = 0; i < host->n_ports; i++) {
471 struct ata_port *ap = host->ports[i];
472 unsigned int offset = i * K2_SATA_PORT_OFFSET;
473
474 k2_sata_setup_port(&ap->ioaddr, mmio_base + offset);
475
476 ata_port_pbar_desc(ap, 5, -1, "mmio");
477 ata_port_pbar_desc(ap, 5, offset, "port");
478 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479
480 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
481 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +0900482 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
484 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +0900485 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700486
Linus Torvalds1da177e2005-04-16 15:20:36 -0700487 /* Clear a magic bit in SCR1 according to Darwin, those help
488 * some funky seagate drives (though so far, those were already
Rolf Eike Beer104e5012005-03-27 08:50:38 -0500489 * set by the firmware on the machines I had access to)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490 */
491 writel(readl(mmio_base + K2_SATA_SICR1_OFFSET) & ~0x00040000,
492 mmio_base + K2_SATA_SICR1_OFFSET);
493
494 /* Clear SATA error & interrupts we don't use */
495 writel(0xffffffff, mmio_base + K2_SATA_SCR_ERROR_OFFSET);
496 writel(0x0, mmio_base + K2_SATA_SIM_OFFSET);
497
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498 pci_set_master(pdev);
Tejun Heoc3b28892010-05-19 22:10:21 +0200499 return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
Tejun Heo9363c382008-04-07 22:47:16 +0900500 IRQF_SHARED, &k2_sata_sht);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501}
502
Narendra Sankar60bf09a2005-05-25 16:51:00 -0700503/* 0x240 is device ID for Apple K2 device
504 * 0x241 is device ID for Serverworks Frodo4
505 * 0x242 is device ID for Serverworks Frodo8
506 * 0x24a is device ID for BCM5785 (aka HT1000) HT southbridge integrated SATA
507 * controller
508 * */
Jeff Garzik3b7d6972005-11-10 11:04:11 -0500509static const struct pci_device_id k2_sata_pci_tbl[] = {
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800510 { PCI_VDEVICE(SERVERWORKS, 0x0240), chip_svw4 },
Jeff Garzikaeb74912008-04-12 00:11:35 -0400511 { PCI_VDEVICE(SERVERWORKS, 0x0241), chip_svw8 },
512 { PCI_VDEVICE(SERVERWORKS, 0x0242), chip_svw4 },
Anantha Subramanyam931506d2008-02-28 15:58:35 -0800513 { PCI_VDEVICE(SERVERWORKS, 0x024a), chip_svw4 },
514 { PCI_VDEVICE(SERVERWORKS, 0x024b), chip_svw4 },
515 { PCI_VDEVICE(SERVERWORKS, 0x0410), chip_svw42 },
516 { PCI_VDEVICE(SERVERWORKS, 0x0411), chip_svw43 },
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400517
Linus Torvalds1da177e2005-04-16 15:20:36 -0700518 { }
519};
520
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521static struct pci_driver k2_sata_pci_driver = {
522 .name = DRV_NAME,
523 .id_table = k2_sata_pci_tbl,
524 .probe = k2_sata_init_one,
525 .remove = ata_pci_remove_one,
526};
527
Axel Lin2fc75da2012-04-19 13:43:05 +0800528module_pci_driver(k2_sata_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530MODULE_AUTHOR("Benjamin Herrenschmidt");
531MODULE_DESCRIPTION("low-level driver for K2 SATA controller");
532MODULE_LICENSE("GPL");
533MODULE_DEVICE_TABLE(pci, k2_sata_pci_tbl);
534MODULE_VERSION(DRV_VERSION);