blob: e1ce9fd5a160b12709b109cf2ec5440bbb78f6f5 [file] [log] [blame]
Inki Dae1c248b72011-10-04 19:19:01 +09001/* exynos_drm_crtc.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * Authors:
5 * Inki Dae <inki.dae@samsung.com>
6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */
28
29#include "drmP.h"
30#include "drm_crtc_helper.h"
31
Inki Dae2c871122011-11-12 15:23:32 +090032#include "exynos_drm_crtc.h"
Inki Dae1c248b72011-10-04 19:19:01 +090033#include "exynos_drm_drv.h"
34#include "exynos_drm_fb.h"
35#include "exynos_drm_encoder.h"
Inki Dae2c871122011-11-12 15:23:32 +090036#include "exynos_drm_gem.h"
Inki Dae19c8b832011-10-14 13:29:46 +090037#include "exynos_drm_buf.h"
Inki Dae1c248b72011-10-04 19:19:01 +090038
39#define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc,\
40 drm_crtc)
41
42/*
Inki Dae1c248b72011-10-04 19:19:01 +090043 * Exynos specific crtc structure.
44 *
45 * @drm_crtc: crtc object.
46 * @overlay: contain information common to display controller and hdmi and
47 * contents of this overlay object would be copied to sub driver size.
48 * @pipe: a crtc index created at load() with a new crtc object creation
49 * and the crtc object would be set to private->crtc array
50 * to get a crtc object corresponding to this pipe from private->crtc
51 * array when irq interrupt occured. the reason of using this pipe is that
52 * drm framework doesn't support multiple irq yet.
53 * we can refer to the crtc to current hardware interrupt occured through
54 * this pipe value.
Inki Daeec05da92011-12-06 11:06:54 +090055 * @dpms: store the crtc dpms value
Inki Dae1c248b72011-10-04 19:19:01 +090056 */
57struct exynos_drm_crtc {
58 struct drm_crtc drm_crtc;
59 struct exynos_drm_overlay overlay;
60 unsigned int pipe;
Inki Daeec05da92011-12-06 11:06:54 +090061 unsigned int dpms;
Inki Dae1c248b72011-10-04 19:19:01 +090062};
63
Inki Dae8e9cc6a2011-10-14 13:29:47 +090064static void exynos_drm_crtc_apply(struct drm_crtc *crtc)
Inki Dae1c248b72011-10-04 19:19:01 +090065{
66 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
67 struct exynos_drm_overlay *overlay = &exynos_crtc->overlay;
68
69 exynos_drm_fn_encoder(crtc, overlay,
70 exynos_drm_encoder_crtc_mode_set);
Joonyoung Shimd2716c82011-11-04 17:04:45 +090071 exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
72 exynos_drm_encoder_crtc_commit);
Inki Dae1c248b72011-10-04 19:19:01 +090073}
74
Inki Dae2c871122011-11-12 15:23:32 +090075int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
76 struct drm_framebuffer *fb,
77 struct drm_display_mode *mode,
78 struct exynos_drm_crtc_pos *pos)
Inki Dae1c248b72011-10-04 19:19:01 +090079{
Inki Dae2c871122011-11-12 15:23:32 +090080 struct exynos_drm_gem_buf *buffer;
Inki Dae19c8b832011-10-14 13:29:46 +090081 unsigned int actual_w;
82 unsigned int actual_h;
Inki Dae1c248b72011-10-04 19:19:01 +090083
Inki Dae2c871122011-11-12 15:23:32 +090084 buffer = exynos_drm_fb_get_buf(fb);
85 if (!buffer) {
86 DRM_LOG_KMS("buffer is null.\n");
Inki Dae19c8b832011-10-14 13:29:46 +090087 return -EFAULT;
88 }
Inki Dae1c248b72011-10-04 19:19:01 +090089
Inki Dae2c871122011-11-12 15:23:32 +090090 overlay->dma_addr = buffer->dma_addr;
91 overlay->vaddr = buffer->kvaddr;
Inki Dae1c248b72011-10-04 19:19:01 +090092
Inki Dae2c871122011-11-12 15:23:32 +090093 DRM_DEBUG_KMS("vaddr = 0x%lx, dma_addr = 0x%lx\n",
Inki Dae19c8b832011-10-14 13:29:46 +090094 (unsigned long)overlay->vaddr,
Inki Dae2c871122011-11-12 15:23:32 +090095 (unsigned long)overlay->dma_addr);
Inki Dae1c248b72011-10-04 19:19:01 +090096
Inki Dae19c8b832011-10-14 13:29:46 +090097 actual_w = min((mode->hdisplay - pos->crtc_x), pos->crtc_w);
98 actual_h = min((mode->vdisplay - pos->crtc_y), pos->crtc_h);
99
100 /* set drm framebuffer data. */
101 overlay->fb_x = pos->fb_x;
102 overlay->fb_y = pos->fb_y;
103 overlay->fb_width = fb->width;
104 overlay->fb_height = fb->height;
Inki Dae1c248b72011-10-04 19:19:01 +0900105 overlay->bpp = fb->bits_per_pixel;
Ville Syrjälä01f2c772011-12-20 00:06:49 +0200106 overlay->pitch = fb->pitches[0];
Inki Dae19c8b832011-10-14 13:29:46 +0900107
108 /* set overlay range to be displayed. */
109 overlay->crtc_x = pos->crtc_x;
110 overlay->crtc_y = pos->crtc_y;
111 overlay->crtc_width = actual_w;
112 overlay->crtc_height = actual_h;
113
114 /* set drm mode data. */
115 overlay->mode_width = mode->hdisplay;
116 overlay->mode_height = mode->vdisplay;
117 overlay->refresh = mode->vrefresh;
118 overlay->scan_flag = mode->flags;
Inki Dae1c248b72011-10-04 19:19:01 +0900119
120 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
Inki Dae19c8b832011-10-14 13:29:46 +0900121 overlay->crtc_x, overlay->crtc_y,
122 overlay->crtc_width, overlay->crtc_height);
Inki Dae1c248b72011-10-04 19:19:01 +0900123
Inki Dae19c8b832011-10-14 13:29:46 +0900124 return 0;
Inki Dae1c248b72011-10-04 19:19:01 +0900125}
126
127static int exynos_drm_crtc_update(struct drm_crtc *crtc)
128{
129 struct exynos_drm_crtc *exynos_crtc;
130 struct exynos_drm_overlay *overlay;
131 struct exynos_drm_crtc_pos pos;
132 struct drm_display_mode *mode = &crtc->mode;
133 struct drm_framebuffer *fb = crtc->fb;
134
135 if (!mode || !fb)
136 return -EINVAL;
137
138 exynos_crtc = to_exynos_crtc(crtc);
139 overlay = &exynos_crtc->overlay;
140
141 memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
Inki Dae19c8b832011-10-14 13:29:46 +0900142
143 /* it means the offset of framebuffer to be displayed. */
Inki Dae1c248b72011-10-04 19:19:01 +0900144 pos.fb_x = crtc->x;
145 pos.fb_y = crtc->y;
Inki Dae19c8b832011-10-14 13:29:46 +0900146
147 /* OSD position to be displayed. */
148 pos.crtc_x = 0;
149 pos.crtc_y = 0;
Inki Dae1c248b72011-10-04 19:19:01 +0900150 pos.crtc_w = fb->width - crtc->x;
151 pos.crtc_h = fb->height - crtc->y;
152
Inki Dae19c8b832011-10-14 13:29:46 +0900153 return exynos_drm_overlay_update(overlay, crtc->fb, mode, &pos);
Inki Dae1c248b72011-10-04 19:19:01 +0900154}
155
156static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
157{
Inki Daeec05da92011-12-06 11:06:54 +0900158 struct drm_device *dev = crtc->dev;
Joonyoung Shimd2716c82011-11-04 17:04:45 +0900159 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
Inki Dae1c248b72011-10-04 19:19:01 +0900160
Joonyoung Shimd2716c82011-11-04 17:04:45 +0900161 DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
162
Inki Daeec05da92011-12-06 11:06:54 +0900163 if (exynos_crtc->dpms == mode) {
164 DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n");
165 return;
166 }
167
168 mutex_lock(&dev->struct_mutex);
169
Joonyoung Shimd2716c82011-11-04 17:04:45 +0900170 switch (mode) {
171 case DRM_MODE_DPMS_ON:
Inki Daeec05da92011-12-06 11:06:54 +0900172 exynos_drm_fn_encoder(crtc, &mode,
173 exynos_drm_encoder_crtc_dpms);
174 exynos_crtc->dpms = mode;
Joonyoung Shimd2716c82011-11-04 17:04:45 +0900175 break;
176 case DRM_MODE_DPMS_STANDBY:
177 case DRM_MODE_DPMS_SUSPEND:
178 case DRM_MODE_DPMS_OFF:
Inki Daeec05da92011-12-06 11:06:54 +0900179 exynos_drm_fn_encoder(crtc, &mode,
180 exynos_drm_encoder_crtc_dpms);
181 exynos_crtc->dpms = mode;
Joonyoung Shimd2716c82011-11-04 17:04:45 +0900182 break;
183 default:
Inki Daeec05da92011-12-06 11:06:54 +0900184 DRM_ERROR("unspecified mode %d\n", mode);
Joonyoung Shimd2716c82011-11-04 17:04:45 +0900185 break;
186 }
Inki Daeec05da92011-12-06 11:06:54 +0900187
188 mutex_unlock(&dev->struct_mutex);
Inki Dae1c248b72011-10-04 19:19:01 +0900189}
190
191static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
192{
193 DRM_DEBUG_KMS("%s\n", __FILE__);
194
195 /* drm framework doesn't check NULL. */
196}
197
198static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
199{
Joonyoung Shimd2716c82011-11-04 17:04:45 +0900200 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
201
Inki Dae1c248b72011-10-04 19:19:01 +0900202 DRM_DEBUG_KMS("%s\n", __FILE__);
203
Inki Daeec05da92011-12-06 11:06:54 +0900204 /*
205 * when set_crtc is requested from user or at booting time,
206 * crtc->commit would be called without dpms call so if dpms is
207 * no power on then crtc->dpms should be called
208 * with DRM_MODE_DPMS_ON for the hardware power to be on.
209 */
210 if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) {
211 int mode = DRM_MODE_DPMS_ON;
212
213 /*
214 * enable hardware(power on) to all encoders hdmi connected
215 * to current crtc.
216 */
217 exynos_drm_crtc_dpms(crtc, mode);
218 /*
219 * enable dma to all encoders connected to current crtc and
220 * lcd panel.
221 */
222 exynos_drm_fn_encoder(crtc, &mode,
223 exynos_drm_encoder_dpms_from_crtc);
224 }
225
Joonyoung Shimd2716c82011-11-04 17:04:45 +0900226 exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
227 exynos_drm_encoder_crtc_commit);
Inki Dae1c248b72011-10-04 19:19:01 +0900228}
229
230static bool
231exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
232 struct drm_display_mode *mode,
233 struct drm_display_mode *adjusted_mode)
234{
235 DRM_DEBUG_KMS("%s\n", __FILE__);
236
237 /* drm framework doesn't check NULL */
238 return true;
239}
240
241static int
242exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
243 struct drm_display_mode *adjusted_mode, int x, int y,
244 struct drm_framebuffer *old_fb)
245{
246 DRM_DEBUG_KMS("%s\n", __FILE__);
247
248 mode = adjusted_mode;
249
250 return exynos_drm_crtc_update(crtc);
251}
252
253static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
254 struct drm_framebuffer *old_fb)
255{
256 int ret;
257
258 DRM_DEBUG_KMS("%s\n", __FILE__);
259
260 ret = exynos_drm_crtc_update(crtc);
261 if (ret)
262 return ret;
263
264 exynos_drm_crtc_apply(crtc);
265
266 return ret;
267}
268
269static void exynos_drm_crtc_load_lut(struct drm_crtc *crtc)
270{
271 DRM_DEBUG_KMS("%s\n", __FILE__);
272 /* drm framework doesn't check NULL */
273}
274
275static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
276 .dpms = exynos_drm_crtc_dpms,
277 .prepare = exynos_drm_crtc_prepare,
278 .commit = exynos_drm_crtc_commit,
279 .mode_fixup = exynos_drm_crtc_mode_fixup,
280 .mode_set = exynos_drm_crtc_mode_set,
281 .mode_set_base = exynos_drm_crtc_mode_set_base,
282 .load_lut = exynos_drm_crtc_load_lut,
283};
284
285static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
286 struct drm_framebuffer *fb,
287 struct drm_pending_vblank_event *event)
288{
289 struct drm_device *dev = crtc->dev;
290 struct exynos_drm_private *dev_priv = dev->dev_private;
291 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
292 struct drm_framebuffer *old_fb = crtc->fb;
293 int ret = -EINVAL;
294
295 DRM_DEBUG_KMS("%s\n", __FILE__);
296
297 mutex_lock(&dev->struct_mutex);
298
Inki Daeccf4d882011-10-14 13:29:51 +0900299 if (event) {
300 /*
301 * the pipe from user always is 0 so we can set pipe number
302 * of current owner to event.
303 */
304 event->pipe = exynos_crtc->pipe;
305
Inki Dae1c248b72011-10-04 19:19:01 +0900306 list_add_tail(&event->base.link,
307 &dev_priv->pageflip_event_list);
308
309 ret = drm_vblank_get(dev, exynos_crtc->pipe);
310 if (ret) {
311 DRM_DEBUG("failed to acquire vblank counter\n");
Inki Daeccf4d882011-10-14 13:29:51 +0900312 list_del(&event->base.link);
313
Inki Dae1c248b72011-10-04 19:19:01 +0900314 goto out;
315 }
316
317 crtc->fb = fb;
318 ret = exynos_drm_crtc_update(crtc);
319 if (ret) {
320 crtc->fb = old_fb;
321 drm_vblank_put(dev, exynos_crtc->pipe);
Inki Daeccf4d882011-10-14 13:29:51 +0900322 list_del(&event->base.link);
Inki Dae1c248b72011-10-04 19:19:01 +0900323
324 goto out;
325 }
326
Inki Daef6b98252011-10-14 13:29:50 +0900327 /*
328 * the values related to a buffer of the drm framebuffer
329 * to be applied should be set at here. because these values
Inki Daeccf4d882011-10-14 13:29:51 +0900330 * first, are set to shadow registers and then to
Inki Daef6b98252011-10-14 13:29:50 +0900331 * real registers at vsync front porch period.
332 */
Inki Dae8e9cc6a2011-10-14 13:29:47 +0900333 exynos_drm_crtc_apply(crtc);
Inki Dae1c248b72011-10-04 19:19:01 +0900334 }
335out:
336 mutex_unlock(&dev->struct_mutex);
337 return ret;
338}
339
340static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
341{
342 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
343 struct exynos_drm_private *private = crtc->dev->dev_private;
344
345 DRM_DEBUG_KMS("%s\n", __FILE__);
346
347 private->crtc[exynos_crtc->pipe] = NULL;
348
349 drm_crtc_cleanup(crtc);
350 kfree(exynos_crtc);
351}
352
353static struct drm_crtc_funcs exynos_crtc_funcs = {
354 .set_config = drm_crtc_helper_set_config,
355 .page_flip = exynos_drm_crtc_page_flip,
356 .destroy = exynos_drm_crtc_destroy,
357};
358
359struct exynos_drm_overlay *get_exynos_drm_overlay(struct drm_device *dev,
360 struct drm_crtc *crtc)
361{
362 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
363
364 return &exynos_crtc->overlay;
365}
366
367int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr)
368{
369 struct exynos_drm_crtc *exynos_crtc;
370 struct exynos_drm_private *private = dev->dev_private;
371 struct drm_crtc *crtc;
372
373 DRM_DEBUG_KMS("%s\n", __FILE__);
374
375 exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL);
376 if (!exynos_crtc) {
377 DRM_ERROR("failed to allocate exynos crtc\n");
378 return -ENOMEM;
379 }
380
381 exynos_crtc->pipe = nr;
Inki Daeec05da92011-12-06 11:06:54 +0900382 exynos_crtc->dpms = DRM_MODE_DPMS_OFF;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900383 exynos_crtc->overlay.zpos = DEFAULT_ZPOS;
Inki Dae1c248b72011-10-04 19:19:01 +0900384 crtc = &exynos_crtc->drm_crtc;
385
386 private->crtc[nr] = crtc;
387
388 drm_crtc_init(dev, crtc, &exynos_crtc_funcs);
389 drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
390
391 return 0;
392}
393
394int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc)
395{
396 struct exynos_drm_private *private = dev->dev_private;
Inki Daeec05da92011-12-06 11:06:54 +0900397 struct exynos_drm_crtc *exynos_crtc =
398 to_exynos_crtc(private->crtc[crtc]);
Inki Dae1c248b72011-10-04 19:19:01 +0900399
400 DRM_DEBUG_KMS("%s\n", __FILE__);
401
Inki Daeec05da92011-12-06 11:06:54 +0900402 if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
403 return -EPERM;
404
Inki Dae1c248b72011-10-04 19:19:01 +0900405 exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
406 exynos_drm_enable_vblank);
407
408 return 0;
409}
410
411void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc)
412{
413 struct exynos_drm_private *private = dev->dev_private;
Inki Daeec05da92011-12-06 11:06:54 +0900414 struct exynos_drm_crtc *exynos_crtc =
415 to_exynos_crtc(private->crtc[crtc]);
Inki Dae1c248b72011-10-04 19:19:01 +0900416
417 DRM_DEBUG_KMS("%s\n", __FILE__);
418
Inki Daeec05da92011-12-06 11:06:54 +0900419 if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
420 return;
421
Inki Dae1c248b72011-10-04 19:19:01 +0900422 exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
423 exynos_drm_disable_vblank);
424}
425
426MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
427MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
428MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>");
429MODULE_DESCRIPTION("Samsung SoC DRM CRTC Driver");
430MODULE_LICENSE("GPL");