blob: 736f7efd874a7e2182a9d48640b64bec787a020a [file] [log] [blame]
Dmitriy Taychenachevfd6ac7b2009-07-31 20:29:22 +09001/*
2 * Copyright 2009 Dmitriy Taychenachev <dimichxp@gmail.com>
3 *
4 * This file is released under the GPLv2 or later.
5 */
6
7#include <linux/delay.h>
8#include <linux/io.h>
9
10#include <asm/proc-fns.h>
11#include <mach/hardware.h>
12
13#include "crm_regs.h"
14
15#define WDOG_WCR MXC91231_IO_ADDRESS(MXC91231_WDOG1_BASE_ADDR)
16#define WDOG_WCR_OUT_ENABLE (1 << 6)
17#define WDOG_WCR_ASSERT (1 << 5)
18
19void mxc91231_power_off(void)
20{
21 u16 wcr;
22
23 wcr = __raw_readw(WDOG_WCR);
24 wcr |= WDOG_WCR_OUT_ENABLE;
25 wcr &= ~WDOG_WCR_ASSERT;
26 __raw_writew(wcr, WDOG_WCR);
27}
28
29void mxc91231_arch_reset(char mode, const char *cmd)
30{
31 u32 amcr;
32
33 /* Reset the AP using CRM */
34 amcr = __raw_readl(MXC_CRMAP_AMCR);
35 amcr &= ~MXC_CRMAP_AMCR_SW_AP;
36 __raw_writel(amcr, MXC_CRMAP_AMCR);
37
38 mdelay(10);
39 cpu_reset(0);
40}
41
42void mxc91231_prepare_idle(void)
43{
44 u32 crm_ctl;
45
46 /* Go to WAIT mode after WFI */
47 crm_ctl = __raw_readl(MXC_DSM_CRM_CONTROL);
48 crm_ctl &= ~(MXC_DSM_CRM_CTRL_LPMD0 | MXC_DSM_CRM_CTRL_LPMD1);
49 crm_ctl |= MXC_DSM_CRM_CTRL_LPMD_WAIT_MODE;
50 __raw_writel(crm_ctl, MXC_DSM_CRM_CONTROL);
51}