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Abhijit Pagare30b88632010-01-26 20:12:54 -07001/*
2 * OMAP4 Clock domains framework
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc.
5 * Copyright (C) 2009 Nokia Corporation
6 *
7 * Abhijit Pagare (abhijitpagare@ti.com)
8 * Benoit Cousson (b-cousson@ti.com)
9 *
10 * This file is automatically generated from the OMAP hardware databases.
11 * We respectfully ask that any modifications to this file be coordinated
12 * with the public linux-omap@vger.kernel.org mailing list and the
13 * authors above to ensure that the autogeneration scripts are kept
14 * up-to-date with the file contents.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20
Abhijit Pagare1a422722010-01-26 20:12:54 -070021/*
22 * To-Do List
23 * -> Populate the Sleep/Wakeup dependencies for the domains
24 */
25
Paul Walmsleydc0b3a72010-12-21 20:01:20 -070026#include <linux/kernel.h>
27#include <linux/io.h>
Abhijit Pagare30b88632010-01-26 20:12:54 -070028
Paul Walmsley1540f2142010-12-21 21:05:15 -070029#include "clockdomain.h"
Paul Walmsley59fb6592010-12-21 15:30:55 -070030#include "cm1_44xx.h"
31#include "cm2_44xx.h"
Abhijit Pagare30b88632010-01-26 20:12:54 -070032
Paul Walmsleydc0b3a72010-12-21 20:01:20 -070033#include "cm-regbits-44xx.h"
Paul Walmsleyd198b512010-12-21 15:30:54 -070034#include "prm44xx.h"
Paul Walmsleybd2122c2010-12-21 21:05:15 -070035#include "prcm44xx.h"
Paul Walmsleyd198b512010-12-21 15:30:54 -070036#include "prcm_mpu44xx.h"
37
Abhijit Pagare30b88632010-01-26 20:12:54 -070038
39static struct clockdomain l4_cefuse_44xx_clkdm = {
40 .name = "l4_cefuse_clkdm",
41 .pwrdm = { .name = "cefuse_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -070042 .prcm_partition = OMAP4430_CM2_PARTITION,
43 .cm_inst = OMAP4430_CM2_CEFUSE_INST,
44 .clkdm_offs = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -070045 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
46 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
47};
48
49static struct clockdomain l4_cfg_44xx_clkdm = {
50 .name = "l4_cfg_clkdm",
51 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -070052 .prcm_partition = OMAP4430_CM2_PARTITION,
53 .cm_inst = OMAP4430_CM2_CORE_INST,
54 .clkdm_offs = OMAP4430_CM2_CORE_L4CFG_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -070055 .flags = CLKDM_CAN_HWSUP,
56 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
57};
58
59static struct clockdomain tesla_44xx_clkdm = {
60 .name = "tesla_clkdm",
61 .pwrdm = { .name = "tesla_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -070062 .prcm_partition = OMAP4430_CM1_PARTITION,
63 .cm_inst = OMAP4430_CM1_TESLA_INST,
64 .clkdm_offs = OMAP4430_CM1_TESLA_TESLA_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -070065 .flags = CLKDM_CAN_HWSUP_SWSUP,
66 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
67};
68
69static struct clockdomain l3_gfx_44xx_clkdm = {
70 .name = "l3_gfx_clkdm",
71 .pwrdm = { .name = "gfx_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -070072 .prcm_partition = OMAP4430_CM2_PARTITION,
73 .cm_inst = OMAP4430_CM2_GFX_INST,
74 .clkdm_offs = OMAP4430_CM2_GFX_GFX_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -070075 .flags = CLKDM_CAN_HWSUP_SWSUP,
76 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
77};
78
79static struct clockdomain ivahd_44xx_clkdm = {
80 .name = "ivahd_clkdm",
81 .pwrdm = { .name = "ivahd_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -070082 .prcm_partition = OMAP4430_CM2_PARTITION,
83 .cm_inst = OMAP4430_CM2_IVAHD_INST,
84 .clkdm_offs = OMAP4430_CM2_IVAHD_IVAHD_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -070085 .flags = CLKDM_CAN_HWSUP_SWSUP,
86 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
87};
88
89static struct clockdomain l4_secure_44xx_clkdm = {
90 .name = "l4_secure_clkdm",
91 .pwrdm = { .name = "l4per_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -070092 .prcm_partition = OMAP4430_CM2_PARTITION,
93 .cm_inst = OMAP4430_CM2_L4PER_INST,
94 .clkdm_offs = OMAP4430_CM2_L4PER_L4SEC_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -070095 .flags = CLKDM_CAN_HWSUP_SWSUP,
96 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
97};
98
99static struct clockdomain l4_per_44xx_clkdm = {
100 .name = "l4_per_clkdm",
101 .pwrdm = { .name = "l4per_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700102 .prcm_partition = OMAP4430_CM2_PARTITION,
103 .cm_inst = OMAP4430_CM2_L4PER_INST,
104 .clkdm_offs = OMAP4430_CM2_L4PER_L4PER_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700105 .flags = CLKDM_CAN_HWSUP_SWSUP,
106 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
107};
108
109static struct clockdomain abe_44xx_clkdm = {
110 .name = "abe_clkdm",
111 .pwrdm = { .name = "abe_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700112 .prcm_partition = OMAP4430_CM1_PARTITION,
113 .cm_inst = OMAP4430_CM1_ABE_INST,
114 .clkdm_offs = OMAP4430_CM1_ABE_ABE_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700115 .flags = CLKDM_CAN_HWSUP_SWSUP,
116 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
117};
118
Abhijit Pagare6b04e0d2010-01-26 20:12:58 -0700119static struct clockdomain l3_instr_44xx_clkdm = {
120 .name = "l3_instr_clkdm",
121 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700122 .prcm_partition = OMAP4430_CM2_PARTITION,
123 .cm_inst = OMAP4430_CM2_CORE_INST,
124 .clkdm_offs = OMAP4430_CM2_CORE_L3INSTR_CDOFFS,
Abhijit Pagare6b04e0d2010-01-26 20:12:58 -0700125 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
126};
127
Abhijit Pagare30b88632010-01-26 20:12:54 -0700128static struct clockdomain l3_init_44xx_clkdm = {
129 .name = "l3_init_clkdm",
130 .pwrdm = { .name = "l3init_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700131 .prcm_partition = OMAP4430_CM2_PARTITION,
132 .cm_inst = OMAP4430_CM2_L3INIT_INST,
133 .clkdm_offs = OMAP4430_CM2_L3INIT_L3INIT_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700134 .flags = CLKDM_CAN_HWSUP_SWSUP,
135 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
136};
137
138static struct clockdomain mpuss_44xx_clkdm = {
139 .name = "mpuss_clkdm",
140 .pwrdm = { .name = "mpu_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700141 .prcm_partition = OMAP4430_CM1_PARTITION,
142 .cm_inst = OMAP4430_CM1_MPU_INST,
143 .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700144 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
145 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
146};
147
148static struct clockdomain mpu0_44xx_clkdm = {
149 .name = "mpu0_clkdm",
150 .pwrdm = { .name = "cpu0_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700151 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
152 .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST,
153 .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700154 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
155 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
156};
157
158static struct clockdomain mpu1_44xx_clkdm = {
159 .name = "mpu1_clkdm",
160 .pwrdm = { .name = "cpu1_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700161 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
162 .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST,
163 .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700164 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
165 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
166};
167
168static struct clockdomain l3_emif_44xx_clkdm = {
169 .name = "l3_emif_clkdm",
170 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700171 .prcm_partition = OMAP4430_CM2_PARTITION,
172 .cm_inst = OMAP4430_CM2_CORE_INST,
173 .clkdm_offs = OMAP4430_CM2_CORE_MEMIF_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700174 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
175 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
176};
177
178static struct clockdomain l4_ao_44xx_clkdm = {
179 .name = "l4_ao_clkdm",
180 .pwrdm = { .name = "always_on_core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700181 .prcm_partition = OMAP4430_CM2_PARTITION,
182 .cm_inst = OMAP4430_CM2_ALWAYS_ON_INST,
183 .clkdm_offs = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700184 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
185 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
186};
187
188static struct clockdomain ducati_44xx_clkdm = {
189 .name = "ducati_clkdm",
190 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700191 .prcm_partition = OMAP4430_CM2_PARTITION,
192 .cm_inst = OMAP4430_CM2_CORE_INST,
193 .clkdm_offs = OMAP4430_CM2_CORE_DUCATI_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700194 .flags = CLKDM_CAN_HWSUP_SWSUP,
195 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
196};
197
198static struct clockdomain l3_2_44xx_clkdm = {
199 .name = "l3_2_clkdm",
200 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700201 .prcm_partition = OMAP4430_CM2_PARTITION,
202 .cm_inst = OMAP4430_CM2_CORE_INST,
203 .clkdm_offs = OMAP4430_CM2_CORE_L3_2_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700204 .flags = CLKDM_CAN_HWSUP,
205 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
206};
207
208static struct clockdomain l3_1_44xx_clkdm = {
209 .name = "l3_1_clkdm",
210 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700211 .prcm_partition = OMAP4430_CM2_PARTITION,
212 .cm_inst = OMAP4430_CM2_CORE_INST,
213 .clkdm_offs = OMAP4430_CM2_CORE_L3_1_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700214 .flags = CLKDM_CAN_HWSUP,
215 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
216};
217
218static struct clockdomain l3_d2d_44xx_clkdm = {
219 .name = "l3_d2d_clkdm",
220 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700221 .prcm_partition = OMAP4430_CM2_PARTITION,
222 .cm_inst = OMAP4430_CM2_CORE_INST,
223 .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700224 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
225 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
226};
227
228static struct clockdomain iss_44xx_clkdm = {
229 .name = "iss_clkdm",
230 .pwrdm = { .name = "cam_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700231 .prcm_partition = OMAP4430_CM2_PARTITION,
232 .cm_inst = OMAP4430_CM2_CAM_INST,
233 .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700234 .flags = CLKDM_CAN_HWSUP_SWSUP,
235 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
236};
237
238static struct clockdomain l3_dss_44xx_clkdm = {
239 .name = "l3_dss_clkdm",
240 .pwrdm = { .name = "dss_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700241 .prcm_partition = OMAP4430_CM2_PARTITION,
242 .cm_inst = OMAP4430_CM2_DSS_INST,
243 .clkdm_offs = OMAP4430_CM2_DSS_DSS_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700244 .flags = CLKDM_CAN_HWSUP_SWSUP,
245 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
246};
247
248static struct clockdomain l4_wkup_44xx_clkdm = {
249 .name = "l4_wkup_clkdm",
250 .pwrdm = { .name = "wkup_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700251 .prcm_partition = OMAP4430_PRM_PARTITION,
252 .cm_inst = OMAP4430_PRM_WKUP_CM_INST,
253 .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700254 .flags = CLKDM_CAN_HWSUP,
255 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
256};
257
258static struct clockdomain emu_sys_44xx_clkdm = {
259 .name = "emu_sys_clkdm",
260 .pwrdm = { .name = "emu_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700261 .prcm_partition = OMAP4430_PRM_PARTITION,
262 .cm_inst = OMAP4430_PRM_EMU_CM_INST,
263 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700264 .flags = CLKDM_CAN_HWSUP,
265 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
266};
267
268static struct clockdomain l3_dma_44xx_clkdm = {
269 .name = "l3_dma_clkdm",
270 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700271 .prcm_partition = OMAP4430_CM2_PARTITION,
272 .cm_inst = OMAP4430_CM2_CORE_INST,
273 .clkdm_offs = OMAP4430_CM2_CORE_SDMA_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700274 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
275 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
276};
277
Paul Walmsleydc0b3a72010-12-21 20:01:20 -0700278static struct clockdomain *clockdomains_omap44xx[] __initdata = {
279 &l4_cefuse_44xx_clkdm,
280 &l4_cfg_44xx_clkdm,
281 &tesla_44xx_clkdm,
282 &l3_gfx_44xx_clkdm,
283 &ivahd_44xx_clkdm,
284 &l4_secure_44xx_clkdm,
285 &l4_per_44xx_clkdm,
286 &abe_44xx_clkdm,
287 &l3_instr_44xx_clkdm,
288 &l3_init_44xx_clkdm,
289 &mpuss_44xx_clkdm,
290 &mpu0_44xx_clkdm,
291 &mpu1_44xx_clkdm,
292 &l3_emif_44xx_clkdm,
293 &l4_ao_44xx_clkdm,
294 &ducati_44xx_clkdm,
295 &l3_2_44xx_clkdm,
296 &l3_1_44xx_clkdm,
297 &l3_d2d_44xx_clkdm,
298 &iss_44xx_clkdm,
299 &l3_dss_44xx_clkdm,
300 &l4_wkup_44xx_clkdm,
301 &emu_sys_44xx_clkdm,
302 &l3_dma_44xx_clkdm,
303 NULL,
304};
Abhijit Pagare30b88632010-01-26 20:12:54 -0700305
Paul Walmsleydc0b3a72010-12-21 20:01:20 -0700306void __init omap44xx_clockdomains_init(void)
307{
308 clkdm_init(clockdomains_omap44xx, NULL);
309}