blob: eaf6b9c489ff2f637de8d04b33fea4514b2d42e4 [file] [log] [blame]
Kukjin Kim461859d2010-01-29 10:21:16 +09001/* linux/arch/arm/mach-s5p6442/mach-smdk6442.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
Jassi Brarc204fb12010-12-21 09:44:30 +090015#include <linux/i2c.h>
Kukjin Kim461859d2010-01-29 10:21:16 +090016
17#include <asm/mach/arch.h>
18#include <asm/mach/map.h>
19#include <asm/setup.h>
20#include <asm/mach-types.h>
21
22#include <mach/map.h>
23#include <mach/regs-clock.h>
24
25#include <plat/regs-serial.h>
26#include <plat/s5p6442.h>
27#include <plat/devs.h>
28#include <plat/cpu.h>
Jassi Brarc204fb12010-12-21 09:44:30 +090029#include <plat/iic.h>
Kukjin Kim461859d2010-01-29 10:21:16 +090030
31/* Following are default values for UCON, ULCON and UFCON UART registers */
Kukjin Kimc8def082010-07-21 09:19:51 +090032#define SMDK6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
Kukjin Kim461859d2010-01-29 10:21:16 +090033 S3C2410_UCON_RXILEVEL | \
34 S3C2410_UCON_TXIRQMODE | \
35 S3C2410_UCON_RXIRQMODE | \
36 S3C2410_UCON_RXFIFO_TOI | \
37 S3C2443_UCON_RXERR_IRQEN)
38
Kukjin Kimc8def082010-07-21 09:19:51 +090039#define SMDK6442_ULCON_DEFAULT S3C2410_LCON_CS8
Kukjin Kim461859d2010-01-29 10:21:16 +090040
Kukjin Kimc8def082010-07-21 09:19:51 +090041#define SMDK6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
Kukjin Kim461859d2010-01-29 10:21:16 +090042 S5PV210_UFCON_TXTRIG4 | \
43 S5PV210_UFCON_RXTRIG4)
44
45static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
46 [0] = {
47 .hwport = 0,
48 .flags = 0,
Kukjin Kimc8def082010-07-21 09:19:51 +090049 .ucon = SMDK6442_UCON_DEFAULT,
50 .ulcon = SMDK6442_ULCON_DEFAULT,
51 .ufcon = SMDK6442_UFCON_DEFAULT,
Kukjin Kim461859d2010-01-29 10:21:16 +090052 },
53 [1] = {
54 .hwport = 1,
55 .flags = 0,
Kukjin Kimc8def082010-07-21 09:19:51 +090056 .ucon = SMDK6442_UCON_DEFAULT,
57 .ulcon = SMDK6442_ULCON_DEFAULT,
58 .ufcon = SMDK6442_UFCON_DEFAULT,
Kukjin Kim461859d2010-01-29 10:21:16 +090059 },
60 [2] = {
61 .hwport = 2,
62 .flags = 0,
Kukjin Kimc8def082010-07-21 09:19:51 +090063 .ucon = SMDK6442_UCON_DEFAULT,
64 .ulcon = SMDK6442_ULCON_DEFAULT,
65 .ufcon = SMDK6442_UFCON_DEFAULT,
Kukjin Kim461859d2010-01-29 10:21:16 +090066 },
67};
68
69static struct platform_device *smdk6442_devices[] __initdata = {
Jassi Brarc204fb12010-12-21 09:44:30 +090070 &s3c_device_i2c0,
Jassi Brar2fe4f0c2010-12-21 09:44:33 +090071 &samsung_asoc_dma,
Jassi Brar78a36822010-05-18 16:02:58 +090072 &s5p6442_device_iis0,
Banajit Goswamib46de632010-07-15 11:45:31 +053073 &s3c_device_wdt,
Kukjin Kim461859d2010-01-29 10:21:16 +090074};
75
Jassi Brarc204fb12010-12-21 09:44:30 +090076static struct i2c_board_info smdk6442_i2c_devs0[] __initdata = {
77 { I2C_BOARD_INFO("wm8580", 0x1b), },
78};
79
Kukjin Kim461859d2010-01-29 10:21:16 +090080static void __init smdk6442_map_io(void)
81{
82 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
83 s3c24xx_init_clocks(12000000);
84 s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs));
85}
86
87static void __init smdk6442_machine_init(void)
88{
Jassi Brarc204fb12010-12-21 09:44:30 +090089 s3c_i2c0_set_platdata(NULL);
90 i2c_register_board_info(0, smdk6442_i2c_devs0,
91 ARRAY_SIZE(smdk6442_i2c_devs0));
Kukjin Kim461859d2010-01-29 10:21:16 +090092 platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices));
93}
94
95MACHINE_START(SMDK6442, "SMDK6442")
96 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
Kukjin Kim461859d2010-01-29 10:21:16 +090097 .boot_params = S5P_PA_SDRAM + 0x100,
98 .init_irq = s5p6442_init_irq,
99 .map_io = smdk6442_map_io,
100 .init_machine = smdk6442_machine_init,
101 .timer = &s3c24xx_timer,
102MACHINE_END